JPH07123488A - Line connection setting system - Google Patents

Abstract

PURPOSE:To provide a line connection setting system shortening time required for recording or retrieving line connection information at the time of starting a transmitter to perform line connection with a time division switch. CONSTITUTION:When the line connection information shows continuous values in the case of recording this line connection information from a central processing unit 5 to an address control memory 1, a data decoding circuit 4 makes the most significant bit of leading data high. One set of these continuous data is converted to the leading data and continuous data numbers and recorded later in the address control memory 1 and when reading them from the address control memory 1 to a data memory 2, the reconversion to the continuous line connection information is performed while identifying that the data are converted by the most significant bit of the leading data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line connection setting method, and more particularly to a line connection setting method for a time division switch used in a transmission device or the like.

[0002]

2. Description of the Related Art Conventionally, this type of line connection setting method is used when a line is connected by a time division switch in a transmission device or the like.

FIG. 3 is a block diagram showing an example of a conventional line connection setting method.

Referring to FIG. 3, the central processing unit 5, the address control memory 1 and the serial counter 3 are interconnected by an address bus 101, and the central processing unit 5, the address control memory 1 and the data memory 2 are connected to the data bus. They are mutually connected by 102.

In the line connection setting method of this example, when setting line connection information (when writing data), the central processing unit 5 outputs addresses and data to the address control memory 1 through the address bus 101 and the data bus 102. And write the data. At this time, data is continuously written in the address control memory 1 from the start address to the end address.

When transferring data from the address control memory 1 to the data memory 2 when the line connection is performed as a time division switch, addresses are continuously output from the serial counter 3 to the address bus 101,
The data read from the address control memory 1 is input to the designated address of the data memory 2.

[0007]

This conventional line connection setting method has a problem that when the line connection information increases, the occupied time of the central processing unit bus at the time of writing and reading the line connection information increases. It was

Therefore, an object of the present invention is to provide a line connection setting method in a transmission device for connecting lines by a time division switch, in which line connection information is recorded and line connection information search time is shortened when the device is started up. To do.

[0009]

According to the present invention, a central processing unit for controlling line connection information, an address control memory for recording the line connection information from the central processing unit through an address bus and a data bus, In a line connection setting method including a serial counter for sequentially outputting addresses to read the line connection information from the address control memory, a predetermined conversion is performed by inputting the line connection information read from the address control memory. And a data decoding circuit for transferring the converted circuit connection information in synchronization with the timing of the address received from the serial counter, and data for reading data at the address indicated by the line connection information output from the data decoding circuit. With memory Line connection setting method according to symptoms can be obtained.

Further, the data decoding circuit sets the most significant bit of the head data to high when the line connection information is a continuous value when recording the line connection information from the central processing unit to the address control memory. After converting the set of data into the head data and the number of continuous data, it is recorded in the address control memory, and when reading from the address control memory to the data memory, the most significant bit of the head data is used. A line connection setting method is obtained, which is characterized in that it is converted data and re-converted into continuous line connection information.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the line connection setting method of the present invention. 1, the same components as those of the conventional example shown in FIG. 3 are designated by the same reference numerals as those of FIG.

That is, the line connection setting system of this embodiment has a configuration in which the data decoding circuit 4 is added to the system of the conventional example.

The data decoding circuit 4 receives the data read from the address control memory 1 through the data bus 102, and if the data is data showing a continuous value, the continuous value is obtained according to the timing of the sequential address from the serial counter 3. The data of is reproduced and output.

Next, the operation of this embodiment will be described with reference to FIG. FIG. 2 is a diagram showing an example of data conversion by the data decoding circuit of FIG.

The data read from the address control memory 1 and input to the data decoding circuit 4 is AD from each address (ADR) "0001" as shown in FIG.
The line connection data (DATA) up to R “0011” sequentially takes values from DATA “0100” to DATA “0005”.

Of these, ADR "0003", "000"
The line connection data of 6 addresses "4", "0005", "0006", "0007" and "0008" is DAT.
A "0501", "0502", "0503", "05
It is a continuous value of "04", "0505", and "0506".

At the time of writing to the address control memory 1, when the values of the line connection data to which the line connection information is connected are continuous as described above, the data "DATA" of the head data is indicated to indicate that the data is continuous data. A high "1" is written to 1 bit of the most significant bit (MSB) of 0501 "to form a header.

That is, the data decoding circuit 4 uses the ADR "00".
The data "03" is converted to DATA "1501".

Next, the data decoding circuit 4 outputs D of the number of line connection data consecutive to ADR "0004" of the next address.
Write ATA “0006”.

As a result, the continuous line connection data D
ATA “0501”, “0502”, “0503”,
"0504", "0505" and "0506" are converted into binary data DATA "1501" and "0006".

Next, when the line connection information is transferred to the data memory 2 when the line connection is made, first, the serial address is transferred from the serial counter 3 to the address bus 10.
1 and input to the address control memory 1.

The line connection data read from the address control memory 1 is input to the data decoding circuit 4 through the data bus 102.

In the data decoding circuit 4, when the line connection data from the address control memory 1 is input, the data decoding circuit 4 receives the data from the address control memory 1 in synchronization with the timing of the sequential address received from the serial counter 3. Output the line connection data.

At this time, in the data decoding circuit 4, 1 of the MSB of the line connection data is read from the address control memory 1.
When the bit is high “1”, one bit of the MSB of the data memory 2 is returned to low “0” and DATA
The next data (ADR shown in FIG. 2) received from the address control memory 1 after being converted back to “0501” and output.
DATA “0501”, “0502” of 6 continuous line connection data reproduced by identifying the number “0006” of continuous line connection data from “0004” data)
"0503", "0504", "0505" and "0"
506 ″ is output to the data memory 2 through the address data bus 103.

The process of converting and re-converting continuous data by the data decoding circuit 4 is generally implemented by software.

[0027]

As described above, according to the present invention, the line connection information read from the address control memory is input to the conventional line connection setting system, predetermined conversion is performed, and the timing of the address received from the serial counter is obtained. By adding a data decoding circuit that synchronously transfers the above-mentioned converted circuit connection information, continuous line connection data is transferred as a set of binary data, so the address control memory is accessed twice. Is reduced to.

Therefore, it is possible to set the line connection data in the address control memory by the central processing unit in a short time.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a line connection setting method of the present invention.

FIG. 2 is a diagram showing an example of data conversion by the data decoding circuit of FIG.

FIG. 3 is a block diagram showing an example of a conventional line connection setting method.

[Explanation of symbols]

 1 Address Control Memory 2 Data Memory 3 Serial Counter 4 Data Decoding Circuit 5 Central Processing Unit 101 Address Bus 102 Data Bus 103 Address Data Bus

Claims (2)

[Claims] 1. A central processing unit for controlling line connection information, an address control memory for recording the line connection information from the central processing unit through an address bus and a data bus, and the line connection information from the address control memory. In a line connection setting method comprising a serial counter for sequentially outputting addresses for reading, the address received from the serial counter after inputting the line connection information read from the address control memory and performing a predetermined conversion A line comprising a data decoding circuit for transferring the converted circuit connection information in synchronization with the timing of 1), and a data memory for reading data at an address indicated by the line connection information output from the data decoding circuit. Connection setting method. 2. The data decoding circuit, when recording the line connection information from the central processing unit into the address control memory, sets the most significant bit of the head data to be high when the line connection information is a continuous value. After converting the set of data into the head data and the number of continuous data, it is recorded in the address control memory, and when reading from the address control memory to the data memory, the most significant bit of the head data is used. 2. The line connection setting method according to claim 1, wherein the converted data is identified and re-converted into continuous line connection information.