JPH07121600A - Wiring route processing method - Google Patents

Abstract

PURPOSE:To reduce unwired length and to reduce a manual additional process by supplying change to unwired shape in wiring route processing by calculating the unwired length before and after re-wiring as an evaluation value. CONSTITUTION:The aggregate L1 of faulty wiring and the unwired length of target wiring before faulty wiring deletion processing is found. Thence, the aggregate L2 of the faulty wiring and the unwired length of the target wiring after the re-wiring processing is found. It is discriminated whether the aggregate L1 is smaller than the aggregate L2, and when it is judged that the aggregate L2 is smaller(L1>L2), a wiring state after the re-wiring processing is employed. Also, it is judged that the aggregate L1 is smaller, the wiring state before the faulty wiring deletion processing is employed. The shape of unwiring can be varied one after another by finding the aggregates L1, L2 of the unwired length and repeating processing to employ a shorter wiring route, and the unwired length can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a layout technique of wiring patterns or wiring paths on a semiconductor integrated circuit such as a gate array, a standard cell, a custom LSI, or a wiring board.

[0002]

2. Description of the Related Art As a conventional method generally adopted for automatic wiring design of a semiconductor integrated circuit, there is a maze method in addition to a line search method and a channel allocation method.

The maze method is a method of managing the availability of wiring in units of wiring grids and searching for a route from a start point terminal to an end point terminal by shifting one wiring grid in a predetermined direction. Since it is a wiring grid unit, the processing time becomes long.

As an example of a document describing the automatic placement and routing technique, there is JP-A-62-235683.

[0005]

In the determination of the wiring route in the automatic placement / wiring method adopting the maze method, the number of unrouted wirings is used as the evaluation value, and when there is no wiring route, the wiring is returned to the original state. Therefore, there is no change in the shape of unwired wires that have no wiring path, and no matter how many times the path search is performed,
It is highly likely that the same result will be obtained, and the convergence of unwired lines will deteriorate. In addition, in such an algorithm that uses the number of unwired wires as an evaluation value, the number of unwired wires does not increase, but the unwired length may be long. This leads to an increase in the number of processes.

It is an object of the present invention to reduce the number of manual steps by shortening the unwired length.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0008]

The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows.

That is, when the wiring route cannot be found by the wiring route search for the non-wiring, the wiring that obstructs the wiring is removed, and the unwiring and the removed wiring are subjected to the rewiring processing. In the case of calculating the evaluation value of, the unwired length before and after the rewiring is calculated as the evaluation value.

At this time, the first step of calculating the unrouted length before the rewiring, the second step of calculating the unrouted length after the relocation processing, the calculated value of the first step, and the second step.
Third, comparing which is smaller than the calculated value of the step
A step and a third step of determining a wiring route based on the comparison result can be included.

[0011]

According to the above-described means, the unwired length before and after the rewiring is calculated as the evaluation value by changing the unwired shape in the wiring route processing to shorten the unwired length. Act on.

[0012]

FIG. 7 shows an overall processing flow of a layout including automatic placement and routing, which is a method according to an embodiment of the present invention. Although not particularly limited, in the present embodiment, automatic placement and routing is performed by CAD (Computer Aided Design).

When designing an LSI, in order to reduce the time and labor required for the design, elements (for example, transistors) are not laid out one by one on a chip, but a unit having a certain logical function. It is usual to complete the layout for each block (functional cell) in advance, and to complete the layout and wiring in the entire chip while laying out the basic cells in these layouts.

The information in the cell layout library 24 is
It is used in each processing of automatic block placement, in-block placement wiring, and inter-block wiring, and when the overall layout is finally determined, it is converted into mask data and stored as mask drawing data. In this embodiment, the wiring path for connecting the terminals is obtained by the maze method.

Note that FIG. 7 also shows, as a reference, the flow of processing for generating the cell layout library exclusively by hand. In this case, the designer creates a cell layout library specification by picking out values while looking at the actual pattern of the cell, then coding while looking at this, further checking it, and checking if necessary. The cell layout library 80 is completed only after the correction.

When laying out an LSI according to the procedure shown in FIG. 7, when it becomes necessary to vertically or horizontally arrange cells of the same logic depending on the cell arrangement location, In addition, when the cell pattern must be changed and used according to the placement location in order to correct the unevenness of signal propagation delay or the difference from the design value, a cell that satisfies those requirements is prepared in advance. If not, the cell automatic design program is started in the middle of the layout, and a predetermined performance pattern is specified to create the required cell substance pattern. In this way, when a new cell whose pattern or logic has been added and changed is needed during layout, in other words,
When it is necessary to properly use cells having different patterns and different performances during layout, the layout library can be easily obtained through the above procedure.

In the automatic placement and routing process which employs the maze method, a route route search process is performed on unrouted lines, and if a route route cannot be found by this process, the unobstructed lines are removed again and the unrouted lines are rerouted. Also, there is a function of performing wiring processing on the removed faulty wiring, then calculating evaluation values before and after rewiring, and adopting the effective one. Such a function is called a lip-up function. Less than,
The flow of processing will be described in detail based on FIG. 2 centering on this lip-up function.

The following processing is performed for all wirings of the LSI (step 10).

First, a wiring route search process is performed (step 11). If a route is found in this process (YES), information on the wiring route is stored in the storage means (step 13). FIG. 3 shows the route search. A non-wiring 31 is provided between the terminals A and B, and a wiring path 32 between the terminals is obtained with the terminal A as a starting point. In this route search, if no route is found, a fault wiring search process is performed (step 1
4). FIG. 4 shows how to search for a faulty wiring. In FIG. 4, the existing wiring between the terminals C and D and the existing wiring between the terminals E and F obstruct the wiring between the terminals A and B. For this reason,
The existing wiring between the terminals C and D and the existing wiring between the terminals E and F are referred to as fault wirings 33 and 34, respectively. In the faulty wiring search process, if the faulty wirings 33 and 34 are found (YES), the faulty wirings are removed (step 16). FIG. 5 shows the fault wiring 33, 3
It is shown that 4 is removed and the wiring is left unwired. After the faulty wiring is removed, a wiring route searching process for the target wiring is performed (step 17). In this wiring route searching process, if a route is found (YES), information on the wiring route is stored in the storage means (step 19). FIG. 6 shows a state of the rewiring process. In the figure, reference numeral 35 is wiring by rewiring processing. Since the fault wiring between the terminals C and D and between the terminals E and F is removed, the wiring between the terminals A and B is enabled as indicated by 35.

Then, the following process is performed for all the faulty wirings found in the faulty wiring searching process in the above step 14 (step 20).

That is, a wiring route search process is first performed between the faulty wiring, that is, between the terminals C and D or between the terminals E and F (step 23), and if a route is found in this processing, (YES), information on the wiring route is stored in the storage means (step 25). After such processing is performed for all the faulty wirings, an evaluation value calculation processing is performed (step 21), and the wiring route is determined based on the calculated evaluation value (step 22).

According to the prior art, the evaluation value is the number of unwired lines, but in this embodiment, the unwired length before and after the rewiring is calculated in order to shorten the unwired length, and based on the calculated value. The wiring route is evaluated. It will be described in detail later.

When the above processing is performed for all wirings of the LSI, this algorithm is finished.

Next, the evaluation value calculation process (step 2)
1) and wiring route determination (step 22) will be described in detail with reference to the flowchart shown in FIG.

In FIG. 1, steps 1 to 4 are shown in FIG.
Belong to the evaluation value calculation process in. Further, the wiring route determination 22 in FIG.
Belong to.

First, the state before the faulty wiring deletion processing of step 16 in FIG. 2 is returned to (step 1), and the total unwiring length L1 of the faulty wiring and the target wiring before the faulty wiring deletion processing is obtained. For example, in FIG. 4, since the terminals C and D and the terminals E and F are already wired, the unwiring is only between the terminals A and B. In that case, the total unwiring length L1 is , And the length between terminals A and B.

Next, the state after the rewiring processing is restored (step 3), and this time, the total unwiring length L2 of the faulty wiring and the target wiring after the rewiring processing is obtained (step 4). For example, in FIG. 6, since the terminals A and B have already been wired, the unwired areas are the terminals C and D and the terminals E and F. In that case, the total unwired length L2 is L2.
Is equal to the sum of the length between terminals C and D and the length between terminals E and F.

Then, it is judged which of the total wiring lengths L1 and L2 is smaller (step 5). In this determination, the total wiring length value L2 is smaller (L1> L
If it is determined to be 2), the wiring state after the rewiring processing is adopted (step 7). That is, as shown in FIG. 6, the wiring having the terminals A and B prior to the terminals C and D and the terminals E and F is adopted. However, when it is determined in step 5 that L1 is smaller (L1 <L2), the wiring state before the faulty wiring deletion processing is adopted. That is, as shown in FIG.
Wiring in which the terminals C and D and the terminals E and F are prioritized over the terminals B is adopted. When L1 = L2, L1 <
It can be handled like L2.

Thus, step 14 shown in FIG.
Each time a faulty wiring is found in the faulty wiring search process, the total unrouted lengths L1 and L2 are obtained, and the process of adopting the shorter wiring route is repeated to successively change the unrouted shape. Therefore, the length of the unwiring can be shortened.

According to the above embodiment, the following operational effects can be obtained.

(1) In the lip-up in the automatic placement and routing by the maze method, the unwiring length before and after the rewiring is calculated as an evaluation value, and by using it, the unwiring shape can be changed, The unwired length can be shortened.

(2) Since the unwiring length is shortened due to the action and effect of the above (1), it is possible to reduce the number of additional man-hours.

The invention made by the present inventor has been specifically described based on the embodiments, but the present invention is not limited thereto, and needless to say, various modifications can be made without departing from the scope of the invention. Yes.

For example, in the above embodiment, the unwired length before and after the rewiring is focused and the number of unwired lines is not taken into consideration, but first, the placement and routing process is performed by the maze method using the number of unwired lines as an evaluation value to converge. It is effective to perform the automatic placement and routing process using the unwired length as the evaluation value, if necessary, in consideration of the deteriorated state of performance.

In the above description, the invention that was mainly made by the present inventor is the field of use that is the background of CAD.
Although the automatic placement and routing by (Computer Aided Design) has been described, the present invention is not limited thereto and DA (Design Automation) is used.
It can be widely applied to automatic placement and routing of semiconductor integrated circuits using the.

The present invention can be applied on the condition that a wiring route for connecting at least terminals is formed by route search.

[0037]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, when the wiring route cannot be found for the unwiring by the wiring route search, the wiring which becomes the obstacle is removed, and the unwiring and the removed wiring are subjected to the wiring processing, and then before and after the rewiring. When calculating the evaluation value of, and determining the wiring path based on it, by calculating the unwired length before and after the rewiring as an evaluation value, by giving a change to the unwired shape in the wiring path processing, In addition to reducing the number of unwired wires during the next wiring process,
The unwired length can be shortened. Further, since the unwired length is shortened, it is possible to reduce the man-hours required for additional manpower.

[Brief description of drawings]

FIG. 1 is a flowchart of evaluation value calculation processing and wiring route determination in automatic placement and routing processing to which a method according to an embodiment of the present invention is applied.

FIG. 2 is a flowchart of processing by a lip-up function in automatic placement and routing processing to which the method according to the embodiment of the present invention is applied.

FIG. 3 is a schematic diagram relating to a route search of the automatic placement and routing process.

FIG. 4 is a schematic diagram related to a route search of the automatic placement and routing process.

FIG. 5 is a schematic diagram relating to a route search of the automatic placement and routing process.

FIG. 6 is a schematic diagram relating to a route search of the automatic placement and routing process.

FIG. 7 is a flow chart of an overall layout process including the automatic placement and routing process.

[Explanation of symbols]

 31 unwired 32 wiring route 33 fault wiring 34 fault wiring A terminal B terminal C terminal D terminal E terminal F terminal

Claims (2)

[Claims] 1. When there is a fault in the route search for unrouted lines, the faulty line is removed, rerouting is performed, and the evaluation values before and after the rerouting are calculated. A wiring route processing method for determining a wiring route, comprising a step of calculating an unrouted length before and after the rewiring as the evaluation value. 2. A first step of calculating an unrouted length before rewiring, a second step of calculating an unrouted length after relocation processing, a calculated value of the first step, and a second step of the second step. The wiring route processing method according to claim 1, further comprising a third step of comparing which of the calculated values is smaller and a third step of determining a wiring route based on the comparison result.