JPH07113857A - Measuring instrument - Google Patents

Abstract

PURPOSE:To enable automatic calibration with good frequency characteristics by measuring the waveform from a signal generating means and applying backward bias voltage to a plurality of variable capacity diodes on the basis of the measured result to change capacity. CONSTITUTION:When an object 1 to be measured is detached and a switch SW is closed, a waveform generating part 2 outputs a square wave signal and a waveform measuring part 4 measures the square wave passed through a resistor R1 and an amplifier 3. A CPU 5 calculates the backward bias values of variable capacity diodes D1, D2 obtained from desired frequency characteristics on the basis of the measured result to send them to a D/A conversion part 71 to store the same in a memory 6. An operational amplifier 72 adds the output of the conversion part 71 and offset voltage to apply the added value to the anode of the diode D2. The output of the amplifier 72 is reversed by an inverting amplifier 73 to be applied to the cathode of the diode D1. The diodes D1, D2 respectively receive backward bias voltage to change capacity and this operation is repeated to set desired frequency characteristics. This bias value is stored in the memory 6 and calibration is performed on the basis of this value from the next time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a measuring device for measuring a waveform signal from an object to be measured, and in particular, it automatically calibrates deterioration of frequency characteristics due to input capacitance mainly of stray capacitance such as wiring. The present invention relates to a measuring device having a function to do.

[0002]

2. Description of the Related Art Conventionally, when measuring an object to be measured (hereinafter abbreviated as DUT) using an oscilloscope,
The frequency characteristic of the probe is calibrated by connecting to the UT, causing the probe to capture a square wave signal, and adjusting the trimmer capacitor provided in the probe. Here, it is necessary to calibrate the frequency characteristic of the signal line for measuring the DUT. The frequency characteristic of the pin is calibrated by manually adjusting the trimmer capacitor of the measuring device. However,
There is a problem that it is difficult to calibrate the frequency characteristic manually, and also an individual difference occurs and accurate measurement cannot be performed. The device that solves this problem is
069 and Japanese Utility Model Laid-Open No. 2-67283. However, in these devices, the capacitance is changed by one variable capacitance diode, but the capacitance of the variable capacitance diode changes due to the change in the voltage of the signal output from the DUT at the time of measurement, resulting in poor frequency characteristics. There was a problem that it would become.

[0003]

SUMMARY OF THE INVENTION It is an object of the present invention to realize a measuring device which has good frequency characteristics during measurement and performs automatic calibration.

[0004]

According to the present invention, in a measuring apparatus for measuring a waveform signal from an object to be measured, signal generating means for generating a waveform signal and a signal path for inputting a signal from the object to be measured. And a ground potential point, a first variable capacitance diode, a second variable capacitance diode provided between a signal path for inputting a signal from the object to be measured and the ground potential point, and at the time of calibration. Reverse bias means for measuring a waveform signal from the signal generating means through a signal path and applying a desired reverse bias voltage to the first variable capacitance diode and the second variable capacitance diode based on the measurement result, And a waveform signal from the object to be measured is input to the signal path at the time of measurement.

Further, the reverse bias means measures the waveform at different timings, and changes the reverse bias voltage applied to the first variable capacitance diode and the second variable capacitance diode according to the difference in the amplitude of the measured waveform. It is a feature.

[0006]

In the present invention as described above, the waveform from the signal generating means is measured through the signal path by the reverse bias means during calibration, and the first and second variable capacitance diodes are reverse biased based on the measurement result. Give voltage. The first and second varactor diodes change their capacitance by the change of the voltage value given by the reverse bias means. Further, the reverse bias means changes the reverse bias voltage applied to the first and second variable capacitance diodes based on the difference in the amplitude of the waveform measured at different timings.

[0007]

The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure,
1 is an object to be measured (hereinafter abbreviated as DUT). 2 is a waveform generator that generates a waveform, R1 is a first resistor, and D is at one end
The waveform signal from the UT 1 or the waveform generator 2 is input. Then, when measuring DUT1, switch SW
Is open. When the frequency characteristic is calibrated, the DUT 1 is removed, the switch SW is connected, and the waveform generator 2 is connected to the resistor R1. C1 is a capacitor, which is connected in parallel with the resistor R1.

D1 is a first variable capacitance diode whose cathode is connected to the ground potential point via a capacitor C2,
The anode is connected to the other end of the resistor R1. And
The capacitor C2 allows the AC component of the current generated between the cathode and the ground potential point to flow to the ground potential point. D2 is the second variable capacitance diode, the anode of which is the capacitor C3
To the ground potential point, and the cathode is connected to the other end of the resistor R1. The capacitor C3 causes the AC component of the current generated between the anode and the ground potential point to flow to the ground potential point. R2 is a second resistor, one end of which is connected to the other end of the resistor R1 and the other end of which is connected to the ground potential point. An amplifier 3 has one end connected to the resistor R1 and amplifies the waveform from the resistor R1.

Reference numeral 4 denotes a waveform measuring section, which is connected to the other end of the amplifier 3 and measures the waveform through the resistor R1 and the amplifier 3.
Reference numeral 5 denotes a CPU, which is a calculation means, and determines the optimum reverse bias value to be given to the variable capacitance diodes D1 and D2 for compensating the frequency characteristic based on the measurement result by the waveform measuring section 4. 6
Is a memory that is a storage unit, and stores the reverse bias value obtained by the CPU 5. A voltage supply unit 7 applies a positive voltage to the cathode of the variable capacitance diode D1 and a negative voltage to the anode of the variable capacitance diode D2 based on the reverse bias value obtained by the CPU 5.

In the voltage supply section 7, 71 is a D / A conversion section, which converts the reverse bias value obtained by the CPU 5 into a voltage. Here, it is assumed that the D / A converter 71 can output 0 to 5V. Reference numeral 72 denotes an operational amplifier, which adds the voltage from the D / A converter 71 and the offset voltage (here, 10 V) to give a negative voltage to the anode of the variable capacitance diode D2. 73 is an inverting amplifier, which is an operational amplifier 7
The output from 2 is inverted and a positive voltage is applied to the cathode of the variable capacitance diode D1. Here, the reverse bias means is composed of the waveform measuring unit 4, the CPU 5, and the voltage supply unit 7.

For example, in a device for measuring a driver of a liquid crystal display, a switch SW and resistors R1 and R are provided.
It has 2, capacitors C1, C2, C3, variable capacitance diodes D1, D2, amplifier 3, and voltage supply unit 7 as one pin electronics card. One pin electronics card is provided for each pin of the LCD driver.

The operation of automatic calibration of the frequency characteristic of such an apparatus will be described below. The switch SW is connected with the DUT 1 removed. The waveform generator 2 outputs a square wave signal. Then, the waveform measuring unit 4 measures the square wave signal that has passed through the resistor R1 and the amplifier 3. The variable capacitance diode D by which the CPU 5 obtains a desired frequency characteristic based on the measurement result.
The reverse bias values of 1 and D2 are obtained, and a digital value based on the reverse bias value is sent to the D / A converter 71. Also, the memory 6 stores the reverse bias value. The D / A converter 71 is
Convert digital value to voltage value. Then, the operational amplifier 72
Adds the voltage from the D / A converter 71 and the offset voltage. Here, an output voltage of -10 to -15V is obtained. This voltage is applied to the anode of the variable capacitance diode D2. The output voltage of the operational amplifier 72 is inverted by the inverting amplifier 73, and a voltage of +10 to +15 V is applied to the cathode of the variable capacitance diode D1. The variable capacitance diodes D1 and D2 each receive a reverse bias voltage and change their capacitance. The above operation is repeated to obtain a desired frequency characteristic. Then, the next time the frequency characteristic is calibrated, it is calibrated with a bias value that allows the desired frequency characteristic to be obtained from the memory 6. When the calibration is completed, the switch SW is opened, the DUT 1 is connected, and the waveform output from the DUT 1 is measured.

Next, the variable capacitance diode D at the time of measurement
The operations of 1 and D2 will be described. FIG. 2 is a diagram for explaining the operation of the variable capacitance diodes D1 and D2 during measurement.
For example, + 10V is applied to the cathode of the variable capacitance diode D1.
Is given, -10 V is given to the variable capacitance diode D2, and the frequency characteristic is calibrated. Then, the DC superimposed waveform is input to the resistor R1, and the attenuated waveforms before being input to the amplifier that amplifies the waveforms are waveforms A and B. Here, FIG. 3 shows the reverse bias voltage-capacitance characteristics of the variable capacitance diodes D1 and D2.

Since no reverse bias voltage of 10 V is applied to both the variable capacitance diodes D1 and D2 when no waveform is input, the capacitance is 17 pF as shown in FIG. The total capacity is 34 pF. When the waveform is input and becomes the waveform A, the capacitance of the variable capacitance diode D1 when the waveform A is 2V has a reverse bias voltage of 8V, and is 20 pF from FIG. The capacitance of the variable capacitance diode D2 is 15 pF as shown in FIG. 3 because the reverse bias voltage is 12V. Variable capacitance diode D
Since the total capacitance of 1 and D2 is 35 pF, the total capacitance hardly changes. Therefore, even if the DC superimposed waveform is input, the frequency characteristic does not deteriorate and the waveforms A and B are
A waveform with good frequency characteristics can be obtained as indicated by the solid line.

However, when the frequency characteristic is adjusted only by the variable capacitance diode D2, the waveforms A and B become as indicated by broken lines. In other words, the voltage change of the input waveform,
When the waveform of the variable capacitance diode D2 has the waveform A, the capacitance becomes smaller than when the frequency characteristic is adjusted, and the compensation becomes excessive. In the case of the waveform B, the capacitance of the variable capacitance diode D1 becomes large and the compensation becomes too small.

In this way, the variable capacitance diodes D1 and D
2, the CPU 5 obtains the reverse bias value based on the result measured by the waveform measuring unit 4. Then, the current supply unit 7 uses the reverse bias value from the CPU 5 as a voltage, and the variable capacitance diode D
Since it is supplied to 1 and D2, the frequency characteristic can be automatically calibrated. Further, since a positive voltage is applied to the cathode of the variable capacitance diode D1 and a negative voltage is applied to the anode of the variable capacitance diode D2, even if a DC superimposed waveform is input during measurement, the waveform is not deteriorated and the waveform is not deteriorated. Can be measured. Then, even when an overcurrent is input, the overcurrent flows through the variable capacitance diode D1 or the variable capacitance diode D2, so that it is not necessary to provide a protection circuit for the amplifier 3 against the overcurrent. Further, since the variable capacitance diode D1 protects the amplifier 3 from a positive overvoltage and the variable capacitance diode D2 protects the amplifier 3 from a negative overvoltage, it is not necessary to provide a protection circuit for the amplifier 3 against the overvoltage.

A block diagram showing a part of another embodiment is shown in FIG. The same parts as those in FIG. 1 are designated by the same reference numerals. In the figure, D3 is a first variable capacitance diode whose anode is connected to the ground potential point and whose cathode is connected to the other end of the resistor R1 via a capacitor C4. D4 is a second variable capacitance diode whose cathode is connected to the ground potential point and whose anode is connected to the other end of the resistor R1 via a capacitor C5. Here, the capacitors C4 and C5 cut the direct current component. Then, a positive voltage is applied from the voltage supply unit to the cathode of the variable capacitance diode D3 via the coil L1, and a negative voltage is applied to the anode of the variable capacitance diode D4 via the coil L2. Where coil L
AC components are cut off at 1 and L2.

By configuring the input portion of the waveform with such a structure, the same effect can be obtained. And the combination of the variable capacitance diode of the device of FIG. 1 and the variable capacitance diode of the device of FIG. 4 is also included in the present invention. For example, it is composed of a variable capacitance diode D1 and a variable capacitance diode D4. The present invention also includes a configuration in which the CPU includes the signal generating means and the reverse bias means.

The actual variable capacitance diodes D1 and D will be described below.
The relationship between the total input capacitance and the input voltage of 2 will be described. FIG. 5 is a diagram showing the relationship between the total input capacitance of the variable capacitance diodes D1 and D2 and the input voltage. In FIG, Vin is an input voltage input to the resistor R1, V _B is the reverse bias voltage applied to the variable capacitance diode, Ca is the input voltage Vin is an input capacitance of the variable capacitance diodes D1, D2 when the 0. Cb is the input capacitance of the variable capacitance diode D1 when the input voltage Vin is V, or the input voltage Vin
Is the input capacitance of the variable capacitance diode D2 when is −V. Cc is the input capacitance of the variable capacitance diode D2 when the input voltage Vin is V, or the input capacitance of the variable capacitance diode D1 when the input voltage Vin is -V.

When the input voltage Vin is 0, the total capacitance of the variable capacitance diodes D1 and D2 is 2Ca. And
Variable capacitance diode D1, when the input voltage Vin is ± V
The total input capacitance of D2 is Cb + Cc. Here, FIG.
As is clear from the above, when the input voltage Vin changes, the total capacitance is slightly different, but is almost the same. Further, if the range in which the input voltage Vin changes is reduced, the total amount of change in capacitance is reduced, and measurement with better frequency characteristics can be performed.

FIG. 6 shows the relationship between the input capacitance and the input voltage when the reverse bias voltage is different. The same parts as those in FIG. 5 are designated by the same reference numerals. Here, V ₁ <V ₂ <V ₃ (V ₁ , V
_2, V _3: having a relationship constant). As is apparent from the figure, when the reverse bias voltage increases, the total input capacitance of the variable capacitance diodes D1 and D2 hardly changes even if the input voltage Vin changes. Therefore, if the reverse bias voltage is set to a large value, even if the input voltage changes, measurement with better frequency characteristics can be performed.

As another embodiment, an example in which the present invention is applied to an IC tester will be shown below. FIG. 7 is a block diagram showing a first embodiment of an IC tester to which the present invention is applied. The same parts as those in FIG. 1 are designated by the same reference numerals. In the figure, 10
Is a digital function module (hereinafter abbreviated as DFC), which includes a timing generator, a pattern generator, a pattern memory, and a fail memory, and outputs various digital signals. Reference numeral 20 is a performance board that is attached during calibration and is electrically connected to the DFC 10. At the time of measurement, the performance board 20 is removed and replaced with a performance board to which an IC to be measured (hereinafter abbreviated as DUT) is connected. Reference numeral 30 denotes a pin electronics section, which is electrically connected to the performance board 20. Then, when measuring the DUT, signals are exchanged with the DUT. A multiplexer 40 selects a signal from the pin electronics section 30. Reference numeral 50 is a waveform digitizer (hereinafter abbreviated as WFD), which measures the waveform of the signal selected by the multiplexer 40. 60 is a digital signal processor (hereinafter D
(Abbreviated as SP), the signal measured by the WFD 50 is analyzed. A test system controller (hereinafter abbreviated as TSC) 70 controls the entire IC tester. A memory 80 stores the calibration value finally given to the D / A converter 33 by the TSC 70.

In the performance board 20, 21
Is a signal converter, which converts the digital signal from the DFC 10 into a large-amplitude signal having a good rising characteristic, and supplies it to each pin electronics section 30. Pin Electronics Department 3
In 0, 31 is a variable capacitor, which is composed of variable capacitance diodes D1 and D2 and capacitors C2 and C3 as in FIG. A driver 32 corresponds to the amplifier 3. A D / A conversion unit 33 receives a signal from the TSC 70 and applies a positive and negative reverse bias voltage to the variable capacitor 31. Here, the signal generation means is composed of the DFC 10 and the signal conversion section 21, and the reverse bias means is composed of the WFD 50, the DSP 60, the TSC 70 and the D / A conversion section 33.

The operation of such a device will be described below.
FIG. 8 is a flow chart showing the operation of the apparatus of FIG. FIG. 9 is a diagram for explaining the calibration operation. In FIG. 9, (a) shows the case where the variable capacitor 31 is undercompensated,
(B) is a case where the variable capacitor 31 is overcompensated.

The TSC 70 sends CH1 to the multiplexer 40.
The pin electronics section 30 of is selected. And
D / A converter 3 of pin electronics 30 of CH1
3 outputs the minimum positive and negative reverse bias voltage. Further, the DFC 10 is caused to output a digital signal, and the signal conversion unit 21 gives a signal to the pin electronics unit 30. And WFD50 is the pin electronics part 3
0, the signal through the multiplexer 40 is measured. DS
P60 is the amplitude EA and B at time A as shown in FIG.
Δ (= EA−EB) is calculated from the amplitude EB at the time point.

When EA> EB, that is,
In the case of (b), since the compensation is excessive, the capacity of the variable capacitor 31 must be increased. For that purpose, the capacitance is increased by decreasing the reverse bias voltage applied to the variable capacitance diode. However, the D / A converter 33
Since the minimum voltage value is given to the variable capacitor 31, it is impossible to increase the capacity any more. Therefore, the operator is notified that the calibration has failed. When EA <EB, the maximum positive and negative reverse bias voltage is output to the D / A converter 33 to the variable capacitor 31. Then, when EA <EB, that is, in the case of (a), the compensation is too small, so the capacity of the variable capacitor 31 must be reduced. For that purpose, contrary to the above, if the reverse bias voltage applied to the variable capacitance diode is increased, the capacitance becomes smaller. However, the D / A converter 33
Since the maximum voltage value is given to the variable capacitor 31, the capacitance cannot be further reduced. Therefore, the operator is notified that the calibration has failed. When EA> EB, the following operation is performed.

The TSC 70 outputs an intermediate voltage of the reverse bias voltage that the D / A converter 33 can output. And
The signal output from the pin electronics unit 30 is measured by the WFD 50 via the multiplexer 40, and the DSP 6
Δ is obtained by 0, and it is confirmed whether δ ≦ ± 1 (binary value of computer). When δ ≦ ± 1, the TSC 70 stores the intermediate voltage value as the calibration value. And δ ≦ ± 1
Otherwise, the TSC 70 determines whether the amplitude at the time points A and B is (a) or (b) in FIG.

When EA> EB, that is, in the case of (b), since the compensation is excessive, the capacitance of the capacitor 31 must be increased. Therefore, the D / A converter 3
The voltage value of 3 may be reduced. When EA <EB, that is, in the case of (a), the compensation is too small, so the capacitance of the capacitor 31 must be reduced. Therefore, the voltage value of the D / A converter 33 may be increased.

From the above, TSC1 is EA> EB
In the case of, the intermediate voltage value between the intermediate value of the voltages that can be output by the D / A converter 33 and the minimum voltage value is output. EA <EB
In the case of, the intermediate voltage value between the intermediate voltage value and the maximum voltage value that the D / A converter 33 can output is output. Then, each of the signals output from the pin electronics unit 30 is measured by the WFD 50 via the multiplexer 40,
Δ is obtained by the DSP 60, and it is confirmed whether δ ≦ ± 1. When δ ≦ ± 1, the TSC 70 stores the voltage value as a calibration value. When δ ≦ ± 1, TSC70 is A
Whether the amplitude between the time point and the time point B is (a) or (b) in FIG. 9 is obtained again. Then, a binary search is performed in the same manner as above.

The above binary search is performed until δ ≦ ± 1. The TSC 70 stores the reverse bias voltage value given to the variable capacitor 31. Then, the TSC 70 selects the pin electronics part 30 of CH2 by the multiplexer 40, applies the minimum voltage and the maximum voltage to the variable capacitor 31, and confirms whether or not the calibration fails. Then, the reverse bias voltage value given to the variable capacitor 31 is obtained by the binary search and stored. This operation is repeated up to the pin electronics section 30 of 256CH, and when the calibration for all the pin electronics sections 30 is completed, the calibration values for all the pin electronics sections 30, that is, the reverse bias voltage values are stored in the memory 80.

The following configuration is also conceivable. Figure 1
0 is a block diagram showing a second embodiment of an IC tester to which the present invention is applied. The same parts as those in FIG. 7 are designated by the same reference numerals. In the figure, reference numeral 51 denotes a D / A conversion unit that outputs two desired types of voltages. Reference numeral 52 denotes a comparator, which compares the signal output by the pin electronics unit 30 selected by the multiplexer 40 with the voltage output by the D / A conversion unit 51,
Output the comparison result. A DFC 61 stores the comparison result of the comparator 52 at a desired timing. here,
The reverse bias means includes D / A converters 33 and 51, a comparator 52, a DFC 61, and a TSC 70.

In the operation of such an apparatus, the multiplexer 40 selects the pin electronics section 30 to be calibrated. Then, the digital signal is input from the DFC 10 to the pin electronics section 30 via the signal conversion section 21. The comparator 52 has a pin electronics section 30.
And the voltage output by the D / A converter 51 are compared. The DFC 61 stores the comparison result of the comparator 52. The TSC 70 determines whether to increase or decrease the voltage output by the D / A conversion unit 33 based on the comparison result stored in the DFC 61. That is, when it is determined from the comparison result that the case is (a) in FIG. 9, the TSC 70 increases the voltage of the D / A conversion unit 33. Then, if it is determined to be the case of FIG. 9B, the TSC 70 reduces the voltage of the D / A conversion unit 33. The above operation is repeated until the signal output by the pin electronics section 30 is input between the two types of voltages output by the D / A conversion section 51. Then, again, the multiplexer 40 selects another pin electronics section 30 to perform the above operation. In this way, the frequency characteristics of the pin electronics section 30 are calibrated.

Further, the embodiment in which the present invention is applied to the IC tester is not limited to the above-mentioned one, and in the device of FIG. 10, the multiplexer 40 is not provided, but the D / A converter 51 and the comparator 52 are provided. The pin electronics section 30 may be provided for each of the pin electronics sections 30, and the outputs from all the comparators 52 may be received by the DFC 61. Although an example in which the present invention is applied to an IC tester is shown, the present invention may be applied to an oscilloscope.

[0034]

According to the present invention, since the reverse bias value obtained by the measurement calculation means is applied to the variable capacitance diode by the voltage supply means, the frequency characteristic can be automatically calibrated. Since the first variable capacitance diode and the second variable capacitance diode that change the capacitance according to the voltage are provided, the waveform can be measured without deteriorating the frequency characteristic even when the DC superimposed waveform is input at the time of measurement. The effect is that it can be done.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

[FIG. 2] Variable capacitance diodes D1 and D2 during measurement
FIG. 7 is a diagram illustrating the operation of FIG.

FIG. 3 is a diagram showing reverse bias voltage-capacitance characteristics of variable capacitance diodes D1 and D2.

FIG. 4 is a configuration diagram showing a part of another embodiment of the present invention.

FIG. 5 is a diagram showing a relationship between a total input capacitance of variable capacitance diodes D1 and D2 and an input voltage.

FIG. 6 is a diagram showing a relationship between input capacitance and input voltage when reverse bias voltages are different.

FIG. 7 is a configuration diagram showing a first embodiment of an IC tester to which the present invention is applied.

8 is a flowchart showing the operation of the apparatus of FIG.

FIG. 9 is a diagram illustrating a calibration operation.

FIG. 10 is a configuration diagram showing a second embodiment of an IC tester to which the present invention has been applied.

[Explanation of symbols]

 1 Object to be Measured 4 Waveform Measuring Section 5 CPU 7 Voltage Supply Section R1, R2 Resistance C1 Capacitor D1, D2 Variable Capacitance Diode 10, 61 DFC 21 Signal Converter 31 Variable Capacitor 32 Driver 33, 51 D / A Converter 50 WFD 52 Comparator 60 DSP 70 TSC

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shigeru Numazawa 2-932 Nakamachi, Musashino City, Tokyo Yokogawa Electric Co., Ltd. (72) Hideo Doi 2-932 Nakamachi, Musashino City, Tokyo Horizontal Kawa Electric Co., Ltd. (72) Inventor Kenji Uda 2-932 Nakamachi, Musashino City, Tokyo Yokogawa Electric Co., Ltd. (72) Inventor Muneo Ishibachi 2-39 Nakamachi, Musashino City, Tokyo Yokogawa Electric Co., Ltd.

Claims (2)

[Claims] 1. A measuring device for measuring a waveform signal from an object to be measured, comprising: a signal generating means for generating a waveform signal; and a signal path for inputting a signal from the object to be measured and a ground potential point. A first variable capacitance diode provided, a second variable capacitance diode provided between a signal path for inputting a signal from the object to be measured and a ground potential point, and a waveform signal from a signal generating means during calibration. Reverse bias means for applying a desired reverse bias voltage to the first variable capacitance diode and the second variable capacitance diode based on the measurement result, which is measured through a signal path. A measuring device characterized in that a waveform signal from an object is input to a signal path. 2. The reverse bias means measures the waveform at different timings, and changes the reverse bias voltage applied to the first variable capacitance diode and the second variable capacitance diode according to the difference in the amplitude of the measured waveform. The measuring device according to claim 1, which is characterized in that: