JPH07105703B2 - Reset signal generation circuit - Google Patents

Description

The present invention relates to a reset signal generation circuit that generates a reset signal for resetting a microcomputer or the like, and is particularly suitable for IC (integrated circuit) implementation. In addition, the present invention relates to a reset signal generation circuit capable of reliably generating a reset signal even when the power is momentarily cut off.

(B) Conventional Technology Recently, microcomputers are used in various consumer devices. In order to operate the microcomputer normally, the microcomputer must be reset when the power is turned on or off, and the internal circuit must be reset once. By the way, the reset signal for applying a reset needs to be generated for a certain period when the power supply voltage of the microcomputer becomes sufficiently high, so it must be appropriately generated in relation to the power supply voltage of the microcomputer. . Then, as the reset signal generating circuit, for example, one described in the magazine "Transistor Technology" published on December 1, 1982, December 1982, advertisement feature page 43 is known. This reset signal generation circuit is shown in a simplified form as shown in FIG. 2, and includes a power supply terminal (1) to which a power supply voltage is applied, a constant voltage circuit (2) which generates a constant voltage from the power supply voltage, and A capacitor (3) charged by a power supply voltage, and the capacitor (3)
A comparison circuit (4) for comparing the terminal voltage of the
It is composed of a transistor (5) which generates a reset signal according to the output signal of the comparison circuit (4). Second
In the case of the figure, when the power is turned on, the charging of the capacitor (3) starts, but while the terminal voltage of the capacitor (3) is lower than the reference voltage, the output of the comparison circuit (4) becomes “H”, The transistor (5) is on. When the terminal voltage of the capacitor (3) rises according to the time constant determined by the resistor (6) and the capacitor (3) and becomes higher than the reference voltage, the output of the comparison circuit (4) becomes “L”, The transistor (5) is turned off. Therefore, when the power is turned on, a predetermined reset signal can be generated at the output terminal (7), and if the reset signal is applied to a microcomputer serving as a controlled circuit (not shown), the reset when the power is turned on can be performed. You can do it.

When the power supply is cut off, the electric charge accumulated in the capacitor (3) is discharged via the resistor (8). Therefore, the terminal voltage of the capacitor (3) is lowered to be equal to or lower than the reference voltage, the output of the comparison circuit (4) becomes "H", and the transistor (5) is turned on. Therefore, the reset signal can be generated even when the power is cut off, and the microcomputer can be reset.

(C) Problems to be Solved by the Invention However, the circuit of FIG. 2 has a drawback that the number of external connection terminals becomes large when integrated into an IC. That is,
The circuit of FIG. 2 has an external connection terminal for externally connecting the capacitor (3) for setting the width of the reset signal to a predetermined value to the input terminal of the comparison circuit (4), and the reset signal for the controlled circuit. It requires an external connection terminal for applying the voltage. Therefore, if the reset signal generating circuit of FIG. 2 is incorporated in the power supply IC having another function such as the muting function in addition to the reset function, there is a risk that the external connection terminals are insufficient.

In addition, the circuit of FIG. 2 has a drawback that the reset signal cannot be generated because it takes time to discharge the capacitor (3) when the power is momentarily cut off.

(D) Means for Solving the Problems The present invention has been made in view of the above points, and a capacitor connected to an output terminal from which a reset signal is obtained and the capacitor is charged with a first time constant. A first charging circuit, a constant voltage circuit, a reference voltage generation circuit, a first comparison circuit for comparing the output voltage of the constant voltage circuit with a first reference voltage of the reference voltage generation circuit, and the output terminal A second comparison circuit for comparing a voltage with a second reference voltage; a third comparison circuit for comparing the voltage of the output terminal with a third reference voltage; and an operation according to the output of the second comparison circuit, A second charging circuit that charges the capacitor with a second time constant and a discharging circuit that operates according to the outputs of the first and third comparison circuits and discharges the capacitor are provided.

(E) Operation According to the present invention, when the power supply is momentarily cut off, the discharge circuit operates to discharge the capacitor. Third
Since the operation is not stopped unless the voltage becomes equal to or lower than the reference voltage, it is possible to obtain a reset signal having a certain width even when the power is momentarily cut off.

(F) Embodiment FIG. 1 shows an embodiment of the present invention, (9) is a power supply terminal to which a power supply voltage is applied, (10) is a constant voltage circuit for obtaining a constant voltage from the power supply voltage, (11) consists of first, second and third resistors (12), (13) and (14),
Second and third reference voltages V ₁ , V ₂ and V ₃ (where V ₁ > V ₂
> V ₃ ) reference voltage generation circuit, (15) an output terminal from which a reset signal (level V ₀ ) is obtained, (16) a capacitor connected to the output terminal (15), and (17) a power supply The voltage V ₄ obtained at the output terminal (18) causes the capacitor (1
Charging resistor (first charging circuit) that charges 6) with the first time constant T ₁ , (19) is an inverter (20) and a current mirror circuit (2
1) and a second charging circuit for charging the capacitor (16) with a second time constant T ₂ shorter than the first time constant T ₁ , and (22) a flip-flop circuit (23) and an inverter. A discharge circuit including (24) and a discharge transistor (25) for discharging the capacitor (16); (26) a resistor (27) and () for dividing the output voltage V ₄ of the constant voltage circuit (10). 2
A voltage dividing circuit comprising (8), (29) compares the first reference voltage V ₁ with the output voltage V _{5 of the} voltage dividing circuit (26), and controls the flip-flop circuit (23) by the output signal. A first comparator circuit (30) for comparing the second reference voltage V ₂ with a voltage V ₀ of the output terminal (15), and a _second comparator circuit (19) for driving the second charging circuit (19) by the output signal thereof. Comparing circuits and (31) are a third comparing circuit which compares the third reference voltage V ₃ with the voltage V ₀ of the output terminal (15) and controls the flip-flop circuit (23).

Next, the operation will be described. When the power is turned on at time t ₀ , first, the first, second, and third reference voltages V ₁ , V _2, and V ₃ are generated from the reference voltage generation circuit (11), and the first, second, and third reference voltages are generated, respectively. It is applied to the negative input terminals of the three comparison circuits (29), (30), and (31). On the other hand, immediately after the power is turned on, the output voltage V ₄ of the constant voltage circuit (10) is still low and the output voltage V _{5 of the} voltage dividing circuit (26) has a relationship of V ₅ <V ₁ , so the first comparison circuit (2
The output of 9) is "L". Also, the capacitor (1
If 6) is in a completely discharged state, the voltage V ₀ of the output terminal (15) has a relationship of V ₀ <V ₃ , so the output of the third comparison circuit (31) is also “L”. . Therefore, the output of the flip-flop circuit (23) is “L” and the inverter (2
The output of 4) is "H", and the discharge transistor (2
5) is turned on. Furthermore, since the voltage V ₀ of the output terminal (15) is V ₀ <V ₂ , the output of the second comparison circuit (30) is also “L”, and the second charging circuit (19) does not operate. It has stopped.

When the output voltage V _{4 of the} constant voltage circuit (10) reaches a predetermined value at time t ₁ , the output voltage V _{5 of the} voltage dividing circuit (26) becomes V ₅ > V ₁ , and the first comparison circuit (29 ) Output becomes "H". Since the "H" signal is applied to the flip-flop circuit (23), the output of the flip-flop circuit (23) becomes "H" and the output of the inverter (24) becomes "L". (25) is turned off. Therefore, charging of the capacitor (16) by the charging resistor (17) is started, and the voltage V ₀ of the output terminal (15) is the first time constant T determined by the charging resistor (17) and the capacitor (16). Increases gradually according to ₁ .

At time t ₂ , when the voltage V ₀ of the output terminal (15) becomes V ₀ > V ₃ , the output of the third comparison circuit (31) becomes “H”, which is applied to the flip-flop circuit (23). Discharge circuit
The state of (22) does not change, and the discharge transistor (25) remains off. At time t ₃ , the voltage V ₀ of the output terminal (15)
Becomes V ₀ > V ₂ , the output of the second comparison circuit (30) becomes “H”.
The second charging circuit (19) is activated and the capacitor (1
6) is rapidly charged with time constant T ₂ . Therefore, the output terminal (1
The voltage V _{0 of} 5) rises rapidly to “H”. Note that time t
During the period up to _3, the voltage V ₀ of the output terminal (15) is “L”, which corresponds to the reset period. By the time the voltage V ₀ of the output terminal (15) becomes “H”, the power supply voltage becomes a predetermined value, the output voltage V ₄ of the constant voltage circuit (10) becomes a constant voltage, and the constant voltage becomes the power supply. A controlled circuit (not shown) to which the reset signal is applied as an operating voltage from the output terminal (18)
Is supplied to.

Next, the operation when the power is cut off will be described. When the power is cut off,
First, the output voltage V _{4 of the} constant voltage circuit (10) decreases, and at time t ₄ , the output voltage V _{5 of the} voltage dividing circuit (26) becomes V ₅ <V ₁ . For that reason,
The output of the first comparison circuit (29) becomes "L", the output of the flip-flop circuit (23) becomes "L", and the discharge transistor (25) is turned on. The discharge transistor (25)
When is turned on, discharge of the capacitor (16) is started, and the voltage V ₀ of the output terminal (15) decreases. Output terminal (15)
When the voltage V ₀ becomes V ₀ <V ₂ , the output of the second comparison circuit (30) becomes “L” and the operation of the second charging circuit (19) is stopped.
When the voltage of the output terminal (15) further decreases and V ₀ <V ₃ , the output of the third comparison circuit (31) becomes “L”, and the “L” output is applied to the flip-flop circuit (23). To be done. Even if the "L" output of the third comparison circuit (31) is applied to the flip-flop circuit (23), the state of the flip-flop circuit (31) does not change and the discharge transistor (25) is in the on state. Keep Therefore, when the power is cut off,
The capacitor (16) is discharged, and the circuit of FIG. 1 returns to the initial state.

Next, the momentary power-off will be described. In the steady state, that is, when the output voltage V _{4 of the} constant voltage circuit (10) becomes a constant voltage and the output terminal (15) outputs “H”, if the power is instantaneously cut off, the instantaneous cutoff is performed. As a result, the output voltage V ₄ of the constant voltage circuit (10) decreases, the output voltage V _{5 of the} voltage dividing circuit (26) becomes V ₅ <V _{1 at} time t _5, and the output of the first comparison circuit (29) becomes “ Then, the discharge transistor (25) is turned on to start discharging the capacitor (16). Therefore, the voltage V ₀ of the output terminal (15) decreases according to the discharge of the capacitor (16). For instantaneous cutoff, the output voltage V ₄ of the constant voltage circuit (10) to rise again after a short time, since exceeding the predetermined value at time t _6, the output voltage of the time t ₆ binary divider circuit (26) V ₅ becomes V ₅ > V ₁ , and the output of the first comparison circuit (29) becomes “H”. However, at that time, the capacitor (16) has not been sufficiently discharged, the voltage V ₀ of the output terminal (15) is V ₀ > V ₁ , and the output of the third comparison circuit (31) is “H”. , The flip-flop circuit (23) is not inverted and the discharge transistor (2
5) stays on. Therefore, constant voltage circuit (10)
The discharge of the capacitor (16) is continued even when the output voltage V ₄ of the second output circuit is restored, and the outputs of the second and third comparison circuits (30) and (31) are output according to the decrease of the voltage V ₀ of the output terminal (15). Are turned off sequentially. When the output of the second comparison circuit (30) becomes “L”,
When the operation of the second charging circuit (19) is stopped and the output of the third comparison circuit (31) becomes "L", the flip-flop circuit (23) is inverted and the discharge transistor (25) is turned off. As a result, the capacitor (16) is charged again and the time
At t ₇ , the voltage V ₀ of the output terminal (15) becomes V ₀ > V ₃ and the output of the third comparison circuit (31) becomes “H”, and at time t ₈ , the voltage of the output terminal (15) is further increased. When V ₀ becomes V ₀ > V ₂ , the output of the second comparison circuit (30) becomes “H”, the second charging circuit (19) operates, the capacitor (16) is rapidly charged again, and the output terminal (15) becomes "H", and it becomes a steady state.

Therefore, by disposing the third comparison circuit (31), the reset signal can be reliably generated even when the power is momentarily shut off.

FIG. 3 shows the power supply voltage V ₄ (FIG. 3 (a)) for the controlled circuit obtained at the power output terminal (18) and the voltage (reset signal) V ₀ (at reset signal) obtained at the output terminal (15). FIG. 3 is a characteristic diagram showing a relationship with FIG. When the power is turned on at time t ₀ ,
When the power supply voltage V ₄ rises and the voltage V ₅ obtained by dividing the power supply voltage V ₄ at time t ₁ becomes V ₅ > V ₁ , the discharge circuit (2
2) becomes inoperative and the capacitor (1
The charging of 6) is started, and at time t ₃ , the output terminal (15)
Voltage V ₀ becomes V ₀ > V ₂ and the second charging circuit (19) operates. Therefore, in the range A, the output terminal (15) becomes "L", and the reset state is set.

Further, when the power supply is cut off at time t ₄ , the power supply voltage V ₄ drops, V ₅ <V ₁ , the discharge circuit (22) operates, the capacitor (16) is discharged, and the output terminal (15 ) Voltage V ₀ decreases. Therefore, even in the range B, the output terminal (15)
Becomes "L", and the reset state is set.

Furthermore, when the power supply voltage V ₄ is momentarily cut off and V ₅ <V ₁ at time t ₅ , the discharge circuit (22) operates and the discharge of the capacitor (16) is started. For instantaneous cutoff, the capacitor (1
The power supply voltage returns to the original value at time t ₆ before the discharge of 6) is not sufficiently performed, but the operation of the discharge circuit (22) is stopped because the output of the third comparison circuit (31) is “H”. Instead, the capacitor (16) is continuously discharged. When time elapses and the capacitor (16) is sufficiently discharged and the voltage V ₀ of the output terminal (15) becomes V ₀ <V ₃ , the third comparison circuit (3
The output of 1) becomes "L" and the discharge circuit (22) stops operating, so that the charging of the capacitor (16) is started again. Then, at time t ₈ , the voltage V ₀ of the output terminal (15) becomes V ₀ > V ₂
Then, the second charging circuit (19) is activated and the capacitor (16) is rapidly charged. Therefore, even in the range C, the output terminal (15) surely becomes "L", and the reset state is set.

(G) Effect of the Invention As described above, according to the present invention, it is possible to provide a reset signal generation circuit capable of reliably generating a reset signal at the time of power-on, power-off, and momentary power-off. In particular, even when the power is momentarily cut off, the width of the reset signal can be set to a predetermined value or more, so that the controlled circuit does not malfunction. Further, according to the present invention, since the configuration is such that the capacitor is connected to the output terminal from which the reset signal is obtained, there is an advantage that the number of terminals can be reduced when integrated into an IC.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional reset signal generating circuit, and FIGS. 3 (a) and 3 (b) are for explaining the present invention. FIG. Description of main figure numbers (10) …… Constant voltage circuit, (11) …… Reference voltage generation circuit,
(15) …… Output terminal, (16) …… Capacitor, (17)…
… Charge resistance, (19) …… Second charge circuit, (22) …… Discharge circuit, (29) (30) (31) …… Comparison circuit.

Claims (1)

[Claims] 1. A circuit for generating a reset signal applied to a controlled circuit, comprising: a first reference voltage according to a power supply voltage; a second reference voltage smaller than the first reference voltage; A reference voltage generating circuit for generating a third reference voltage smaller than two reference voltages; a constant voltage circuit for generating a constant voltage from the power supply voltage; a capacitor for charging and discharging the output of the constant voltage circuit; A discharge circuit for discharging electric charge, a first comparison circuit for comparing the first reference voltage and the constant voltage, a third comparison circuit for comparing the third reference voltage and the terminal voltage of the capacitor, and each input An RS flip-flop circuit that is connected to the outputs of the first and third comparison circuits and controls the operation of the discharge circuit according to the output voltages of the first and third comparison circuits, and the capacitor according to the first time constant. First to charge A charging circuit, a second charging in accordance with the second time constant of the capacitor becomes smaller than said first time constant
A charging circuit is compared with the second reference voltage and the terminal voltage of the capacitor, and the terminal voltage of the capacitor is compared with the second voltage.
A second comparison circuit that inhibits the operation of the second charging circuit when the voltage is lower than a reference voltage, and permits the operation of the second charging circuit when the terminal voltage of the capacitor is higher than the second reference voltage; A reset signal generating circuit, which outputs a signal for releasing or resetting the controlled circuit from one end of a capacitor.