JPS57201923A - Reset circuit - Google Patents
Reset circuitInfo
- Publication number
- JPS57201923A JPS57201923A JP56087790A JP8779081A JPS57201923A JP S57201923 A JPS57201923 A JP S57201923A JP 56087790 A JP56087790 A JP 56087790A JP 8779081 A JP8779081 A JP 8779081A JP S57201923 A JPS57201923 A JP S57201923A
- Authority
- JP
- Japan
- Prior art keywords
- output
- reset
- circuit
- fet9
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To precisely operate an electronic device to be driven by providing a circuit with trigger and delay functions to an output part of a reset circuit driving part. CONSTITUTION:A serially connected elements consisting of a Zener diode 7 and a resistance 8 constitutes a circuit detecting the voltage drop of an electric power source terminal 2. When the voltage of the electric power source terminal 2 drops temporally, an RS flip-flop 6 is set up by the output change of a power voltage drop detecting circuit, the output A is turned to the low level and enhancement type FET9 is connected, so that the electric charge of a capacitor C is dischared through the connected FET9, the output voltage of an output terminal 5 drops to threshold voltage level of below and a microcomputer is reset. Simultaneously, the RS flip-flop is reset, the enhancement type FET9 is interrupted and th capacitor 3 is charged again through a depression type FET1. When the output voltage exceeds the threshold voltage level, the reset of the RS flip-flop is released.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56087790A JPS57201923A (en) | 1981-06-05 | 1981-06-05 | Reset circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56087790A JPS57201923A (en) | 1981-06-05 | 1981-06-05 | Reset circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57201923A true JPS57201923A (en) | 1982-12-10 |
Family
ID=13924770
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56087790A Pending JPS57201923A (en) | 1981-06-05 | 1981-06-05 | Reset circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57201923A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6195614A (en) * | 1984-10-16 | 1986-05-14 | Sanyo Electric Co Ltd | Reset signal generating circuit |
-
1981
- 1981-06-05 JP JP56087790A patent/JPS57201923A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6195614A (en) * | 1984-10-16 | 1986-05-14 | Sanyo Electric Co Ltd | Reset signal generating circuit |
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