JPH07105369B2 - Wafer polishing method and polishing apparatus - Google Patents

Wafer polishing method and polishing apparatus

Info

Publication number
JPH07105369B2
JPH07105369B2 JP14108990A JP14108990A JPH07105369B2 JP H07105369 B2 JPH07105369 B2 JP H07105369B2 JP 14108990 A JP14108990 A JP 14108990A JP 14108990 A JP14108990 A JP 14108990A JP H07105369 B2 JPH07105369 B2 JP H07105369B2
Authority
JP
Japan
Prior art keywords
polishing
wafer
wafer polishing
load
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP14108990A
Other languages
Japanese (ja)
Other versions
JPH0433336A (en
Inventor
哲也 上田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP14108990A priority Critical patent/JPH07105369B2/en
Publication of JPH0433336A publication Critical patent/JPH0433336A/en
Publication of JPH07105369B2 publication Critical patent/JPH07105369B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 産業上の利用分野 本発明はウエハーの研磨方法及び研磨装置に関し、更に
詳述するとウエハー研磨、もしくは凸凹表面を有する基
板を平坦化するための半導体製造プロセスと製造装置で
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for polishing a wafer, and more particularly to a semiconductor manufacturing process and apparatus for polishing a wafer or planarizing a substrate having an uneven surface. is there.

従来の技術 近年のULSIの超微細化に伴い、多層配線における微細配
線加工技術では信頼性のある配線を形成するためには、
より平坦な下地形状が求められている。一般的には、2
層目以降の絶縁膜の平坦化プロセスではSOG(スピンオ
ングラス)塗布法や、レジストエッチバック法等が用い
られているが、これらの方法では欠点も多い。SOG塗布
法ではSOG自体の膜質の耐水性の弱さや完全なフラット
にならないという問題点があり、レジストエッチバック
法ではプロセスの複雑化と低スループットといった問題
点がある。この問題を解決する1手段として平坦化する
ために直接ウエハーを切削する研磨法がある。
Conventional technology With the ultra miniaturization of ULSI in recent years, in order to form a reliable wiring with the fine wiring processing technology in multilayer wiring,
A flatter base shape is required. Generally, 2
The SOG (spin-on-glass) coating method and the resist etch back method are used in the flattening process of the insulating film after the layer, but these methods have many drawbacks. The SOG coating method has a problem that the film quality of SOG itself is weak in water resistance and does not become completely flat, and the resist etch back method has problems such as complicated process and low throughput. As one means for solving this problem, there is a polishing method in which a wafer is directly cut for flattening.

発明が解決しようとする課題 実際に研磨技術は従来より存在したが、絶縁膜の平坦化
工程で必要とされる1μmより高い精度での加工は極め
て困難であるという問題点があった。本発明は上記問題
点を鑑み、凹凸を有する基板の完全平坦化が精密に、高
速かつ容易に出来るウエハーの研磨方法及び研磨装置を
提供することを目的とする。
Problems to be Solved by the Invention Although polishing techniques have actually existed in the past, there has been a problem that it is extremely difficult to process with an accuracy higher than 1 μm, which is required in the flattening step of the insulating film. In view of the above problems, it is an object of the present invention to provide a wafer polishing method and a polishing apparatus capable of precisely, rapidly and easily completely flattening a substrate having irregularities.

課題を解決するための手段 本発明は、上述の課題を解決するため、凹凸を有する基
板上に特定の元素、特定の色素または特定の化学物質を
含む有機レジストもしくはシリカガラスを回転塗布する
工程と、前記基板表面を研磨器表面に密着させ、研磨液
を用いて研磨する工程と、研磨排液を分析して前記元
素,色素,化学物質を検出もしくは分析する工程を含
み、この検出、分析によって研磨終了点を判断するこ
と、及び前記研磨器の回転スピード,荷重圧力,荷重位
置を制御することを特徴とするウエハーの研磨方法であ
る。
Means for Solving the Problems The present invention, in order to solve the above problems, a step of spin-coating an organic resist or silica glass containing a specific element, a specific dye or a specific chemical substance on a substrate having irregularities, and A step of bringing the surface of the substrate into close contact with a surface of a polishing device and polishing with a polishing liquid, and a step of analyzing polishing effluent to detect or analyze the elements, dyes, and chemical substances. A method of polishing a wafer, which comprises determining a polishing end point, and controlling a rotation speed, a load pressure, and a load position of the polisher.

また本発明は、研磨台と、このウエハー研磨台に対向し
たウエハー研磨回転器と、前記ウエハー研磨台表面に研
磨液を塗布する為のノイズとで本体は構成され、研磨廃
液を検出し、分析するための装置が付随し、前記ウエハ
ー研磨回転器とウエハー研磨台の密着点において圧力を
不均一にかける機能と、前記研磨廃液を検出し、前記元
素,色素あるいは化学物質の濃度によって、前記圧力,
前記ウエハー研磨器の回転スピード,荷重圧力,荷重位
置にフィードバックをかけ研磨することを特徴としたウ
エハー研磨装置である。
Further, the present invention comprises a polishing table, a wafer polishing rotator facing the wafer polishing table, and noise for applying a polishing solution to the surface of the wafer polishing table, and the main body is configured to detect a polishing waste solution and analyze it. And a function for applying pressure unevenly at the contact points of the wafer polishing rotator and wafer polishing table, and detecting the polishing waste liquid, and adjusting the pressure depending on the concentration of the element, dye or chemical substance. ,
The wafer polishing apparatus is characterized in that the wafer is polished by feeding back the rotational speed, load pressure, and load position of the wafer polisher.

作用 上記の研磨方法及び研磨装置により、ULSIにおける凹凸
を有するの完全平坦化が精密に、高速かつ容易に出来
る。
Action With the above polishing method and polishing apparatus, the complete flattening of the ULSI surface having irregularities can be performed accurately, at high speed, and easily.

実施例 (実施例1) 本発明を実施例に基づき図面を追って説明する。まず本
発明に用いた装置の概略図について示す。第1図は本発
明の研磨システムブロックダイアグラムを示す。10は回
転機構を有する研磨回転器、11は基板(試料)を設置す
ることのできる研磨台であり、本体は大きく主にこの2
つから構成されている。又、研磨台11下部から研磨廃液
を採取できるようになっており、廃液検出装置12にて分
析が可能となっている。また本装置の特徴として廃液検
出装置12出力の電気信号を研磨回転器10にフィードバッ
クをかけることができ、廃液に含まれる特定の物質の濃
度を検出する事により研磨回転機10の制動と、回転スピ
ード,加重,加重位置を自由に変化させることができ
る。
Embodiments (Embodiment 1) The present invention will be described based on embodiments with reference to the drawings. First, a schematic view of the apparatus used in the present invention will be shown. FIG. 1 shows a block diagram of the polishing system of the present invention. 10 is a polishing rotator having a rotating mechanism, 11 is a polishing table on which a substrate (sample) can be placed, and the main body is mainly 2
It is composed of two. Further, the polishing waste liquid can be collected from the lower portion of the polishing table 11 and can be analyzed by the waste liquid detecting device 12. Further, as a feature of this device, the electric signal of the output of the waste liquid detection device 12 can be fed back to the polishing rotator 10, and the polishing rotator 10 can be braked and rotated by detecting the concentration of a specific substance contained in the waste liquid. The speed, weight, and weight position can be changed freely.

第2図は研磨台本体の斜視図である。研磨台11には6〜
8インチ基板13が吸引設置可能となっている。研磨台11
の上部には研磨台11と平行に研磨回転機10があり、基板
13の上面を正確にフィッティングできるように固定され
る。また研磨台11の上部側面には研磨液を任意に一定
量、噴出できるノズル14があり、多種の研磨液を流すこ
とができる。
FIG. 2 is a perspective view of the polishing table body. 6 to the polishing table 11
The 8-inch substrate 13 can be installed by suction. Polishing table 11
There is a polishing rotary machine 10 parallel to the polishing table 11 at the top of the
It is fixed so that the upper surface of 13 can be fitted accurately. Further, the upper surface of the polishing table 11 is provided with a nozzle 14 capable of jetting a predetermined amount of polishing liquid, so that various polishing liquids can be flowed.

研磨回転器12は精密な回転機構を有すると共に、第2図
中に示されるA,B,C,Dの4方向寄りに荷重をかけること
可能である。この加重のかかり方を第3図に示す。同図
は6インチウエハー13の表面であり、A,B,C,Dの4点に
任意一定量の荷重をかけることができ、削りむらを電気
的にコントロールできる。
The polishing rotator 12 has a precise rotation mechanism and can apply a load to four directions A, B, C and D shown in FIG. FIG. 3 shows how this weight is applied. The figure shows the surface of the 6-inch wafer 13, and it is possible to apply an arbitrary fixed amount of load to the four points A, B, C, and D, and electrically control the unevenness of shaving.

(実施例2) 本発明の実施例2として、凸凹表面を持つ基板表面を実
際に平坦化するプロセスを示す。特に本実施例では平坦
化プロセスを層間絶縁膜に適用した例を示す。第4図を
用いて平坦化が行われる過程を順を追って説明する。
(Example 2) As Example 2 of the present invention, a process of actually flattening a substrate surface having an uneven surface will be described. In particular, this embodiment shows an example in which the planarization process is applied to the interlayer insulating film. The process of flattening will be described step by step with reference to FIG.

同図(a)は6インチSi基板41に熱酸化膜42を形成し、
Al配線(Al膜厚0.8μm)43をフォトリソグラフィーと
ドライエッチング技術を用いて形成し、層間絶縁膜とし
てプラズマCVD法によるTESO(テトラエトキシシラン)
を用いたSiO2膜44を2.4μm堆積する。この状態では、A
L配線43厚さのだけ、SiO2膜44上には凹凸ができる。同
図(b)は上記の構成に加えて平坦化の為のダミーレジ
スト45を回転塗布したところである。このレジストには
終点検出用及び、回転研磨器制御用の色素(ジアゾ化合
物)が含まれている。
In the same figure (a), a thermal oxide film 42 is formed on a 6-inch Si substrate 41,
Al wiring (Al film thickness 0.8 μm) 43 is formed by using photolithography and dry etching technology, and TESO (tetraethoxysilane) is formed by plasma CVD as an interlayer insulating film.
SiO 2 film 44 is deposited by 2.4 μm. In this state, A
As much as the thickness of the L wiring 43, irregularities are formed on the SiO 2 film 44. In FIG. 6B, a dummy resist 45 for flattening is spin-coated in addition to the above structure. This resist contains a dye (diazo compound) for detecting the end point and controlling the rotary polisher.

同図(c)は研磨の過程図を示し、同図(d)は平坦化
が完了した最終状態を示す。
The figure (c) shows a process diagram of polishing, and the figure (d) shows the final state where the planarization is completed.

研磨工程が行われる過程の詳細を第5図に示す。第5図
(a)は研磨廃液内にある特定色素の濃度(ここではジ
アゾ化合物)、同図(b)は回転研磨器の荷重の大きさ
を示し、それぞれの横軸には現在荷重のかかっているポ
イント(A,B,C,D)即ち、時間軸を示す。この実施例で
はA,B,C,Dの点(第3図山参照)を中心として順番に荷
重がかかるようにプログラムされている。
FIG. 5 shows details of the process in which the polishing process is performed. FIG. 5 (a) shows the concentration of the specific dye (here, diazo compound) in the polishing waste liquid, and FIG. 5 (b) shows the magnitude of the load of the rotary polisher. Each horizontal axis shows the current load. Points (A, B, C, D), that is, the time axis. In this embodiment, it is programmed that loads are applied in order around the points A, B, C and D (see the mountain in FIG. 3).

先ず、均等に研磨回転器10に荷重がかかるようにして研
磨レジスト45のみを削り落とす。SiO2膜44の表面が出て
きたところで(第4図(c)参照)、レジスト45の削ら
れる割合が少なくなるためレジスト内より検出される色
素が急激に減少する(図中(イ)で示される)。この段
階で荷重の大きさを減らし、均等に荷重をかける方法か
ら、荷重を変位的にかける方法にかえる。この時A,B,C,
Dに荷重のかかる時間は30秒であり、30秒の間に流れた
研磨廃液の色素の量を定量する(図中(ロ)で示され
る)。この定量した結果を2回目にA,B,C,Dに荷重がか
かる大きさにフィードバックをかけ、色素の濃度が濃い
ポイントほど荷重をより多くかけるようにプログラミン
グしておく。この操作を研磨廃液内の色素が検出されな
くなるまで続けていけば、完全フラットな平面が達成さ
れる。この状態が第4図(d)である。
First, only the polishing resist 45 is scraped off so that a load is evenly applied to the polishing rotator 10. When the surface of the SiO2 film 44 comes out (see FIG. 4 (c)), the proportion of the resist 45 to be scraped decreases, so that the dye detected in the resist sharply decreases (shown by (a) in the figure). ). At this stage, the size of the load is reduced and the load is evenly applied, and the load is displaced. At this time A, B, C,
The time for applying a load to D is 30 seconds, and the amount of the dye in the polishing waste liquid flowing during 30 seconds is quantified (indicated by (B) in the figure). This quantified result is fed back to the magnitude of the load applied to A, B, C, and D for the second time, and programming is performed so that the load is increased as the concentration of the dye increases. If this operation is continued until no dye is detected in the polishing waste liquid, a completely flat surface is achieved. This state is shown in FIG. 4 (d).

なお、研磨剤のなかにはもちろんHF系のエッチング液を
混ぜることも可能であるし、基板に塗布する有機レジス
トの代わりに特定の元素、特定の色素または特定の化学
物質を含むシリカガラスを回転塗布しても良いことは言
うまでもない。更にこの技術は基板、トレンチ等の平坦
法としても広い応用範囲がある。
Of course, it is also possible to mix an HF-based etching solution in the polishing agent, and instead of the organic resist applied to the substrate, spin-coat silica glass containing a specific element, a specific dye or a specific chemical substance. It goes without saying that it is okay. Furthermore, this technique has a wide range of applications as a flattening method for substrates, trenches and the like.

発明の効果 以上の説明から明らかなように、本発明によれば、1.完
全平坦化ができる。2.工程がきわめて簡易になる。3.プ
ラズマを使用しない為、荷重粒子のダメージが無い。4.
エッチング量が多い為、処理スピードは速くなる(スル
ープット向上)。5.パターニン用マスクや下地形状に依
存しない平坦化ができる。
EFFECTS OF THE INVENTION As is clear from the above description, according to the present invention, 1. Complete flattening is possible. 2. The process is extremely simple. 3. Since plasma is not used, there is no damage of load particles. Four.
Since the etching amount is large, the processing speed is high (throughput is improved). 5. Flattening is possible without depending on the mask for patterning or the underlying shape.

【図面の簡単な説明】[Brief description of drawings]

第1図は研磨システムのブロック図、第2図は研磨器本
体の斜視図、第3図は6インチウエハー表面図、第4図
は平坦化が行われる工程図、第5図は研磨工程が行われ
る過程の詳細図である。 10……研磨回転器、11……研磨台、12……廃液検出装
置、13……基板、14……ノズル、41……6インチ基板、
42……熱酸化膜、43……AL配線、44……SiO2膜、45……
レジスト。
FIG. 1 is a block diagram of a polishing system, FIG. 2 is a perspective view of a polisher main body, FIG. 3 is a surface view of a 6-inch wafer, FIG. 4 is a process diagram in which flattening is performed, and FIG. It is a detailed view of a process performed. 10 …… polishing rotator, 11 …… polishing table, 12 …… waste liquid detector, 13 …… substrate, 14 …… nozzle, 41 …… 6 inch substrate,
42 …… thermal oxide film, 43 …… AL wiring, 44 …… SiO2 film, 45 ……
Resist.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】凹凸を有する基板上に特定の元素、特定の
色素または特定の化学物質を含む有機レジストもしくは
シリカガラスを回転塗布する工程と、前記基板表面を研
磨器表面に密着させ、研磨液を用いて研磨する工程と、
研磨排液を分析して前記元素、色素、化学物質を検出も
しくは分析する工程とを有し、前記検出、分析により前
記研磨器の回転スピード、荷重圧力、荷重位置を制御す
ることを特徴とするウエハーの研磨方法。
1. A step of spin-coating an organic resist or silica glass containing a specific element, a specific dye or a specific chemical substance on a substrate having irregularities, and bringing the surface of the substrate into close contact with the surface of a polisher to obtain a polishing liquid. And a step of polishing with
And a step of detecting or analyzing the element, dye, or chemical substance by analyzing a polishing effluent, wherein the rotation speed, load pressure, and load position of the polisher are controlled by the detection and analysis. Wafer polishing method.
【請求項2】ウエハー研磨台と、前記ウエハー研磨台に
対向して設置されたウエハー研磨回転器と、前記ウエハ
ー研磨台上に研磨液を供給する手段と、研磨後の研磨排
液を検出、分析する手段と、前記ウエハー回転器と前記
ウエハー研磨台の密着点において圧力を不均一にかける
手段とを有し、前記研磨排液の検出、分析結果を基にし
て前記ウエハー研磨器の回転スピード、荷重圧力、荷重
位置を制御することを特徴とするウエハー研磨装置。
2. A wafer polishing table, a wafer polishing rotator installed so as to face the wafer polishing table, a means for supplying a polishing solution onto the wafer polishing table, and a polishing waste solution after polishing, A means for analyzing and a means for applying pressure non-uniformly at the contact point between the wafer rotator and the wafer polishing table, the rotation speed of the wafer polishing machine based on the detection of the polishing waste liquid and the analysis result. A wafer polishing apparatus characterized by controlling a load pressure, a load position and a load position.
JP14108990A 1990-05-29 1990-05-29 Wafer polishing method and polishing apparatus Expired - Fee Related JPH07105369B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14108990A JPH07105369B2 (en) 1990-05-29 1990-05-29 Wafer polishing method and polishing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14108990A JPH07105369B2 (en) 1990-05-29 1990-05-29 Wafer polishing method and polishing apparatus

Publications (2)

Publication Number Publication Date
JPH0433336A JPH0433336A (en) 1992-02-04
JPH07105369B2 true JPH07105369B2 (en) 1995-11-13

Family

ID=15283949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14108990A Expired - Fee Related JPH07105369B2 (en) 1990-05-29 1990-05-29 Wafer polishing method and polishing apparatus

Country Status (1)

Country Link
JP (1) JPH07105369B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2581478B2 (en) * 1995-01-13 1997-02-12 日本電気株式会社 Flat polishing machine
JP2845238B1 (en) * 1997-08-29 1999-01-13 日本電気株式会社 Flat polishing machine
US6093088A (en) * 1998-06-30 2000-07-25 Nec Corporation Surface polishing machine
JP4020097B2 (en) * 2004-05-11 2007-12-12 セイコーエプソン株式会社 Semiconductor chip, semiconductor device, manufacturing method thereof, and electronic device
JP5327588B2 (en) * 2008-09-02 2013-10-30 株式会社ニコン Polishing method and polishing apparatus

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4450652A (en) * 1981-09-04 1984-05-29 Monsanto Company Temperature control for wafer polishing
JPS58155169A (en) * 1982-03-11 1983-09-14 Nec Corp Polishing method of wafer
JP2541214B2 (en) * 1987-04-02 1996-10-09 ソニー株式会社 Method for manufacturing semiconductor device
JPH01136339A (en) * 1987-11-24 1989-05-29 Kurita Water Ind Ltd Cleaning apparatus

Also Published As

Publication number Publication date
JPH0433336A (en) 1992-02-04

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