JPH07105329B2 - Charged beam drawing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to charging for drawing a pattern of a semiconductor integrated circuit such as an LSI on a sample such as a mask or a wafer at high speed and with high accuracy. The present invention relates to a beam drawing method, and more particularly, to a charged beam drawing method that enables high-precision drawing by using drawing pattern data that is data-compressed.

(Prior Art) In recent years, LSI patterns have become finer and more complex, and an electron beam drawing apparatus has been used as an apparatus for forming such patterns. When a desired pattern is drawn by using this device, the design pattern data generated by an LSI design tool such as CAD cannot be used as the drawing data of the drawing device in the normal form. The reason is that the design data is generally represented by a polygon, but the data used for electron beam writing can only have a basic shape such as a trapezoid or a rectangle.

If there is an overlap between the figures, multiple exposure will occur and the drawing accuracy will deteriorate.

The data used for electron beam drawing needs to be divided into unit drawing areas in which drawing processing is performed.

It is due to that.

Therefore, the design pattern data is subjected to, for example, contouring processing to remove multiple exposure areas, and then divided into basic figures such as rectangles and trapezoids or drawing unit figures for each unit drawing area determined by the beam deflection area. Thus, the figure data is made acceptable for the electron beam drawing apparatus. By this step, drawing pattern data relating to the integrated circuit is generated and stored in the storage medium, the drawing pattern data is read out for each unit drawing area, and the beam deflecting means determines the beam position and the beam shape while decoding the data. The desired pattern is controlled and drawn.

However, this type of method has the following problems. Usually, LSI design pattern data created by a CAD system is stored in pattern data files 60 to 62 as shown in FIG. 7 (a), for example. In this figure, for convenience, the area surrounded by the solid line frame is expressed as one chip of the LSI, and the position of the chip where the data stored in each file corresponds is shown. That is,
The information stored in the pattern data file 60 is the pattern data file 6 as shown in FIGS.
It is composed of reference information indicating that the contents of 1,62 are actually repeated in the X direction and the Y direction, and design graphic information 60a to 60d as shown in FIG. Further, the pattern data file 61 has a file system in which design graphic information 61a as shown in FIG. 7 (e) is stored, and the pattern data file 62 stores design graphic information 62a, 62b as shown in FIG. 7 (f). . FIG. 7 (g) shows a design figure included in such pattern data files 60, 62, and 62, which is subjected to contouring processing to perform the above-described area division and figure division for drawing processing. It may become a drawing pattern, and a multiple exposure area typified by 63 in the drawing may occur. This is because the data to be stored in the pattern data files 61 and 62, that is, the design of the graphic is performed independently of the design stage for obtaining the graphic information 60a, to 60d. The occurrence of this multiple exposure area becomes a major factor in reducing the drawing accuracy, and significantly deteriorates the quality of the pattern.

To prevent this problem, the pattern data file
The design graphics included in 61 and 62 are pre-expanded into a pattern data file 60 as shown in FIG. 7 (g), and the pattern data file 60 may have a file system composed only of design graphic information without reference information. It suffices to obtain the drawing pattern without the multiple exposure area through the contouring process for the figure in the file. However, when the drawing pattern data is generated in such a process, the graphic information 61a, 62a
Data compression cannot be performed on repetitive patterns like a and 62b, resulting in a huge amount of data. Therefore, the capacity of the storage medium must be increased, and the data to be read in the unit drawing area must be transferred for a long time, which hinders efficient operation of the device and hinders improvement in throughput.

The problems as described above will become more and more important in the future due to the rapid progress of LSI and the miniaturization of patterns and the improvement of the degree of integration.
Further, the above problem is not limited to the electron beam drawing method, and the same applies to the ion beam drawing method for drawing a desired pattern on a sample using an ion beam.

(Problems to be Solved by the Invention) Conventionally, when the drawing pattern data is compressed based on the design pattern data of the LSI, multiple exposure portions of the pattern are generated and the pattern accuracy is deteriorated. On the contrary, if it is attempted to eliminate the multiple-exposure part of the pattern, there is a problem that the data compression becomes impossible and the data transfer time increases, so that the throughput decreases.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to draw drawing pattern data to be used for drawing processing in an electron beam drawing apparatus from LSI design pattern data stored in a plurality of pattern data files. It is an object of the present invention to provide a charged beam drawing method capable of performing data compression processing without generating a multiple-exposure region of a pattern when generating a pattern, and improving the drawing accuracy and the throughput.

[Structure of the Invention] (Means for Solving the Problem) The essence of the present invention is that design graphic groups included in a plurality of pattern data files forming LSI pattern data are superimposed on each other on coordinates representing a chip area. It is determined whether or not there is a superimposition portion, and when it is determined that there is a superimposition portion, the design figure group related to the superimposition portion is expanded to a higher-level file.

That is, the present invention generates drawing pattern data to be supplied to the charged beam drawing apparatus from design pattern data generated by an LSI design tool such as CAD, and creates a desired pattern on a sample based on the drawing pattern data. In the charged beam drawing method for drawing, a file including only design graphic information among pattern data files including the design pattern data is a lower file, and a file including reference information and graphic information of the lower file is an upper file. , It is determined whether or not the design figure included in the upper file and the lower file has a superimposition area on the coordinates indicating the entire LSI chip, and when it is determined that there is a superimposition area, the superimposition area is related to the superimposition area. Including the design figure group information of the part in the upper file and from the lower file A new upper file and a lower file are created, and a figure represented by the figure information of the newly created upper file and the lower file is made into a basic figure group that can be accepted by the charged beam drawing apparatus. The feature is that the drawing pattern data is generated by dividing.

(Operation) According to the present invention, when the drawing pattern data to be used for the drawing process is generated based on the design pattern data of the LSI,
It is possible to generate the drawing pattern data in which the data compression using the repetitive pattern of is effectively utilized and the multiple exposure area of the pattern is eliminated. As a result, it is possible to increase the operating rate of the charged particle beam drawing apparatus and improve the productivity of the LSI without deteriorating the pattern accuracy. Furthermore, the above-mentioned drawing method is expected to exert a more effective effect in the miniaturization and high integration of patterns accompanying the rapid progress of LSI in the future.

(Examples) The details of the present invention will be described below with reference to illustrated examples.

FIG. 1 is a schematic configuration diagram showing an electron beam drawing apparatus used in a method of an embodiment of the present invention. In the figure, 10 is a sample chamber, and a table 12 on which a sample 11 such as a semiconductor wafer is placed is accommodated in the sample chamber 10. The table 12 is driven by a table drive circuit 13 in the X direction (left and right direction on the paper surface) and the Y direction (front and back direction on the paper surface). And table 12
The moving position of is measured by the position circuit 14 using a laser length meter or the like.

An electron beam optical system 20 is arranged above the sample chamber 10. The optical system 20 includes an electron gun 21, various lenses 22 to 26, a blanking deflector 31, a beam size varying deflector 32, a beam scanning main deflector 33, a beam scanning sub-deflector 34, and a beam shaping device. It is composed of apertures 35 and 36. Then, the main deflector 33 positions it in a predetermined sub-deflection basin (subfield), the sub-deflector 34 positions the figure drawing position in the subfield, and the beam size varying deflector 32 and the shaping aperture 35. , 36 is used to control the beam shape, and while the table 12 is continuously moved in one direction, drawing processing is performed on a glacier area (frame) obtained by dividing the previous drawing area into strips. Further, the table 12 is step-moved in a direction orthogonal to the continuous movement direction, and the above processing is repeated to sequentially draw each frame area and draw the entire desired area.

On the other hand, a magnetic disk (storage medium) 41 is connected to the control computer 40, and the drawing pattern data of the LSI is stored in this disk 41. The drawing pattern data read from the magnetic disk 41 is temporarily stored in the pattern memory (data buffer unit) 42 for each frame area. The pattern data stored in the data buffer unit 42 for each frame area, that is, the frame information composed of the drawing position and the drawing figure data representing the basic figure, is converted by the pattern data decoder 43 and the drawing decoder 44, which are the data analyzing section. It is analyzed and sent to the blanking circuit 45, the beam shaper driver 46, the main deflector driver 47 and the sub deflector driver 48.

That is, the pattern data coder 43 creates blanking data from the figure based on the drawing pattern data, and sends the blanking data to the blanking circuit 45. Further, desired beam size data is created, and this beam size data is sent to the beam shaper driver 46. Then, a predetermined deflection signal is applied from the beam shaper driver 46 to the beam size varying deflector 32 of the optical system 20, whereby the size and shape of the electron beam are controlled.

In the drawing data decoder 44, subfield positioning data is created based on the drawing pattern data, and this data is sent to the main deflector driver 47. Then, from the main deflector driver 47 to the main deflector of the optical system 20.
A predetermined signal is applied to 33, whereby the electron beam is deflected and scanned to a designated subfield position. Further, the drawing data decoder 44 generates a control signal for sub-deflector scanning based on the drawing unit figure information generated by the pattern data decoder 43, and this signal is generated by the sub-deflector driver 48.
Sent to. Then, from the sub-deflector driver 48 to the sub-deflector
A predetermined sub-deflection signal is applied to 34, whereby drawing is performed for each sub-field.

Next, a process of generating drawing pattern data used for the drawing process as described above will be described. FIG. 2 is a schematic diagram showing a process of generating drawing pattern data for performing drawing processing,
FIG. 3 is a flow chart showing a data generation process, and FIG. 4 is a schematic diagram showing a graphic system related to this generation process.

The LSI pattern is usually designed by a CAD system, and, for example, design pattern data of the file system shown in FIGS. 7 (a) to 7 (f) is generated. Based on the design pattern data, the host computer processes the figure to generate drawing pattern data, and the drawing pattern data is used for the drawing process in the electron beam drawing apparatus.

Here, the design pattern data designed by the CAD system is a data system having a so-called hierarchical structure in which graphic data are stored in a number of files dispersed as shown in FIGS. 7 (a) to (f). Has become.

In order to make the design pattern data of such a format into a data format that can be accepted by the electron beam drawing apparatus, the host computer checks whether the patterns included in the file storing the design pattern data overlap each other.

First, as shown in FIG. 4 (a), design patterns 60a to 60d included in the pattern data file (upper file) 60 are included.
And whether the circumscribed rectangles of the design figure 61a included in the pattern data file (lower file) 61 overlap each other. If there is an overlapping area, the design figure 60a,
It is inspected whether ~, 60d and the design figure 61a overlap. When there is a design graphic superimposing portion as indicated by 63 in the figure, the design graphic 61a related to the superimposing portion is expanded into the pattern data file 60 and stored in the file 60. As a result, the design graphic information 60a, to 60h as shown in FIG.
Then, the design data relating to the pattern data file 60 is generated from the reference information of the pattern data file 61 processed as shown in FIG.

Next, as shown in FIG. 4 (d), the design figures 60a, to 60d of the pattern data file 60 and the pattern data file
The same processing as above is applied to the 62 design figures 62a and 62b. At this time, design graphics are used between the data files.
A circumscribed rectangular area including 62a and 62b and a design figure 60b (or
Although it overlaps with the circumscribed rectangular area including 60d), since the design figures do not overlap each other, the above-mentioned processing is unnecessary. Also, pattern data files 61, 6
As for No. 2, there is no overlapping portion in the circumscribed rectangular area of the design figure as shown in FIG. 4 (e), and the design data for each of these is retained in its original form.

In this way, all pattern data files 60, ..., 62 that compose the design pattern data representing the chip data of the LSI.
As a result, the pattern data file 60 is created using the reference information of the design figures 60a to 60h as shown in FIG. 4 (f) and the pattern data files 61, 62 as shown in FIG. 4 (g). To construct. Further, the pattern data file 61 including the design graphic 61a and the pattern data file 62 including the design graphics 62a and 62b are obtained.

The design pattern defined in the pattern data file thus obtained is subjected to graphic contouring in file units to eliminate multiple exposures, and as shown in FIG. To generate a group of figures,
The figure is divided along a line segment (vertical direction on the paper) parallel to the Y-axis passing through the vertex of the figure. Further, in order to make the basic figure group generated by the above processing steps into a frame area which is an area determined by the deflection width of the beam, area division is performed as shown in FIG. Is divided into sub-field units determined from the sub-deflection area. Here, each of the areas related to the design figure 61a and the design figures 62a and 62b having the pattern repeating structure is set as one sub-field, and the other basic figure groups are divided into sub-fields having the maximum sub-deflection area. To do.

As shown in FIG. 5A, the figures in the subfield are represented as drawing figure information composed of the type of figure, the beam irradiation amount, the position of the figure, and the figure size. The cell data and the supplementary time signal shown in FIG. Then, with respect to the repeating structure of the pattern, the number of repetitions and the pitch of the sub-field area represented by the cell data and the supplementary information are added to generate drawing pattern data which is data-compressed. By storing in the disk 41 and subjecting it to a drawing process, it is possible to draw as a unit drawing figure group which can be formed by a combination of the beam shaping apertures 35 and 36 shown in FIGS. 6 (a) to (c), for example.

Thus, according to the method of the present embodiment, a plurality of pattern data files 60, ...
It is determined whether or not the design figure groups included in 62 overlap each other on the coordinates representing the entire chip area, and if it is determined that there is an overlap section, the design figure group related to the overlap section is expanded in the upper file 60. As a result, it is possible to eliminate the multiple exposure unit and to compress the drawing pattern data. Therefore, it is possible to improve drawing accuracy and drawing throughput. Further, the device itself can be used as it is, and there is an advantage that it can be easily realized only by changing the drawing data creation process.

It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be carried out without departing from the scope of the invention. For example, the configuration of the electron beam drawing apparatus is not limited to that shown in FIG. 1 and can be appropriately changed according to use. Further, in the present embodiment, the electron beam is described as an example, but the beam is not limited to the electron beam and can be applied to charged beam drawing including an ion beam. Further, the drawing method may be a one-step changing method as well as a two-step changing method combining main and sub-deflection, and is applicable to a shot method using a variable shaped beam and a scanning method using a circular beam. is there.

[Effects of the Invention] As described in detail above, according to the present invention, there is no multiple exposure area that deteriorates the pattern accuracy of an LSI, and the repetitive structure of an LSI chip created by a CAD system is utilized to the maximum extent. The charged beam drawing apparatus is operated by the drawing pattern data subjected to the data compression, and it is possible to contribute to the improvement of the LSI productivity by improving the throughput and the apparatus operating rate without deteriorating the pattern accuracy.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing an electron beam drawing apparatus used in an embodiment method of the present invention, FIG. 2 is a schematic diagram showing a drawing pattern data generation process, and FIG. 3 is a flowchart showing a data generation process. FIG. 4 is a schematic diagram showing the figure division until the drawing pattern data is generated, FIG. 5 is a schematic diagram for explaining the structure of the drawing data, and FIG. 6 is a schematic diagram showing a unit figure used for drawing. , FIG. 7 is a schematic diagram for explaining a conventional technique. 10 ... Sample chamber, 11 ... Sample, 12 ... Table, 20 ... Electron optical system, 21 ... Electron gun, 22, ..., 26 ... Lens, 31, ...,
34 …… Deflector, 35,36 …… Beam shaping aperture, 40…
… Control computer, 41 …… Magnetic disk (storage medium), 42…
… Pattern memory (data buffer), 43 …… Pattern data decoder, 44 …… Drawing data decoder, 60 ……
Pattern data file (upper file), 61,62 ...
Pattern data file (lower file), 60a, ~, 60
h, 61a, 62a, 62b …… Designed figure.

Claims (6)

[Claims] 1. A charged beam drawing method for generating drawing pattern data for use in a charged beam drawing apparatus from LSI design pattern data, and drawing a desired pattern on a sample based on the drawn pattern data. Of the pattern data files containing data, the file containing only the design figure information is the lower file,
A file containing reference information and graphic information of the lower file is set as an upper file, and whether the design graphic included in the upper file and the lower file has a superposition area on the coordinates indicating the entire LSI chip is determined. If it is determined that there is a superposed area, the design figure group information of the part related to the superposed area is included in the upper file and is removed from the lower file to create a new upper file and a new lower file, and then newly created. A charged particle beam drawing method characterized in that a drawing pattern data is generated by dividing a figure represented by the figure information of the upper file and the lower file described above into a basic figure group acceptable for the charged beam drawing apparatus. . 2. As a step of determining the presence or absence of the overlapping area, it is determined whether virtual circumscribing rectangular areas including all design figures in the upper and lower files overlap each other, and then this overlapping is performed. The charged particle beam drawing method according to claim 1, wherein it is determined whether or not the design figure groups included in the area overlap each other. 3. The drawing pattern data is constructed as a collection of cell information constructed by a drawing figure information group showing a shape and a position of a drawing pattern and repetitive information of the cell information in the X direction and the Y direction. The charged particle beam drawing method according to claim 1, characterized in that 4. In the step of generating the drawing pattern data, subfield information relating to a subfield area is generated as a collection of cell information to which the repetition information is added, and the subfield information is collected to collect the LSI chip area. 4. The charged particle beam drawing according to claim 3, wherein frame information relating to a frame area obtained by dividing the frame into a predetermined width is generated, and the drawing pattern data of the LSI is configured as a collection of this frame information. Method. 5. As a step of performing a drawing process on the basis of the drawing pattern data, a subfield position which can be drawn by the sub-deflecting means is positioned by the main deflecting means, and a desired pattern is formed by a combination of the sub-deflecting means and the beam forming means. The method for drawing charged beer according to claim 1, wherein the drawing process is performed. 6. The sample on which the desired pattern is drawn is X-
It is mounted on a table movable in the Y direction, and while continuously moving the table, the beam deflecting means combining the main deflection and the sub-deflection is driven to perform the drawing process. 2. The charged particle beam drawing method according to claim 1.