JPH0697344A - Board for mounting electronic component and production thereof - Google Patents

Board for mounting electronic component and production thereof

Info

Publication number
JPH0697344A
JPH0697344A JP4248316A JP24831692A JPH0697344A JP H0697344 A JPH0697344 A JP H0697344A JP 4248316 A JP4248316 A JP 4248316A JP 24831692 A JP24831692 A JP 24831692A JP H0697344 A JPH0697344 A JP H0697344A
Authority
JP
Japan
Prior art keywords
lead
electronic component
conductor pattern
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4248316A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Kondo
光広 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP4248316A priority Critical patent/JPH0697344A/en
Publication of JPH0697344A publication Critical patent/JPH0697344A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To simplify production process of board for mounting electronic components having stadium structure in which strength is enhanced at the joint of lead in case of fine pitch lead while increasing the distance between the bonded parts of adjacent leads. CONSTITUTION:A lower board 2 formed with an electronic component mounting part is bonded through adhesive 9 with an upper board 3 having smaller size. A conductor pattern 11a to be connected with a lead 4a is formed on the top surface of the lower board 2. A conductor pattern 13a to be connected with electronic components is formed on the top surface of the upper board 3 while a conductor pattern 13c to be connected with a lead 4b is formed on the bottom surface thereof with both conductor patterns being connected through a through hole 14. Joints of the leads 4a, 4b are arranged in zigzag. The lead 4b connected with the conductor pattern 13c is held between both boards 2, 3 through the adhesive 9.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電子部品搭載用基板及び
その製造方法に係り、詳しくは所謂リードフレームを使
用して製造されるとともに、電子部品の端子との接続用
導体パターンが2層に形成された所謂スタジアム構造を
有する電子部品搭載用基板及びその製造方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a board for mounting electronic parts and a method for manufacturing the board, and more particularly, it is manufactured by using a so-called lead frame and has two layers of conductor patterns for connecting terminals of electronic parts The present invention relates to an electronic component mounting substrate having a so-called stadium structure formed and a method for manufacturing the same.

【0002】[0002]

【従来の技術】電子機器の小型化、高機能化に伴い半導
体チップ(ICチップ)等の電子部品を搭載する電子部
品搭載装置(いわゆる半導体パッケージ)も多ピン化、
小型化、表面実装化が進んでいる。表面実装用の電子部
品搭載装置として一般にQFP(クアッデッド・フラッ
ト・パッケージ)、PLLC(プラスチック・リーデッ
ド・チップ・キャリア)等、所謂リードフレームを使用
して製造されるものがある。電子部品搭載装置の多ピン
化、小型化を図る場合、リードフレームのアウターリー
ド及びインナーリードの狭ピッチ化が要求されるが、特
にインナーリードの狭ピッチ化においてリードフレーム
には限界(リードフレーム厚0.15mmで0.23m
mピッチ)があるといわれている。そこでインナーリー
ドの狭ピッチ化のため、種々の方法が提案されている。
2. Description of the Related Art With the miniaturization and higher functionality of electronic equipment, electronic component mounting devices (so-called semiconductor packages) for mounting electronic components such as semiconductor chips (IC chips) have also been increased in pin count.
Miniaturization and surface mounting are progressing. As an electronic component mounting apparatus for surface mounting, there are generally those manufactured using a so-called lead frame such as QFP (Quad Flat Package) and PLLC (Plastic Leaded Chip Carrier). In order to increase the pin count and size of electronic component mounting equipment, it is necessary to narrow the outer lead and inner lead pitches of the lead frame. 0.25m at 0.15mm
It is said that there are m pitches. Therefore, various methods have been proposed for narrowing the inner lead pitch.

【0003】例えば、特開平2−251166号公報等
には、少なくとも1層の導体回路層を有するプリント配
線板に、その外側に突出した複数のリードがプリント配
線板の表面に形成された導体パターンと電気的に接続固
着された電子部品搭載装置が開示されている。この電子
部品搭載装置ではリードはプリント配線板に形成された
導体パターンに接続され、導体パターンがICチップの
端子にボンディングワイヤで電気的に接続された構成と
なっている。この構成ではリードとICチップの端子と
を直接ボンディングワイヤで接続した構成に比較して、
インナーリードのピッチを狭くできる。その結果、IC
チップの端子とリードとを直接ワイヤボンディングする
場合より狭ピッチ化が可能となる。
For example, Japanese Laid-Open Patent Publication No. 2-251166 discloses a conductor pattern in which a printed wiring board having at least one conductor circuit layer has a plurality of leads protruding to the outside thereof on the surface of the printed wiring board. There is disclosed an electronic component mounting device that is electrically connected and fixed to. In this electronic component mounting apparatus, the lead is connected to a conductor pattern formed on a printed wiring board, and the conductor pattern is electrically connected to a terminal of an IC chip by a bonding wire. In this configuration, compared to the configuration in which the leads and the terminals of the IC chip are directly connected by bonding wires,
The inner lead pitch can be narrowed. As a result, IC
The pitch can be made narrower than in the case where the terminals of the chip and the leads are directly wire-bonded.

【0004】又、前記構成の電子部品搭載装置において
ICチップの端子とボンディングワイヤで接続されるボ
ンディングパッドとなる導体パターンの狭ピッチ化が要
求される場合、導体パターンの層が1層では狭ピッチ化
に限界があるため、導体パターンを2層(所謂スタジア
ム構造)で構成する方法がある。この構造の電子部品搭
載用基板は次のようにして製造される。
Further, in the electronic component mounting apparatus having the above-mentioned structure, when it is required to narrow the pitch of the conductor pattern serving as the bonding pad connected to the terminal of the IC chip by the bonding wire, the conductor pattern layer has a narrow pitch. Since there is a limit to realization, there is a method of forming the conductor pattern in two layers (so-called stadium structure). The electronic component mounting board having this structure is manufactured as follows.

【0005】図7(a)に示すように、上基板41及び
下基板42が予め準備される。上基板41は上面に銅箔
43が積層され、下面中央に凹部44が形成されてい
る。下基板42は下面に銅箔43が積層され、上面中央
に凹部44より小さな電子部品搭載用凹部45が形成さ
れるとともにその周囲に導体パターン46が形成されて
いる。そして、上基板41の下面に接着剤47が塗布さ
れた後、図7(b)に示すように上基板41と下基板4
2とが接着剤47を介して互いに接着された状態で積層
されて一体化される。次にドリルによる穴あけ後、スル
ーホールメッキ及びサブトラクティブ法によるパターン
形成により、スルーホール48及び上下両面の導体パタ
ーン49,50が形成される(図8(a)の状態)。
As shown in FIG. 7A, an upper substrate 41 and a lower substrate 42 are prepared in advance. A copper foil 43 is laminated on the upper surface of the upper substrate 41, and a recess 44 is formed in the center of the lower surface. A copper foil 43 is laminated on the lower surface of the lower substrate 42, an electronic component mounting recess 45 smaller than the recess 44 is formed in the center of the upper surface, and a conductor pattern 46 is formed around the recess 45. Then, after the adhesive 47 is applied to the lower surface of the upper substrate 41, as shown in FIG.
2 and 2 are adhered to each other via an adhesive 47 and are laminated and integrated. Next, after drilling, a through hole 48 and conductive patterns 49, 50 on both upper and lower surfaces are formed by through hole plating and pattern formation by a subtractive method (state of FIG. 8A).

【0006】次に凹部44と対応する位置に穴をあけ
て、図8(b)に示すように電子部品搭載用凹部45が
開放された状態とする。次に金メッキ等を行った後、上
基板41の導体パターン49にリードフレームのリード
51を電気的に接続することにより、電子部品搭載用基
板52が形成される(図9の状態)。そして、図9に鎖
線で示すように、電子部品搭載用凹部45にICチップ
53が搭載されるとともに、ICチップ53と導体パタ
ーン46,49がボンディングワイヤ54で電気的に接
続された後、例えばトランスファーモールドによりモー
ルドされて電子部品搭載装置となる。
Next, a hole is formed at a position corresponding to the recess 44, so that the electronic component mounting recess 45 is opened as shown in FIG. 8B. Next, after performing gold plating or the like, the lead 51 of the lead frame is electrically connected to the conductor pattern 49 of the upper substrate 41 to form the electronic component mounting substrate 52 (state of FIG. 9). Then, as shown by the chain line in FIG. 9, after the IC chip 53 is mounted in the electronic component mounting recess 45 and the IC chip 53 and the conductor patterns 46 and 49 are electrically connected by the bonding wire 54, for example, An electronic component mounting device is obtained by molding by transfer molding.

【0007】[0007]

【発明が解決しようとする課題】前記のようにプリント
配線板上の導体パターンとリードとを接続する構成を電
子部品搭載用基板に採用した場合でも、アウターリード
のピッチが狭ピッチ化(現状0.5mmから0.3mm
が強く要求されている。)した場合、次のような問題が
生じる。
Even when the structure for connecting the conductor pattern and the lead on the printed wiring board as described above is adopted for the electronic component mounting board, the pitch of the outer lead is narrowed (currently 0). 0.5mm to 0.3mm
Is strongly demanded. ), The following problems occur.

【0008】プリント配線板上の導体パターンとリー
ドとの電気的接続において、接続部は一般にアウターリ
ードのピッチよりさらに狭ピッチ(例えばアウターリー
ドピッチ0.30mmの場合、0.25mm)となるた
め、隣接する接続部との短絡が多発し、極めて歩留りが
悪くなる。又、短絡しなくても絶縁ギャップが小さいた
め、絶縁信頼性が低下し、信頼性の低い電子部品搭載用
基板となり、樹脂モールドされて形成された電子部品搭
載装置も信頼性の低いものとなる。
In the electrical connection between the conductor pattern on the printed wiring board and the leads, the connecting portion generally has a pitch narrower than the pitch of the outer leads (for example, 0.25 mm when the outer lead pitch is 0.30 mm). Short-circuiting frequently occurs between adjacent connecting parts, resulting in extremely low yield. Also, the insulation gap is small even if there is no short circuit, and the insulation reliability is reduced, resulting in a low-reliability electronic component mounting substrate, and the electronic component mounting device formed by resin molding also has low reliability. .

【0009】プリント配線板上の導体パターンとリー
ドとの接続部の狭ピッチ化により、接続部の幅は必然的
に細り接続面積が小さくなる。そして、電子部品搭載用
基板には例えばトランスファーモールドの際の封止樹脂
流動時の応力、あるいはワイヤボンディング時の加熱・
冷却によるリードフレームとプリント配線板との熱膨張
率の差による応力等が接続部に集中的に加わる。その結
果、接続部において部分的な剥がれ、クラックが生じ、
電気的接続の信頼性が低下する。又、ひどい場合は完全
に剥がれて不良品となる。
By narrowing the pitch of the connecting portion between the conductor pattern and the lead on the printed wiring board, the width of the connecting portion is inevitably narrowed and the connecting area is reduced. Then, the electronic component mounting substrate may be subjected to, for example, stress when the sealing resin flows during transfer molding, or heating during wire bonding.
Stress and the like due to the difference in thermal expansion coefficient between the lead frame and the printed wiring board due to cooling are concentrated on the connection portion. As a result, partial peeling at the connection, cracks occur,
The reliability of the electrical connection is reduced. In the worst case, it will be completely peeled off, resulting in a defective product.

【0010】又、インナーリードと接続される導体パ
ターンの狭ピッチ化が要求され、それに対応するためプ
リント配線板をスタジアム構造とした場合、従来のスタ
ジアム構造の製造方法は工数が多く、手間がかかり製造
コストが高くなるという問題がある。
Further, in order to meet the requirement that the conductor pattern connected to the inner lead has a narrower pitch, and the printed wiring board has a stadium structure, the conventional manufacturing method of the stadium structure requires a lot of man-hours and labor. There is a problem that the manufacturing cost becomes high.

【0011】本発明は前記の問題点に鑑みてなされたも
のであって、その目的はリードを狭ピッチ化した場合の
リードの接続部の強度を高めるとともに、隣接するリー
ドの接合部間の距離を大きくでき、しかもスタジアム構
造の電子部品搭載用基板の製造工程を簡単にすることが
できる電子部品搭載用基板及びその製造方法を提供する
ことにある。
The present invention has been made in view of the above problems, and an object thereof is to enhance the strength of the connecting portion of the lead when the pitch of the lead is narrowed and to increase the distance between the joining portions of adjacent leads. It is an object of the present invention to provide an electronic component mounting substrate and a manufacturing method thereof that can increase the size of the stadium and can simplify the manufacturing process of the electronic component mounting substrate of the stadium structure.

【0012】[0012]

【課題を解決するための手段】前記の目的を達成するた
め本発明の電子部品搭載用基板は、電子部品搭載部が形
成され、リード及び前記電子部品搭載部に搭載される電
子部品との接続用導体パターンが同一面に形成された第
1のプリント配線板と、前記電子部品搭載部より大きな
貫通孔が形成されるとともに、前記第1のプリント配線
板に絶縁性かつ耐熱性の接着材料により接着され、第1
のプリント配線板と対向する面にリードとの接続用導体
パターンが形成され、他面に電子部品との接続用導体パ
ターンが形成され、かつ両導体パターンがスルーホール
で接続された第2のプリント配線板と、前記第1のプリ
ント配線板のリードとの接続用導体パターンに電気的に
接続されたリードと、前記第2のプリント配線板のリー
ドとの接続用導体パターンに電気的に接続されたリード
とを備え、前記第1のプリント配線板に接続されるリー
ド又は第2のプリント配線板に接続されるリードの少な
くともいずれか一方のリードの接続部が両プリント配線
板に挟持されている。
In order to achieve the above object, an electronic component mounting board of the present invention is provided with an electronic component mounting portion, and is connected to a lead and an electronic component mounted on the electronic component mounting portion. A first printed wiring board having a conductor pattern for use on the same surface and a through hole larger than the electronic component mounting portion are formed, and the first printed wiring board is made of an insulating and heat-resistant adhesive material. Glued and first
Second printed circuit board in which a conductor pattern for connecting to a lead is formed on the surface facing the printed wiring board, a conductor pattern for connecting to an electronic component is formed on the other surface, and both conductor patterns are connected by a through hole A lead electrically connected to a conductor pattern for connecting a wiring board and a lead of the first printed wiring board, and a lead conductor electrically connected to a lead of the second printed wiring board. A lead connected to the first printed wiring board or a lead connected to the second printed wiring board, and a connecting portion of at least one of the leads is sandwiched between the both printed wiring boards. .

【0013】前記両プリント配線板は一方が他方より小
さく形成され、第1のプリント配線板に接続されるリー
ドと第2のプリント配線板に接続されるリードとはその
接続部が千鳥状に配置されていることが好ましい。
One of the printed wiring boards is formed smaller than the other, and the connecting portions of the leads connected to the first printed wiring board and the leads connected to the second printed wiring board are arranged in a zigzag pattern. Is preferably provided.

【0014】又、前記電子部品搭載用基板の製造方法の
発明では、電子部品搭載部が形成され、リード及び前記
電子部品搭載部に搭載される電子部品との接続用導体パ
ターンが形成された第1のプリント配線板と、前記電子
部品搭載部より大きな貫通孔が形成され、片面に電子部
品との接続用導体パターンが形成され、他面にリードと
の接続用導体パターンが形成されるとともに、両導体パ
ターンがスルーホールで接続された第2のプリント配線
板とを準備し、いずれか一方のプリント配線板の接続用
導体パターンと当該接続用導体パターンに接続すべきリ
ードフレームのリードとを電気的に接続し、その後に他
方のプリント配線板の接続用導体パターンと当該接続用
導体パターンに接続すべきリードフレームのリードとを
電気的に接続し、前記一方のプリント配線板の接続用導
体パターンと当該接続用導体パターンに接続すべきリー
ドフレームのリードとの接続後に、両プリント配線板を
絶縁性かつ耐熱性の接着材料により一体化するようにし
た。
Further, in the invention of the method of manufacturing the electronic component mounting substrate, the electronic component mounting portion is formed, and the lead and the conductor pattern for connection with the electronic component mounted on the electronic component mounting portion are formed. A printed wiring board of No. 1 and a through hole larger than the electronic component mounting portion are formed, a conductor pattern for connecting with an electronic component is formed on one surface, and a conductor pattern for connecting with a lead is formed on the other surface, A second printed wiring board having both conductor patterns connected by through holes is prepared, and the connecting conductor pattern of one of the printed wiring boards and the lead of the lead frame to be connected to the connecting conductor pattern are electrically connected. Electrically, and then electrically connecting the connecting conductor pattern of the other printed wiring board and the lead frame lead to be connected to the connecting conductor pattern, After connecting the connecting conductor pattern of one printed wiring board and the lead of the lead frame to be connected to the connecting conductor pattern, both printed wiring boards are integrated by an insulating and heat-resistant adhesive material. .

【0015】[0015]

【作用】本発明の電子部品搭載用基板は、少なくとも一
部のリードの導体パターンとの接続部が2つのプリント
配線板により挟持された状態にある。従って、電子部品
搭載用基板に電子部品を搭載後の樹脂モールド時あるい
はアッセンブリの加熱時等に発生する応力がリードに加
わる場合、応力がリードと導体パターンとの接続部のみ
に加わらず、リードを挟持している他の部分に分散され
る。従って、接続部に加わる応力が小さくなる。又、接
続部を挟持している部分は、接続部の補強材として作用
するため、接続部の強度が高くなる。その結果、狭ピッ
チ化により接続部の幅が狭くなっても、リードの接続部
からの剥がれが確実に防止される。
The electronic component mounting board of the present invention is in a state in which at least a part of the connection portion of the lead with the conductor pattern is sandwiched between the two printed wiring boards. Therefore, if stress is applied to the leads during resin molding after mounting the electronic components on the electronic component mounting board or during heating of the assembly, the stress is not applied only to the connection between the leads and the conductor pattern, and It is distributed to other parts that are sandwiched. Therefore, the stress applied to the connecting portion is reduced. Further, the portion sandwiching the connecting portion acts as a reinforcing material for the connecting portion, so that the strength of the connecting portion is increased. As a result, even if the width of the connecting portion is narrowed due to the narrowing of the pitch, peeling of the lead from the connecting portion is reliably prevented.

【0016】又、一部のリードの導体パターンとの接続
部は必ずしも両プリント配線板で挟持された状態にない
が、リードに大きな応力が加わる工程では、各リードが
独立した状態にあるのではなく、全てのリードがリード
フレームとして一体化された状態にある。従って、接続
部が両プリント配線板で挟持された状態にないリードに
加わる応力も結果として小さくなる。
Further, although the connecting portions of some of the leads with the conductor pattern are not necessarily sandwiched between the two printed wiring boards, in the process in which a large stress is applied to the leads, each lead may be in an independent state. None, all the leads are integrated as a lead frame. Therefore, the stress applied to the lead whose connecting portion is not sandwiched between the two printed wiring boards is also small as a result.

【0017】又、請求項2に記載の電子部品搭載用基板
の場合は、隣接するリードと接続用導体パターンとの接
続部が交互に異なるプリント配線板に配設されるため、
隣接する接続部の距離が大きくなる。従って、狭ピッチ
のリードの場合も接続部が短絡し難く、絶縁信頼性も高
くなる。又、小さい方のプリント配線板に接続すべきリ
ードを全て接続した後、他方のプリント配線板に残りの
リードを接続することにより、リードとプリント配線板
の接続状態を全て外観で検査が可能となる。
Further, in the case of the electronic component mounting board according to the present invention, the connecting portions between the adjacent lead and the connecting conductor pattern are alternately arranged on different printed wiring boards.
The distance between the adjacent connecting portions becomes large. Therefore, even in the case of leads with a narrow pitch, it is difficult for the connecting portion to short-circuit, and the insulation reliability is high. Also, after connecting all the leads that should be connected to the smaller printed wiring board and then connecting the remaining leads to the other printed wiring board, it is possible to visually inspect the connection state between the leads and the printed wiring board. Become.

【0018】請求項3に記載の製造方法では、2個のプ
リント配線板が準備される。第1のプリント配線板には
電子部品搭載部が形成され、リード及び前記電子部品搭
載部に搭載される電子部品との接続用導体パターンが形
成されている。第2のプリント配線板には前記電子部品
搭載部より大きな貫通孔が形成され、片面に電子部品と
の接続用導体パターンが形成され、他面にリードとの接
続用導体パターンが形成されるとともに、両導体パター
ンがスルーホールで接続されている。まず、いずれか一
方のプリント配線板の接続用導体パターンと、当該接続
用導体パターンに接続すべきリードフレームのリードと
が電気的に接続される。次に第1及び第2の両プリント
配線板が絶縁性かつ耐熱性の接着材料により一体化され
る。最後に他方のプリント配線板の接続用導体パターン
と、当該接続用導体パターンに接続すべきリードフレー
ムのリードとが電気的に接続される。すなわち、2個の
プリント配線板を積層した後に、導体パターン、スルー
ホール等を形成する工程がなく、スタジアム構造の製造
工程が短くなる。
In the manufacturing method according to the third aspect, two printed wiring boards are prepared. An electronic component mounting portion is formed on the first printed wiring board, and leads and a conductor pattern for connection with an electronic component mounted on the electronic component mounting portion are formed. A through hole larger than the electronic component mounting portion is formed in the second printed wiring board, a conductor pattern for connecting with an electronic component is formed on one surface, and a conductor pattern for connecting with a lead is formed on the other surface. , Both conductor patterns are connected by a through hole. First, the connecting conductor pattern of one of the printed wiring boards and the lead of the lead frame to be connected to the connecting conductor pattern are electrically connected. Next, the first and second printed wiring boards are integrated with an insulating and heat-resistant adhesive material. Finally, the connecting conductor pattern of the other printed wiring board and the lead of the lead frame to be connected to the connecting conductor pattern are electrically connected. That is, there is no step of forming a conductor pattern, a through hole, etc. after stacking two printed wiring boards, which shortens the manufacturing process of the stadium structure.

【0019】[0019]

【実施例】(実施例1)以下、本発明を具体化した第1
実施例を図1〜図3に従って説明する。図1に示すよう
に、電子部品搭載用基板1は第1のプリント配線板とし
ての下基板2と、第2のプリント配線板としての上基板
3と、下基板2に接続されたリード4aと、上基板3に
接続されたリード4bとから構成されている。両リード
4a,4bはリードフレームの一部を構成している。下
基板2はその中央に電子部品搭載部5を構成する貫通孔
が形成されるとともに、下面に放熱板6が接着剤7によ
り貫通孔の開口を覆う状態で固着されている。上基板3
は下基板2より一回り小さく形成され、その中央に電子
部品搭載部5より大きな貫通孔8が形成されている。そ
して、上基板3は貫通孔8の中央に電子部品搭載部5が
位置する状態で、下基板2にプリプレグ等の絶縁性かつ
耐熱性の接着材料9を介して接着されている。
EXAMPLES Example 1 Hereinafter, the first embodiment of the present invention will be described.
An embodiment will be described with reference to FIGS. As shown in FIG. 1, the electronic component mounting board 1 includes a lower board 2 as a first printed wiring board, an upper board 3 as a second printed wiring board, and leads 4 a connected to the lower board 2. , And a lead 4b connected to the upper substrate 3. Both leads 4a, 4b form a part of a lead frame. The lower substrate 2 has a through hole that forms the electronic component mounting portion 5 formed in the center thereof, and a heat dissipation plate 6 is fixed to the lower surface of the lower substrate 2 with an adhesive 7 so as to cover the opening of the through hole. Upper substrate 3
Is formed slightly smaller than the lower substrate 2, and a through hole 8 larger than the electronic component mounting portion 5 is formed in the center thereof. Then, the upper substrate 3 is bonded to the lower substrate 2 with an insulating and heat-resistant adhesive material 9 such as prepreg in a state where the electronic component mounting portion 5 is located at the center of the through hole 8.

【0020】下基板2の上面すなわち電子部品搭載部5
の開放側の面には、電子部品としてのICチップ10
(図2に図示)及びリード4aとの接続用導体パターン
11aが形成されている。接続用導体パターン11aは
その第1端部が電子部品搭載部5の周囲に露出し、第2
端部が上基板3の外側において露出する状態に形成され
ている。下基板2の下面には接地層用の導体パターン1
1bが形成されている。導体パターン11bは接地用リ
ードに接続される接続用導体パターン11aにスルーホ
ール12を介して電気的に接続されている。
The upper surface of the lower substrate 2, that is, the electronic component mounting portion 5
The surface of the open side of the IC chip 10 as an electronic component
(See FIG. 2) and a conductor pattern 11a for connection with the lead 4a is formed. The first end portion of the connecting conductor pattern 11a is exposed around the electronic component mounting portion 5, and
The end portion is formed so as to be exposed outside the upper substrate 3. On the lower surface of the lower substrate 2, a conductor pattern 1 for the ground layer
1b is formed. The conductor pattern 11b is electrically connected to the connecting conductor pattern 11a connected to the grounding lead via the through hole 12.

【0021】上基板3の上面にはICチップ10との接
続用導体パターン13aと、電源層用の導体パターン1
3bとが形成されている。接続用導体パターン13aは
短く形成され、上基板3の上面の余ったエリアに電源層
用の導体パターン13bが形成されている。上基板3の
下面、すなわち下基板2と対向する面にはリード4bと
の接続用導体パターン13cが形成されている。接続用
導体パターン13cは接続用導体パターン13aあるい
は電源層用の導体パターン13bとスルーホール14を
介して電気的に接続されている。又、ICチップ8の電
源端子に接続される接続用導体パターン13aは電源層
用の導体パターン13bに接続されている。
On the upper surface of the upper substrate 3, a conductor pattern 13a for connecting with the IC chip 10 and a conductor pattern 1 for the power source layer are formed.
3b are formed. The connecting conductor pattern 13a is formed to be short, and the conductor pattern 13b for the power supply layer is formed in the remaining area on the upper surface of the upper substrate 3. A conductor pattern 13c for connection with the lead 4b is formed on the lower surface of the upper substrate 3, that is, the surface facing the lower substrate 2. The connection conductor pattern 13c is electrically connected to the connection conductor pattern 13a or the power supply layer conductor pattern 13b through the through hole 14. The connecting conductor pattern 13a connected to the power supply terminal of the IC chip 8 is connected to the power supply layer conductor pattern 13b.

【0022】接続用導体パターン11aと接続用導体パ
ターン13cとは上下に重ならずに交互に位置するよう
に配置されている。そして、接続用導体パターン11a
とリード4aとの接続部と、接続用導体パターン13c
とリード4bとの接続部とが千鳥状となるように配置さ
れている。接続用導体パターン13cとリード4bとの
接続部は接着材料9を介して、下基板2及び上基板3に
より挟持されている。
The connecting conductor patterns 11a and the connecting conductor patterns 13c are arranged so as not to vertically overlap with each other and to be alternately positioned. Then, the connecting conductor pattern 11a
And the connecting portion between the lead 4a and the connecting conductor pattern 13c
And the connecting portion between the lead 4b and the lead 4b are arranged in a zigzag pattern. The connecting portion between the connecting conductor pattern 13c and the lead 4b is sandwiched by the lower substrate 2 and the upper substrate 3 via the adhesive material 9.

【0023】下基板2及び上基板3の基材としては、ポ
リイミド、エポキシ樹脂、ビスマレイミド・トリアジン
樹脂等の耐熱性樹脂と、ガラスクロスとで構成されたガ
ラス布基材が使用される。リードフレーム15の材料と
しては、銅合金、鉄/ニッケル合金(所謂42アロイ)
等が使用される。又、リード4a,4bと導体パターン
11a,13cとは、リード4a,4b及び導体パター
ン11a,13cに金(Au)あるいは錫(Sn)メッ
キを施し、Au/Sn、Au/Au等の金属間熱圧着
で、あるいは高融点半田等にて電気的に接続される。
As the base material of the lower substrate 2 and the upper substrate 3, a glass cloth base material composed of a heat-resistant resin such as polyimide, epoxy resin, bismaleimide / triazine resin, and glass cloth is used. The material of the lead frame 15 is a copper alloy, an iron / nickel alloy (so-called 42 alloy).
Etc. are used. Further, the leads 4a, 4b and the conductor patterns 11a, 13c are made of metal such as Au / Sn, Au / Au by plating the leads 4a, 4b and the conductor patterns 11a, 13c with gold (Au) or tin (Sn). They are electrically connected by thermocompression bonding or with high melting point solder or the like.

【0024】次に前記の電子部品搭載用基板1の製造方
法を説明する。まず、下基板2及び上基板3を形成す
る。両基板2,3は両面銅張り積層板を使用して形成さ
れ、定法により導体パターン11a,11b,13a〜
13c、スルーホール12,14の形成、金メッキ処
理、放熱板6の接着が行われる。
Next, a method of manufacturing the electronic component mounting board 1 will be described. First, the lower substrate 2 and the upper substrate 3 are formed. Both the substrates 2 and 3 are formed by using a double-sided copper-clad laminate, and the conductor patterns 11a, 11b, 13a to
13c, through holes 12 and 14 are formed, gold plating is performed, and heat dissipation plate 6 is adhered.

【0025】次に上基板3の下面の各接続用導体パター
ン13cと、リードフレーム15のリード4bとを金属
間熱圧着あるいは半田付け等により電気的に接続する。
すなわち、上基板3を裏返しにした状態でリードフレー
ム15を各リード4bの先端が接続用導体パターン13
cの所定位置と対応する状態に配置する。この状態で全
てのリード4bを所謂ギャングボンディングにより一括
して接続する。図3に示すように、下基板2に接続され
るリード4aの端部と上基板3に接続されるリード4b
の端部とが千鳥状に配置され、かつリード4bの端部が
リードフレーム15の内側に位置するように配置されて
いる。従って、接続作業時に他方のリード4aが邪魔に
ならず、作業が容易に行われる。
Next, the connecting conductor patterns 13c on the lower surface of the upper substrate 3 and the leads 4b of the lead frame 15 are electrically connected by thermocompression bonding between metals or soldering.
That is, in the state where the upper substrate 3 is turned upside down, the lead frame 15 is arranged such that the tips of the leads 4b have the connecting conductor patterns 13 connected thereto.
It is arranged in a state corresponding to the predetermined position of c. In this state, all the leads 4b are collectively connected by so-called gang bonding. As shown in FIG. 3, the ends of the leads 4 a connected to the lower substrate 2 and the leads 4 b connected to the upper substrate 3
And the ends of the leads 4b are arranged in a staggered manner, and the ends of the leads 4b are located inside the lead frame 15. Therefore, the other lead 4a does not get in the way during the connection work, and the work is easily performed.

【0026】次に上基板3の下面が下基板2と対向する
状態で上基板3と下基板2との間にノンフロータイプの
接着材料9を配置して、加熱プレスにより上基板3と下
基板2とを一体化する。次に下基板2の上面の各接続用
導体パターン11aと、リードフレーム15のリード4
aとを金属間熱圧着あるいは半田付け等により電気的に
接続することにより、電子部品搭載用基板1が完成す
る。上基板3が下基板2より小さく、各接続用導体パタ
ーン11aの端部が上基板3の外側に露出した状態にあ
るため、リード4aと接続用導体パターン11aとの接
続作業がし易い。又、リード4aと接続用導体パターン
11aとの接続前に上基板3と下基板2とが一体化され
ているため、接続作業がし易い。上基板3とリード4b
とを接続する場合と同様に、各リード4aを一括して接
続用導体パターン11aと接続してもよい。しかし、一
括して接続する場合は接続済のリード4bも加熱されて
その接続部に悪影響を与える虞があるため、個々の接続
部毎に加熱する所謂シングルポイントボンディングが好
ましい。
Next, a non-flow type adhesive material 9 is placed between the upper substrate 3 and the lower substrate 2 in a state where the lower surface of the upper substrate 3 faces the lower substrate 2, and the non-flow type adhesive material 9 and the lower substrate 2 are heated and pressed. The substrate 2 is integrated. Next, the connecting conductor patterns 11 a on the upper surface of the lower substrate 2 and the leads 4 of the lead frame 15
The electronic component mounting substrate 1 is completed by electrically connecting a and the metal by thermocompression bonding between metals or soldering. Since the upper substrate 3 is smaller than the lower substrate 2 and the end portions of the connecting conductor patterns 11a are exposed to the outside of the upper substrate 3, the work of connecting the leads 4a and the connecting conductor pattern 11a is easy. Further, since the upper substrate 3 and the lower substrate 2 are integrated before the lead 4a and the connecting conductor pattern 11a are connected, the connecting work is easy. Upper substrate 3 and leads 4b
Similarly to the case of connecting with, the leads 4a may be collectively connected with the connecting conductor pattern 11a. However, in the case of connecting all at once, the connected leads 4b may be heated and may adversely affect the connecting portion. Therefore, so-called single point bonding in which each connecting portion is heated is preferable.

【0027】前記のように構成された電子部品搭載用基
板1は、図2に示すように、電子部品搭載部5にICチ
ップ10が搭載されるとともに、その端子と接続用導体
パターン11a,13aとがボンディングワイヤ16に
より電気的に接続される。ICチップ10は熱伝導性の
良い接着剤で放熱板6に固着される。そして、例えばト
ランスファーモールドにより封止樹脂17で樹脂封止さ
れた後、リード4a,4bがリードフレーム15から切
り離されるとともに折り曲げ加工され、図2に示すよう
な電子部品搭載装置18となる。
As shown in FIG. 2, the electronic component mounting board 1 having the above-described structure has the IC chip 10 mounted on the electronic component mounting portion 5, and its terminals and the connecting conductor patterns 11a and 13a. And are electrically connected by the bonding wire 16. The IC chip 10 is fixed to the heat dissipation plate 6 with an adhesive having good thermal conductivity. Then, after being resin-sealed with the sealing resin 17 by, for example, transfer molding, the leads 4a and 4b are separated from the lead frame 15 and are bent, so that the electronic component mounting apparatus 18 as shown in FIG. 2 is obtained.

【0028】次に前記のように構成された電子部品搭載
用基板1の作用を説明する。電子部品搭載用基板1はリ
ード4bと接続用導体パターン13cとの接続部が、下
基板2及び上基板3により接着材料9を介して挟持され
ているため、接続部を挟持している部分が接続部の補強
材として作用し、接続部の強度が高くなる。又、電子部
品搭載用基板1にICチップ10を実装する際のワイヤ
ボンディング時、あるいは実装後の樹脂モールド時等に
発生する応力がリード4bに加わる場合、応力はリード
4bと接続用導体パターン13cとの接続部のみに加わ
るのではなく、リード4bを挟持している他の部分にも
分散される。従って、接続部に加わる応力が小さくな
る。
Next, the operation of the electronic component mounting board 1 configured as described above will be described. In the electronic component mounting board 1, since the connecting portion between the lead 4b and the connecting conductor pattern 13c is sandwiched by the lower substrate 2 and the upper substrate 3 via the adhesive material 9, the portion sandwiching the connecting portion is It acts as a reinforcing material for the connection portion and increases the strength of the connection portion. In addition, when a stress generated during wire bonding when mounting the IC chip 10 on the electronic component mounting substrate 1 or during resin molding after mounting is applied to the lead 4b, the stress is applied to the lead 4b and the connecting conductor pattern 13c. Is not only added to the connecting portion with and, but also dispersed to other portions holding the lead 4b. Therefore, the stress applied to the connecting portion is reduced.

【0029】一方、リード4aと接続用導体パターン1
1aとの接続部は両基板2,3で挟持されていない。し
かし、リード4aに大きな応力が加わる工程では、各リ
ード4a,4bは独立した状態にあるのではなく、全て
のリード4a,4bがリードフレーム15として一体化
された状態にある。従って、接続部が両基板2,3で挟
持された状態でないリード4aに加わる応力も結果とし
て小さくなる。従って、狭ピッチ化により接続部の幅が
狭くなっても、リード4a,4bの接続部からの剥がれ
が確実に防止される。
On the other hand, the lead 4a and the connecting conductor pattern 1
The connecting portion with 1a is not sandwiched between the substrates 2 and 3. However, in the process in which a large stress is applied to the leads 4a, the leads 4a and 4b are not in an independent state, but all the leads 4a and 4b are integrated as the lead frame 15. Therefore, the stress applied to the lead 4a which is not sandwiched between the substrates 2 and 3 is reduced as a result. Therefore, even if the width of the connection portion is narrowed due to the narrowed pitch, the leads 4a and 4b are reliably prevented from peeling off from the connection portion.

【0030】又、下基板2に接続されるリード4aの接
続部と、上基板3に接続されるリード4bの接続部とは
互いに重ならない状態で交互に配置され、かつ接着材料
を介した異なる平面上にあるため、隣接する接続部間の
距離が大きくなり、接続部同士の短絡が防止される。
Further, the connecting portion of the lead 4a connected to the lower substrate 2 and the connecting portion of the lead 4b connected to the upper substrate 3 are alternately arranged in a state of not overlapping with each other, and different from each other via an adhesive material. Since it is on the plane, the distance between the adjacent connecting portions becomes large, and a short circuit between the connecting portions is prevented.

【0031】又、リード4aと接続用導体パターン11
aとの接続部が上基板3の外側にあるため、接続部の状
態が外観で検査できる。従って、接続不良の状態で電子
部品搭載装置18の製造に使用されるのを容易に回避で
きる。
The lead 4a and the connecting conductor pattern 11 are also provided.
Since the connection with a is outside the upper substrate 3, the state of the connection can be visually inspected. Therefore, it is possible to easily avoid being used for manufacturing the electronic component mounting apparatus 18 in a poorly connected state.

【0032】又、この実施例では両基板2,3に接地層
あるいは電源層が形成されている。従って、ICチップ
10の電源に接続すべき各端子あるいは接地すべき各端
子をリード4a,4bを介して外部と接続するする必要
がないため、リード4a、4bのピン数の減少、リード
インダクタンスの低減による電気特性の向上が図れる。
In this embodiment, a ground layer or a power layer is formed on both substrates 2 and 3. Therefore, since it is not necessary to connect each terminal to be connected to the power source of the IC chip 10 or each terminal to be grounded to the outside through the leads 4a and 4b, the number of pins of the leads 4a and 4b is reduced and the lead inductance is reduced. The electrical characteristics can be improved by the reduction.

【0033】(実施例2)次に第2実施例を図4に従っ
て説明する。この実施例では両基板2,3に形成された
各接続用導体パターン11a,13c間に絶縁樹脂を設
けた点が前記実施例と異なっており、その他の構成は同
じである。
(Second Embodiment) Next, a second embodiment will be described with reference to FIG. This embodiment is different from the above embodiment in that an insulating resin is provided between the connecting conductor patterns 11a and 13c formed on both substrates 2 and 3, and the other structures are the same.

【0034】この実施例では各導体パターン11a,1
1b,13a〜13cがアディティブ法により形成され
る。すなわち、導体パターン11a,11b,13a〜
13cは、基板2,3を構成する基材の導体パターン1
1a,11b,13a〜13cを形成すべき部分以外が
メッキレジストで覆われた状態で無電解メッキを施すこ
とにより形成される。メッキレジストには耐熱性の感光
性樹脂からなるメッキレジストが使用され、メッキ終了
後も剥離されずに永久マスクとして残る。そして、図4
に示すように、下基板2に形成された隣接する接続用導
体パターン11aの間にはメッキレジストからなる絶縁
樹脂19が、接続用導体パターン11aより高い状態で
存在する状態となる。又、上基板3に形成された隣接す
る接続用導体パターン13cの間にメッキレジストから
なる絶縁樹脂(図示せず)が存在する。
In this embodiment, each conductor pattern 11a, 1a
1b and 13a to 13c are formed by the additive method. That is, the conductor patterns 11a, 11b, 13a-
13c is a conductor pattern 1 of a base material that constitutes the substrates 2 and 3.
1a, 11b, 13a to 13c are formed by performing electroless plating with the portions other than the portions to be formed covered with the plating resist. A plating resist made of a heat-resistant photosensitive resin is used as the plating resist and remains as a permanent mask without being peeled off even after the plating is completed. And FIG.
As shown in, the insulating resin 19 made of a plating resist is present between the adjacent connecting conductor patterns 11a formed on the lower substrate 2 in a state of being higher than the connecting conductor pattern 11a. Further, an insulating resin (not shown) made of a plating resist exists between the adjacent connecting conductor patterns 13c formed on the upper substrate 3.

【0035】従って、この実施例の場合にはリード4
a,4bを接続用導体パターン11a,13cに接続す
る際、リード4a,4bが隣接する絶縁樹脂19により
幅方向への移動が規制された状態で位置決めされる。そ
の結果、リード4a,4bと接続用導体パターン11
a,13cの接続が所定の位置で精度良く行われ、歩留
りが向上するとともに信頼性も向上する。又、接続用導
体パターン11a,13cと基板2,3の表面との段差
が小さくなり、上基板3と下基板2との接着が容易かつ
確実となる。
Therefore, in the case of this embodiment, the lead 4 is used.
When connecting a and 4b to the connecting conductor patterns 11a and 13c, the leads 4a and 4b are positioned in a state in which movement in the width direction is restricted by the adjacent insulating resin 19. As a result, the leads 4a and 4b and the connecting conductor pattern 11 are formed.
The connection of a and 13c is accurately performed at a predetermined position, and the yield is improved and the reliability is also improved. Further, the step between the connecting conductor patterns 11a and 13c and the surfaces of the substrates 2 and 3 becomes small, so that the upper substrate 3 and the lower substrate 2 can be bonded easily and reliably.

【0036】なお、本発明は前記両実施例に限定される
ものではなく、例えば、図5に示すように、下基板2の
接続用導体パターン11aとリード4aとの接続部に上
基板3と同様な基材で形成された枠体20を接着材料9
で固着してもよい。この場合にはリード4aの接続部が
接着材料9を介して下基板2と枠体20とにより挟持さ
れ、接続部の強度が向上するとともに、接続部に加わる
応力が小さくなる。又、枠体20を接着材料9で固着す
る代わりに、図6に示すように接続用導体パターン11
aとリード4aとの接続部に熱硬化性の接着剤21をた
らして硬化させてもよい。
The present invention is not limited to the above-described embodiments. For example, as shown in FIG. 5, the upper substrate 3 and the upper substrate 3 are connected to the connecting portions of the connecting conductor pattern 11a of the lower substrate 2 and the leads 4a. The frame 20 made of the same base material is used as the adhesive material 9
You may fix with. In this case, the connecting portion of the lead 4a is sandwiched between the lower substrate 2 and the frame body 20 with the adhesive material 9 interposed therebetween, so that the strength of the connecting portion is improved and the stress applied to the connecting portion is reduced. Further, instead of fixing the frame body 20 with the adhesive material 9, as shown in FIG.
A thermosetting adhesive 21 may be applied to the connecting portion between a and the lead 4a to be cured.

【0037】又、電子部品搭載用基板1を製造する際
に、上基板3及び下基板2にリードフレーム15のリー
ド4b,4aを接続した後、上基板2と下基板2とを接
着材料9で一体化してもよい。又、上基板3を下基板2
より小さく形成する代わりに、下基板2を上基板3より
小さく形成したり、下基板2と上基板3の外形を同じに
形成してもよい。又、リードフレーム15の各リード4
a,4bは、その端部が必ずしも千鳥状である必要はな
い。
Further, when manufacturing the electronic component mounting substrate 1, after connecting the leads 4b and 4a of the lead frame 15 to the upper substrate 3 and the lower substrate 2, the upper substrate 2 and the lower substrate 2 are bonded with the adhesive material 9 May be integrated with. In addition, the upper substrate 3 is replaced with the lower substrate 2
Instead of forming it smaller, the lower substrate 2 may be formed smaller than the upper substrate 3, or the lower substrate 2 and the upper substrate 3 may have the same outer shape. Also, each lead 4 of the lead frame 15
The ends of a and 4b do not necessarily have to be staggered.

【0038】又、ICチップ10から発生する熱を外部
へ放散するための放熱板6は必ずしも必要ではない。放
熱板6を設けない場合は、下基板2に貫通孔を設けずに
凹部が形成されるか平坦のままとなる。又、電子部品搭
載部5に搭載される電子部品はICチップに限らず他の
部品を搭載してもよい。
Further, the heat dissipation plate 6 for dissipating the heat generated from the IC chip 10 to the outside is not always necessary. When the heat dissipation plate 6 is not provided, the through hole is not provided in the lower substrate 2 and the recess is formed or remains flat. Further, the electronic component mounted on the electronic component mounting portion 5 is not limited to the IC chip, and other components may be mounted.

【0039】[0039]

【発明の効果】以上詳述したように本発明の電子部品搭
載用基板によれば、リードに加わる応力が接続部のみに
集中せず、リードの狭ピッチ化により接続部の面積が小
さくなってもリードの接続部の強度が高くなり、信頼性
が向上する。
As described in detail above, according to the electronic component mounting board of the present invention, the stress applied to the leads is not concentrated only on the connecting portions, and the area of the connecting portions is reduced by narrowing the lead pitch. In addition, the strength of the lead connecting portion is increased, and the reliability is improved.

【0040】又、請求項2に記載の発明では、隣接する
リードの接合部間の距離が大きくなり、接続部同士の短
絡を防止できる。又、両プリント配線板に対するリード
の接続作業が容易となる。
Further, in the invention according to the second aspect, the distance between the joint portions of the adjacent leads becomes large, so that the short circuit between the connecting portions can be prevented. Also, the work of connecting the leads to both printed wiring boards becomes easy.

【0041】又、請求項3に記載の製造方法では、スタ
ジアム構造の電子部品搭載用基板の製造工程が簡単とな
り、歩留りが向上するとともに製造時間が短縮されて製
造コストも安くなる。
Further, in the manufacturing method according to the third aspect, the manufacturing process of the electronic component mounting substrate having the stadium structure is simplified, the yield is improved, the manufacturing time is shortened, and the manufacturing cost is reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】第1実施例の電子部品搭載用基板の一部省略断
面図である。
FIG. 1 is a partially omitted sectional view of a board for mounting electronic components according to a first embodiment.

【図2】同じくの電子部品搭載装置の断面図である。FIG. 2 is a sectional view of the same electronic component mounting apparatus.

【図3】電子部品搭載用基板の一部省略分解斜視図であ
る。
FIG. 3 is a partially omitted exploded perspective view of an electronic component mounting board.

【図4】第2実施例を示す部分断面図である。FIG. 4 is a partial sectional view showing a second embodiment.

【図5】変更例の部分断面図である。FIG. 5 is a partial cross-sectional view of a modified example.

【図6】別の変更例の部分断面図である。FIG. 6 is a partial cross-sectional view of another modification.

【図7】スタジアム構造の電子部品搭載用基板の従来の
製造手順を示す模式断面図である。
FIG. 7 is a schematic cross-sectional view showing a conventional procedure for manufacturing an electronic component mounting substrate having a stadium structure.

【図8】スタジアム構造の電子部品搭載用基板の従来の
製造手順を示す模式断面図である。
FIG. 8 is a schematic cross-sectional view showing a conventional procedure for manufacturing an electronic component mounting substrate having a stadium structure.

【図9】スタジアム構造の電子部品搭載用基板の従来の
製造手順を示す模式断面図である。
FIG. 9 is a schematic cross-sectional view showing a conventional manufacturing procedure of a substrate for mounting an electronic component having a stadium structure.

【符号の説明】[Explanation of symbols]

1…電子部品搭載用基板、2…第1のプリント配線板と
しての下基板、3…第2のプリント配線板としての上基
板、4a,4b…リード、5…電子部品搭載部、9…接
着材料、10…電子部品としてのICチップ、11a,
13a,13c…接続用導体パターン、14…スルーホ
ール、15…リードフレーム。
DESCRIPTION OF SYMBOLS 1 ... Substrate for mounting electronic components, 2 ... Lower substrate as first printed wiring board, 3 ... Upper substrate as second printed wiring board, 4a, 4b ... Leads, 5 ... Electronic component mounting portion, 9 ... Adhesion Material, 10 ... IC chip as electronic component, 11a,
13a, 13c ... Conductive pattern for connection, 14 ... Through hole, 15 ... Lead frame.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 電子部品搭載部が形成され、リード及び
前記電子部品搭載部に搭載される電子部品との接続用導
体パターンが同一面に形成された第1のプリント配線板
と、 前記電子部品搭載部より大きな貫通孔が形成されるとと
もに、前記第1のプリント配線板に絶縁性かつ耐熱性の
接着材料により接着され、第1のプリント配線板と対向
する面にリードとの接続用導体パターンが形成され、他
面に電子部品との接続用導体パターンが形成され、かつ
両導体パターンがスルーホールで接続された第2のプリ
ント配線板と、 前記第1のプリント配線板のリードとの接続用導体パタ
ーンに電気的に接続されたリードと、 前記第2のプリント配線板のリードとの接続用導体パタ
ーンに電気的に接続されたリードとを備え、 前記第1のプリント配線板に接続されるリード又は第2
のプリント配線板に接続されるリードの少なくともいず
れか一方のリードの接続部が両プリント配線板に挟持さ
れていることを特徴とする電子部品搭載用基板。
1. A first printed wiring board on which an electronic component mounting portion is formed, and a lead and a conductor pattern for connection with an electronic component mounted on the electronic component mounting portion are formed on the same surface, and the electronic component. A through hole larger than the mounting portion is formed and is bonded to the first printed wiring board with an insulating and heat-resistant adhesive material, and a conductor pattern for connecting to a lead is provided on a surface facing the first printed wiring board. And a second printed wiring board in which a conductor pattern for connection with an electronic component is formed on the other surface and both conductor patterns are connected by through holes, and a lead of the first printed wiring board. A lead electrically connected to the conductor pattern for connection, and a lead electrically connected to the conductor pattern for connection with a lead of the second printed wiring board; Leads connected to the or a second
2. A board for mounting electronic parts, characterized in that a connecting portion of at least one of the leads connected to the printed wiring board is sandwiched between the both printed wiring boards.
【請求項2】 前記両プリント配線板は一方が他方より
小さく形成され、第1のプリント配線板に接続されるリ
ードと第2のプリント配線板に接続されるリードとはそ
の接続部が千鳥状に配置されていることを特徴とする請
求項1に記載の電子部品搭載用基板。
2. One of the two printed wiring boards is formed smaller than the other, and the connecting portions between the leads connected to the first printed wiring board and the leads connected to the second printed wiring board are staggered. The electronic component mounting substrate according to claim 1, wherein the electronic component mounting substrate is arranged in
【請求項3】 電子部品搭載部が形成され、リード及び
前記電子部品搭載部に搭載される電子部品との接続用導
体パターンが同一面に形成された第1のプリント配線板
と、前記電子部品搭載部より大きな貫通孔が形成され、
片面に電子部品との接続用導体パターンが形成され、他
面にリードとの接続用導体パターンが形成されるととも
に、両導体パターンがスルーホールで接続された第2の
プリント配線板とを準備し、いずれか一方のプリント配
線板の接続用導体パターンと当該接続用導体パターンに
接続すべきリードフレームのリードとを電気的に接続
し、その後に他方のプリント配線板の接続用導体パター
ンと当該接続用導体パターンに接続すべきリードフレー
ムのリードとを電気的に接続し、前記一方のプリント配
線板の接続用導体パターンと当該接続用導体パターンに
接続すべきリードフレームのリードとの接続後に、両プ
リント配線板を絶縁性かつ耐熱性の接着材料により一体
化することを特徴とする電子部品搭載用基板の製造方
法。
3. A first printed wiring board on which an electronic component mounting portion is formed, a lead and a conductor pattern for connection with an electronic component mounted on the electronic component mounting portion are formed on the same surface, and the electronic component. A through hole larger than the mounting part is formed,
A second printed wiring board having a conductor pattern for connection with an electronic component formed on one surface, a conductor pattern for connection with a lead formed on the other surface, and both conductor patterns connected by through holes is prepared. , Electrically connecting the connecting conductor pattern of one of the printed wiring boards and the lead of the lead frame to be connected to the connecting conductor pattern, and then connecting the connecting conductor pattern of the other printed wiring board to the connection. After electrically connecting the lead of the lead frame to be connected to the conductor pattern for connection, and the lead of the lead frame to be connected to the connecting conductor pattern of the one printed wiring board, A method for manufacturing an electronic component mounting substrate, characterized by integrating a printed wiring board with an insulating and heat-resistant adhesive material.
JP4248316A 1992-09-17 1992-09-17 Board for mounting electronic component and production thereof Pending JPH0697344A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4248316A JPH0697344A (en) 1992-09-17 1992-09-17 Board for mounting electronic component and production thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4248316A JPH0697344A (en) 1992-09-17 1992-09-17 Board for mounting electronic component and production thereof

Publications (1)

Publication Number Publication Date
JPH0697344A true JPH0697344A (en) 1994-04-08

Family

ID=17176270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4248316A Pending JPH0697344A (en) 1992-09-17 1992-09-17 Board for mounting electronic component and production thereof

Country Status (1)

Country Link
JP (1) JPH0697344A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870458A (en) * 1986-05-31 1989-09-26 Kabushiki Kaisha Toshiba Display and input combination panel
JP2007294798A (en) * 2006-04-27 2007-11-08 Kyocera Corp Laminated substrate, electronic apparatus, and manufacturing method for them

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870458A (en) * 1986-05-31 1989-09-26 Kabushiki Kaisha Toshiba Display and input combination panel
JP2007294798A (en) * 2006-04-27 2007-11-08 Kyocera Corp Laminated substrate, electronic apparatus, and manufacturing method for them

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