JPH0694795A - Inspecting device for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a tester preventing the mistake generated when a test program is stored in a tester inspecting an LSI and certainly, rapidly and continuously testing an LSI of a different kind to enhance measuring efficiency. CONSTITUTION:In a tester 2 inspecting an LSI 1, an LSI testing means introducing the data read from the LSI 1 into a measuring condition setting circuit 10 through a measuring condition reading wire 11 and selecting and determining the measuring condition corresponding to an LSI to be measured on the basis of the data read from the LSI 1 at the start time of measurement is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor integrated circuit (hereinafter,
The present invention relates to a semiconductor integrated circuit inspection device (hereinafter referred to as "tester") for inspecting "LSI".

[0002]

2. Description of the Related Art In a conventional tester, in testing an LSI, particularly an LSI formed on a silicon substrate (hereinafter referred to as a "wafer"), an operator who performs the test is required
The test program for SI is read into the tester for testing. A typical LSI is one to several tens of wafers
It is manufactured as a unit / 1 quality, and the above-mentioned test is performed for each wafer unit. That is, the operator reloads the test program into the tester for each wafer = quality.

A test program memory 13 of the tester 2 shown in FIG. 3 is loaded with a test program for each LSI type by an operator using an input / output device attached to the tester.

[0004]

In recent years, as the demand for ASICs (application-specific ICs) has increased, there is an increasing tendency for low-volume, high-mix production of LSIs. Depending on the type, 1000 or more LSIs may be formed on one wafer. Therefore, in consideration of economic efficiency, measurement efficiency, etc., for example, it is conceivable that several tens to several hundreds of LSIs are formed on one wafer. In this case, considering the case of testing the present wafer, the operator must read the dedicated test program into the tester for each type of LSI on the wafer.

However, the test program can be stored in the tester only by the operator carefully and confirming that the LSI and the test program dedicated to the LSI match each other. There is no. Moreover, when testing several types of LSIs formed on a wafer, there is a problem that the possibility of making a mistake increases. This also applies to a case where one type of LSI is composed of one to several wafers and a multi-type test is performed.

In view of the above-mentioned drawbacks, the technical problem of the present invention is to prevent mistakes in storing a test program in a tester for inspecting an LSI, and to test different kinds of LSIs without fail without interruption. It is to provide a tester that improves the measurement efficiency by performing.

[0007]

According to the present invention, in a semiconductor integrated circuit inspection device for inspecting a semiconductor integrated circuit, a measurement condition setting circuit depending on a device under test is provided, and the measurement condition setting circuit is provided at the start of measurement. A semiconductor integrated circuit inspection apparatus is obtained which is characterized by selecting a measurement condition based on information read from a device under test. Further, according to the present invention, in a semiconductor integrated circuit inspection device capable of storing a plurality of inspection programs for a semiconductor integrated circuit, a control circuit for reading out and setting a predetermined measurement program from a test program storage unit based on information read out from a device under test It is possible to obtain a semiconductor integrated circuit inspection device characterized by having:

That is, in a tester for inspecting LSI,
A plurality of measurement condition setting circuits depending on the LSI are provided, and means for selecting the measurement condition and the like is provided based on the information read from the LSI at the start of measurement. Further, in a tester capable of storing a plurality of LSI inspection programs, a control circuit for reading out and setting the measurement program from the test program storage unit according to the information read out from the LSI is provided.

[0009]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram of the first embodiment.
In addition to the conventional tester, the tester of the embodiment shown in FIG.
A measurement condition read line 11 for transmitting the measurement condition information read from SI is provided, and this read line 11 is connected to the input side of the measurement condition setting circuit 10. The output side from the measurement condition setting circuit 10 is connected to the internal data bus 4.

In an LSI tester using this tester, information (hereinafter referred to as "signature") for setting different LSI measurement conditions for each product type is stored in advance in the LSI. When testing this LSI, first use L
The signature is taken into the measurement condition setting circuit 10 from the SI via the measurement condition read line 11. On the internal data bus 4, the measurement conditions of the LSI (for example, the input / output waveform timing data, the input / output voltage value, etc.) that have been determined in advance by the type of signature in the measurement condition setting circuit 10 based on the captured signature are stored in the internal data bus 4. Output, and control circuits 6, 8 and pattern generator 7, voltage generator 9
An actual test signal is input / output to / from the LSI 1 through the above-described steps, and the test is started.

As described above, by setting the LSI measurement conditions for each signature of the LSI 1 in the measurement condition setting circuit 10 of the tester 2, the LS to be measured is automatically measured.
I1 can be tested depending on the measurement conditions to be set. And several kinds of L can be placed on one wafer.
Even if the SI is formed, it is possible to reliably and quickly test different types of LSIs without interruption, human error is eliminated, and overhead time such as program setting is shortened. Further, this is also useful when testing a variety of LSIs each including one to several wafers of one type, or when testing each circuit block portion of a custom LSI product.

Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a block diagram of the second embodiment. In this embodiment, in addition to the conventional tester, a measurement condition read bus 15 for transmitting the measurement condition information (signature) read from the LSI 1 is provided, the read bus 15 is connected to the input side of the selection circuit 14, and the selection circuit 14 is tested. It is connected to the program memory 13 and the internal data bus 4, respectively.

When testing the LSI 1, the LSI
The signature from 1 is taken into the selection circuit 14 via the measurement condition read line 15. Based on the captured signature, the selection circuit 14 selects one of a plurality of LSI test programs preset according to the type of signature, and the test program memory 13
Output to the internal data bus 4, and the control circuits 6 and 8
And the pattern generator 7, the voltage generator 9, etc.
The test of I1 is performed.

In this way, the selection circuit 14 of the tester 2
By setting an LSI test program corresponding to each LSI signature, the LSI under test 1 can be automatically tested by a test program dedicated to the LSI.

In the first embodiment, the measurement condition setting circuit 10 directly sets various measurement conditions of the LSI1 based on the signature from the LSI1.
After the selection circuit 14 receives a simple signature from SI1, the selection circuit 14 may select the program in the test program memory 13, so that the burden of setting the measurement conditions on the LSI tester is reduced. In other words, this signature can be simplified because only a test program can be selected, and less information can be stored in the LSI. Further, by using the measurement condition read line as a bus, the signature can be transferred at high speed, and higher speed measurement becomes possible.

[0017]

As described above, according to the present invention, it is possible to automatically set the measurement conditions of the LSI to be measured in the tester and perform the test.
Even if SI is formed or wafers of different quality LSI are continuous, the test can be executed more reliably and quickly without interruption, and human error is eliminated, as compared with the case of manual work. In addition, the overhead time related to measurement can be shortened.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of a second embodiment of the present invention.

FIG. 3 is a block diagram showing a conventional semiconductor integrated circuit inspection device.

[Explanation of symbols]

 1 LSI 2 Tester 3 CPU 4 Internal Data Bus 5 Memory 6, 8 Control Circuit 7 Pattern Generator 9 Voltage Generator 10 Measurement Condition Setting Circuit 11 Measurement Condition Reading Line 13 Test Program Memory 14 Selection Circuit 15 Measurement Condition Reading Bus

Claims (2)

[Claims] 1. A semiconductor integrated circuit inspecting apparatus for inspecting a semiconductor integrated circuit, wherein a measurement condition setting circuit depending on a device under test is provided, and the measurement condition setting circuit uses the information read from the device under test at the start of measurement. A semiconductor integrated circuit inspection device characterized by selecting a measurement condition. 2. A semiconductor integrated circuit inspection device capable of storing a plurality of semiconductor integrated circuit inspection programs, comprising a control circuit for reading out and setting a predetermined measurement program from a test program storage unit based on information read out from a device under test. A semiconductor integrated circuit inspection device having.