JPH0689371A - Method and system for ic memory card control - Google Patents

Abstract

PURPOSE:To provide the IC memory card control method and system which remedy an IC memory card extracted from a hot-line state during the recording of data. CONSTITUTION:An IC memory card controller 1 processes image data appearing on a bus 100 and records the image data as specific packets in the data area on an IC memory card 4. Prior to the recording of the image data, a control information read circuit 14 reads control data recorded in the control area on the IC memory card 4. A control circuit 18 recognizes the control data and further controls a control information update circuit 16 to generate control data including data whose 'used' and 'read protect' bits are set to '1' and after the control data are recorded in the control area, packets showing the image data are written in the data area. The control part 18 updates the 'read protect' bit recorded in the control area into '0' after the packets are written.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC memory card control system and system for recording data such as image data.

[0002]

2. Description of the Related Art In recent years, a semiconductor memory has been used as a storage medium capable of easily storing image data obtained by an image input device such as an electronic still camera and character data created by an information device such as a computer. The used IC memory card has come to be used.

As a semiconductor memory used in such an IC memory card, an EEPROM (electrically erasable / rewritable read-only memory) that does not require a battery power source for holding stored contents is used as an IC memory card. It is being considered for adoption. For example, an IC memory card described in Japanese Patent Application No. 3-43969, which is a patent application filed by the same applicant as the present applicant, has a large-capacity storage element of a batch erasable EEPROM for recording main data such as image data, It is composed of a byte-rewritable storage element capable of rewriting in byte units for recording subordinate data such as data management information, and a control unit for performing control and management for recording data in these storage elements. This allows, for example, SRAM (Static ra
A large capacity IC memory card can be constructed at a lower cost than an IC memory card using (ndom access memory),
Moreover, like the IC memory card using SRAM, the management data can now be freely rewritten in byte units.

An IC memory card control device for recording various data in such an IC memory card and reading data from the IC memory card is mounted on, for example, an electronic still camera and is photographed by this camera. Information such as the obtained image data is recorded in an IC memory card that is set freely. In this case, the image data recorded on the IC memory card has a very large amount of data, and thus the time required for recording further increases. Moreover, the IC memory card using the EEPROM as described above uses SRAM.
Unlike IC memory cards, it requires complicated control for writing data. Therefore, it takes a long time to record the data. Therefore, we used EEPROM
The IC memory card is provided with a buffer of a predetermined capacity, and the data transferred from the IC memory card control device and temporarily stored in the buffer is also controlled by the control unit (controller) provided in the IC memory card. The data is read out to and written to the flash EEPROM.

[0005]

However, when data is recorded in such an IC memory card, even if the data transfer from the IC memory card control device to the IC memory card is completed, the data is actually stored in the IC memory card. The data accumulated in the buffer is written in the EEPROM. For this reason, the IC memory card is removed from the IC memory card control device while data is being written to the EEPROM, so-called hot-line removal occurs, and IC memory card control is performed during data writing. The device may be turned off. In this case, the data is partially written in the storage area of the IC memory card, and incomplete data remains. The IC memory card control device to which such a hot-plugged IC memory card is connected cannot recognize which data is incomplete. For example, it is necessary to read the image data recorded in the IC memory card and output this image data to the CRT display device to judge the quality of the image, and in the worst case, the IC memory card control device destroyed the image data. There was a problem that the device stopped when reading the data. Furthermore, since the flash type EEPROM cannot erase only arbitrary data, the data recorded halfway remains as an unusable area in one area in the IC memory card. Therefore, there is a problem that the storage area of the IC memory card cannot be effectively used.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the problems of the prior art and to provide an IC memory card control system and system capable of relieving an IC memory card that has been hot-lined and effectively using a storage area. To do.

[0007]

In order to solve the above-mentioned problems, the present invention provides a plurality of data areas in which data is recorded and a management area for managing data recording in correspondence with each of the plurality of data areas. In the IC memory card control system, in which the IC memory card having the and is formed in the IC memory card control device is detachably formed and the management information is stored together with the data in the IC memory card. The management area is provided with an identification area in which a usage code indicating that the data is recorded in the area and a recording code indicating that this data is abnormally recorded in the data area are provided in the management area. When writing the data to the data area, write the usage code and recording code as significant states in the identification area prior to writing this data. See, and cancels the significant state of the recording code after the data write.

An IC memory card having a plurality of data areas in which data is recorded and a management area for managing data recording corresponding to each of the plurality of data areas is attached to and detached from the IC memory card controller. In the IC memory card control method in which the management information is freely formed and stored in the IC memory card together with the data, the IC memory card uses the use code indicating that the data is recorded in the data area and the data. The management area is provided with an identification area in which a recording code indicating that data is abnormally recorded is written in the management area, and the IC memory card control device displays the significant status recording code and the significant status recording code from the management area. When the recorded data is detected, the information recorded in the management area and data area is saved, and this IC memory card is saved. After initializing, the normally recorded data is extracted based on this usage code and this recording code, the management information corresponding to this extracted data is recorded in the information area, and this extracted data is recorded. It is characterized by recording in the data area.

Further, an IC memory card having a plurality of data areas in which data is recorded and a management area for managing data recording corresponding to each of the plurality of data areas is attached to and detached from an IC memory card controller. In an IC memory card control system that is freely formed and stores its management information together with data in this IC memory card, this system uses a usage code indicating that the data is recorded in the data area and this data in the data area. In the management area, an IC memory card having an identification area in which a recording code indicating abnormal recording is written, management information reading means for reading the management information recorded in the management area, and this management information reading means Management information updating means for updating the management information read by the device, and a data record for writing data to the IC memory card. When writing the data in the data area, the management information updating means writes the use code and the recording code as significant states in the identification area before writing the data, and writes the recording code after the writing of the data. It is characterized by canceling the significant state of.

In this case, detection means for detecting a significant state recording code indicating abnormal recording from the read management information, means for reading and saving the data recorded in the data area, and storage area The management information updating means reads the management information recorded in the management area, and uses the significant state usage code and the significant state canceled recording code. Create management information for recording the recorded data in the storage area, update this management information, and
The data recording means writes the saved data in the storage area of the IC memory card which has been initialized by the initialization means based on the updated management information.

[0011]

According to the IC memory card control system and system of the present invention, when the IC memory card control device for driving the IC memory card records the data in the mounted IC memory card, the IC memory card control device writes the data before writing the data. The significant status use code indicating that this data is recorded in the data area of the IC memory card, and the significant status record code indicating that this data is recorded abnormally.
The management data representing the management information of this data is written in the identification area of the management area formed in the IC memory card. Next, the IC memory card control device writes the data in the data area of the IC memory card, and thereafter releases the significant state of the recording code recorded in the identification area of the management area.

Further, the IC memory card controller reads the management data from the management area of the mounted IC memory card, and records the significant state use code and the significant state record code recorded in the identification area. When data is detected, the information recorded in the management area and data area of the IC memory card is saved, and the management area and data area of this IC memory card are initialized. The IC memory card control device extracts normally recorded data based on the detected use code and recording code, and generates management data for recording the extracted data in the IC memory card. The IC memory card control device writes the extracted data in the IC memory card based on the generated management data.

[0013]

Embodiments of the IC memory card control system and system according to the present invention will now be described in detail with reference to the accompanying drawings. As shown in FIG. 1, the IC memory card control system in this embodiment is provided with, for example, an IC memory card provided in a digital electronic still camera (not shown) that images a subject and generates image data representing the subject. The control device 1 processes the image data input to the terminal 2, records the image data in the IC memory card 4 which is detachably attached to the connector 3a provided in the IC memory card control device 1, and In this system, the image data recorded in the IC memory card 4 is read and processed, and the processed image data is output to the terminal 2 and transferred to the digital electronic still camera. In the following description, parts not directly related to the present invention will be omitted from illustration and description,
Further, the reference numeral of the signal is represented by the reference numeral of the connecting line in which it appears.

The IC memory card controller 1 has a data processing circuit 10 for compressing encoding and decompressing image data input to the terminal 2, and a digital processing by the data processing circuit 10 to be output to the bus 104. A data selector 12 for writing data and management data representing information for managing these data to the IC memory card 4 mounted on the connector 3a, and reading the data recorded in the IC memory card 4 via the bus 106a, and a data selector 12 With respect to the IC memory card 4, a management information read circuit 14 for reading the management data recorded in the IC memory card 4 via the management information update circuit 16 for generating management data to be written in the management area of the IC memory card 4. It is provided with a control circuit 18 for controlling the device 1 and the IC memory card 4 when writing or reading data.

The data processing circuit 10 is a circuit for processing data appearing on the bus 100 and data transferred from the IC memory card 4 and converting the data into a predetermined data format. For example, the data processing circuit 10 is input to the terminal 2 and the bus 100
Has a data compression processing function of encoding the image data appearing in the block unit for each block of a plurality of pixels, compressing it to a predetermined data length, temporarily storing it, and outputting the compressed data to the bus 104. The data processing circuit 10 also includes a bus 104
It has a data decompression processing function of decoding the data appearing on the bus 100, outputting it to the bus 100, and sending it to a digital electronic still camera (not shown) connected to the terminal 2.

The data selector 12 is a bus switching circuit for switching between image data and management data for input / output.
The data selector 12 is output from the control circuit 18 and its input
Based on the bus switching signal input to 110, the data appearing on the bus 104 and the data appearing on the bus 108 and the bus 112 are switched and output to the bus 106a.
The data appearing on bus 104 and bus 108 or bus 11
It has a function to switch to 2 and output. The bus 106a of the data selector 12 is connected to the connector 3a, and the buses 112 and 108 are connected to the management information reading circuit 14 and the management information updating circuit 16, respectively. In addition, the data selector 12 transfers the data appearing on the bus 114 to the bus 114 based on the bus switching signal output from the control circuit 18 and input to the input 110 thereof. It has a function of transferring to the bus 106. A data storage device (not shown) for recording data in a storage medium such as a floppy disk is connected to the bus 114, and the data to be saved is transferred in a card rescue mode described later.

The management information reading circuit 14 is used for the IC memory card 4
This is a read circuit for reading out management data representing management information stored in the management area and transferring it to the control circuit 18. The management information read circuit 14 generates an address for reading the management data under the control of the control circuit 18, outputs this address to the data selector 12 via the bus 112, and is recorded in the IC memory card 4. It has a function of reading management data. The management information reading circuit 14 has a function of temporarily storing the read management data. The management information update circuit 16 is a circuit that updates the management data under the control of the control circuit 18. The management information updating circuit 16 generates and temporarily stores management data to be written in the IC memory card 4 based on the management data read by the management information reading circuit 14, and sends this management data to the bus 108. It has a function of updating the management data written in the IC memory card 4. The management information updating circuit 16 has the function of generating an address for writing the management data in the IC memory card under the control of the control circuit 18 and outputting the address to the data selector 12 via the bus 108.

The control circuit 18 is a circuit for controlling the own IC memory card controller 1 to drive the IC memory card 4 mounted on the connector 3a. More specifically, the control circuit 18 generates a write signal for writing the image data encoded by the data processing circuit 10 and the management data created by the management information updating circuit 16 into the IC memory card 4, and I c
When reading the data recorded in the memory card 4, it has a function of generating a read signal for reading the data and outputting the read signal to the control bus 116a. Also,
The control circuit 18 has a function of generating a bus switching signal for switching the image data and the management data by the data selector 12 and outputting the bus switching signal to the output 110 thereof. It has a function of outputting a status signal indicating a status to the control bus 116a. A control bus 116a from which the control circuit 18 outputs control signals such as a read / write status signal, a status signal indicating whether the signal on the data bus is a data address or data, and a data transfer clock.
And the bus 106a for transferring management data, image data and address are connected to the connector 3a.
Each is connected to the bus of the IC memory card 4 attached to 3a. As the connector 3a, the connector 3b provided in the IC memory card 4 shown in FIG. 2 is mounted, the bus 106a connected to the connector 3a is connected to the bus 106b of the IC memory card 4, and similarly, the control bus 116a. Is a connector for connecting to the control bus 116b. In this embodiment, the connected buses are bus 106 and control bus 116, respectively.
Will be represented.

The IC memory card 4 in this embodiment is
It is a non-volatile information storage medium that stores the image data output to the connector 3a of the IC memory card control device 1 and the stored image data is read out to the IC memory card device 1 via the connector 3a. For example, as shown in FIG. 2, the IC memory card 4 includes a storage unit 20 that stores image data and its management data, a card control unit 22 that controls the storage unit 20, and an IC memory card 4 that is an IC memory card. It has a connector 3b which is attached to the connector 3a of the control device 1 to mediate data transfer.

The storage unit 20 is a byte rewritable EEPROM 30 (electrically erasable and rewritable memory) in which data can be rewritten for each byte, and data is erased in predetermined erase blocks. It is composed of a flash type EEPROM 32 in which data is written for each block. Byte rewritable EEPROM30 includes IC memory card 4
A management area for storing management data such as information regarding information and information regarding data recording is formed, and an information area for storing image data is formed in the flash EEPROM 32. The unit for erasing the information area formed in the flash type EEPROM 32 is set in units of 8 kilobytes, for example. Furthermore, the management area and the information area have a bank structure composed of a plurality of blocks, and each bank has a maximum storage capacity of 16 megabytes.
Banks from bank 0 to a maximum of 255 are sequentially formed. In this embodiment, the IC memory card 4 is composed of only bank 0. As shown in FIG. 3, the management area of the bank 0 is formed with a 0th cluster and a 1st cluster each having a storage capacity of 8 kilobytes. Further, in the information area, as shown in FIG. 4, second to 2047th clusters in which the recording unit of data is set to the storage capacity of every 8 kilobytes are formed.
The image data is recorded in packets with this cluster as the minimum unit. In this embodiment, it is assumed that the second packet representing the first image data occupies the second to fourth clusters, as shown in FIG. It will handle the fixed length image data that it occupies. It should be noted that each packet may be recorded in discontinuous clusters.

Returning to FIG. 3, in the 0th cluster, card attribute information indicating information such as the memory configuration and memory size in this bank, bank header information indicating the memory usage state in the information area, and image data. Bank packet identification information representing the type of image, audio, etc. and the attribute of the packet and the bank packet related information representing the packet related to this packet are recorded. In particular, the type / attribute information of each packet recorded in the packet identification information is composed of 1-byte data as shown in FIG. 5, and the attribute of the packet is shown in the upper 5 bits. For example, bit D7 represents a used bit indicating that information is recorded in the packet, and bit D6 represents a write protect bit indicating that writing of data to the IC memory card 4 is prohibited. There is.
Bit D5 represents a read protect bit indicating that reading of data from this IC memory card 4 is not permitted, bit D4 represents a copy protect bit that prohibits copying of this IC memory card 4, and further bits D3 has a structure representing a copied bit indicating that the data of this packet has been copied from the IC memory card 4. In particular, the read protect bit of D5 is used as a normal recording code in the present invention. For example, the used bit of D7 indicates "used" and
If the read protect bit is "0", it indicates that the packet has been recorded successfully, and if the read protect bit is "1", it indicates that the image data of the packet has been abnormally recorded. Represent.

The first cluster has bank directory information indicating the start number (start cluster) of the cluster of each packet, and a bank MAT (Memory Allocation Tabl) indicating the connection state of each cluster forming each packet.
e) Information is recorded. When reading the recorded data, the image data is read from each cluster based on the bank directory information and the bank MAT information. These management data recorded in the management areas set in the 0th cluster and the 1st cluster are stored in the IC memory card 4
It is recorded or updated under the control of the card control unit 22.

Returning to FIG. 2, the card controller 22 uses the bus 10
A buffer 24 for temporarily storing the image data and the address appearing in 6, a mode control circuit 26 for controlling the operation mode of the card control unit 22 in response to a control signal appearing on the control bus 116, and a mode control circuit 26. And a buffer 24 and a storage control circuit 28 for writing the data stored in the storage unit 20 to each other.

The buffer 24 is a storage circuit for temporarily storing data. One of the buffers 24 is connected to the connector 3b via the bus 106, and the other is connected to the storage control circuit 28 via the bus 200. The buffer 24 has a function of buffering the difference between the data writing speed to the storage unit 20 and the transfer speed of the data transferred from the IC memory card control device 1. For example, the buffer 24 is a flash type EEPR.
A static RAM having a storage capacity that is an integral multiple of the erase unit of the OM32 is advantageously used. In this embodiment, buffer 24 is configured to have a storage capacity of 8 kilobytes.

The mode control circuit 26 is a circuit for notifying and controlling the operation mode to the storage control circuit 28 connected to the control bus 202 according to the control signal appearing on the control bus 116.
The mode control circuit 26 includes a status signal indicating a state where an address appears on the bus 106, a read / write status signal appearing on the control bus 116, a status signal indicating whether the signal on the data bus is a data address or data, and a data transfer clock. A mode control signal of an address mode signal, an erase mode signal, a write mode signal, and a read mode signal is sent to the control bus 202 in correspondence with each control signal such as. Further, the mode control circuit 26 monitors the operating states of the buffer 24 and the storage control circuit 28, and a ready signal for permitting acceptance of data transferred to the buffer 24 via the bus 106 and a busy signal for rejecting acceptance of data. It has a function of sending a signal to the control bus 116.

The storage control circuit 28 is a memory for writing data in the storage unit 30 and reading the data stored in the storage unit 30 according to a mode control signal transferred from the mode control circuit 26 via the control bus 202. The controller. Specifically, the storage control circuit 28 generates a control command according to the mode control signal transferred from the mode control circuit 26 and sends it to the control bus 206 to read or erase the data stored in the storage unit 20. Further, it has a function of writing the data temporarily stored in the buffer 24 to the storage unit 20. For example, the storage control circuit 28 is a mode control circuit.
When the erase mode signal is notified from 26, the erase command is sent to the storage unit 20, and when the write mode signal is sent in the same manner, the write command is sent to the storage unit 20 and the read mode signal is sent. Then, the read command is sent to the storage unit 20. Further, when the address control signal is notified from the mode control unit 26, the storage control circuit 28 reads out the address temporarily stored in the buffer 24 via the bus 200 and latches it. Further, the storage control circuit 28 decodes the latched address and designates the storage area of the byte rewritable EEPROM 30 provided in the storage section 20 corresponding to this address, or the flash type EEPROM 32.
The address data designating the cluster of is output to the bus 204. The storage control circuit 28 outputs the image data temporarily stored in the buffer 24 to the bus 204 in accordance with the command and address data sent to the storage unit 20, writes the image data in the storage unit 20, and stores the image data in the storage unit 20. The read data is read and sent to the buffer 24. When writing the data, the storage control circuit 28 erases the data in the storage area of the flash EEPROM 32 at the address to write the data, and then reads the image data from the buffer 24 and writes the image data in the storage area.

Returning to FIG. 1, the IC memory card control device 1
The control circuit 18 of FIG.
Has a function of recognizing the management information read from the storage section 20 of the IC memory card 4 by the management information reading circuit 14 prior to recording or reading data. Specifically, in the recording mode for recording the image data in the IC memory card 4, the control circuit 18 controls the bank header information, the bank packet identification information recorded in the 0th cluster and the 1st cluster of the IC memory card 4, Management data such as bank directory information and bank MAT information is read by the management information reading circuit 14 to detect an empty area of the information area. Further, the control circuit 18 updates the management data read by the management information reading circuit 14 by the management information updating circuit 16, and stores the image data to be recorded in the IC memory card 4 and the management data concerning this image data in the IC memory card. 4 is recorded or updated, and the image data stored in the IC memory card 4 is read out.

Further, the control circuit 18 uses the IC memory card 4
It has a function of controlling recording of image data so that the abnormal recording end data remaining in the IC memory card 4 due to interruption of the data writing to the storage section 20 can be easily detected. Specifically, the control circuit 18 is a management information reading circuit.
Control 14 to read the management data from the management area of the IC memory card 4. The control circuit 18 includes a management information reading circuit 14
The management data read in step S1 is recognized, and the management information updating circuit 16 is made to generate management data in which the used bit and the read protect bit of the bank packet identification information are set to "1". The control circuit 18 includes a management information updating circuit 16
Control the generated management data to the IC memory card 4
Of the packet, and then the image data of this packet is written in the information area. When the writing of the packet data to the information area is completed, the control circuit 18 sets the "read protect" bit of the bank packet identification information from "1" to "
It has a function of rewriting to 0 "to indicate that the packet data recording has been completed normally. That is, the read protect bit" 0 "represents the normal recording end code, and the bit" 1 "is the abnormal recording end code. Is represented.

Further, the control circuit 18 has a function of detecting a packet in which the writing of the image data is abnormally terminated based on the management data recorded in the IC memory card 4 and performing a predetermined card rescue process. Specifically, control circuit 18
Controls the management information reading circuit 14 to control the IC memory card 4
It has a function of reading the bank packet identification information recorded in the management area of No. 3, and detecting the packet number of the image data for which abnormal recording has ended. When this abnormal recording end data is detected, the control circuit 18 shifts to the card rescue processing mode without reading the detected packet.
In this card rescue processing mode, it has a function of saving all the data recorded in the IC memory card 4, extracting only normal packet data, and writing in the IC memory card 4. For example, the control circuit 18
The memory card 4 is the connector of the IC memory card control device 1.
When the management data is read by being attached to the 3a and the power is turned on, or when the IC memory card 4 is newly attached to the IC memory card control device 1 and the management data is read. The packet number recorded in the read protect bit "1" stored in the management area of the memory card 4 is detected. Further, the control circuit 18 has a function of detecting an abnormal packet based on the bank MAT information of the read management data, and inspects the chain state of clusters forming each packet recorded in the bank MAT information. , Detect the packet number of abnormal cluster chain. When the control circuit 18 detects an abnormal packet in which the read protect bit is "1" and a packet in an abnormal cluster chain, it reads all the data recorded in the IC memory card 4 and puts it on the bus 114. This IC is sent out and saved in the data storage device connected to the bus 114.
It has a function of initializing the management area and the information area of the memory card 4 to a state in which no data is recorded. in this case,
The control circuit 18 has a function of extracting the packet data in which the read protection is recorded at "0" from the saved packet data and the cluster chain is normally recorded, and writing the packet data in the initialized IC memory card 4. Have

The operation of the IC memory card control circuit 1 having the above-described structure during data recording will be described with reference to FIG.
Image data captured by a digital electronic still camera (not shown) and input to the terminal 2 is transferred to the data processing circuit 10 of the IC memory card controller 1 via the bus 100. This image data is encoded by the data processing circuit 10 for each block of a plurality of pixels, compressed into a predetermined data length, and further temporarily stored.

Next, in step 600 shown in FIG.
An address designating a management area of the byte rewritable EEPROM 30 for reading the management data stored in the IC memory card 4 is generated by the management information reading circuit 14. A ready signal is sent from the mode control circuit 26 of the IC memory card 4 to the control bus 116.
To the bus switching signal when detected by the control circuit 18
110 is sent to the data selector 12. Bus switching signal 11
When 0 is input to the data selector 12, the address generated by the management information read circuit 14 is output to the bus 112,
It is sent to the bus 106 via the data selector 12. On the other hand, a status signal indicating the output status of this address and a read signal for reading the data of this address are output to the output 114 of the control circuit 18 and sent to the control bus 116. The read signal and status signal sent to the control bus 116 and the address output to the bus 106 are transferred to the card control unit 22 of the IC memory card control circuit 1 via the connector 3a and the connector 3b shown in FIG. 2, respectively. To be done. The address output to the bus 106 is temporarily stored in the buffer 24 of the card control unit 22, and the status signal and the read signal are input to the mode control circuit 26. Mode control circuit 26
The read signal input to is converted into a read mode signal and output to the control bus 202. When the read mode signal is input to the storage control circuit 28, a read command is generated, and the read command is output to the control bus 206 and sent to the storage unit 20. Storage area where the read command is input
20 is set to read mode. Also, the mode control circuit
The status signal transferred to 26 is transferred to the storage control circuit 28 via the control bus 202. When the status signal is input to the storage control circuit 28, the address temporarily stored in the buffer 24 is read out to the storage control circuit 28 and converted into the address data in the storage unit 20 corresponding to this address. The address data is output to the bus 204 and sent to the storage unit 20.
As a result, the address data designating the 0th cluster and the 1st cluster in which the management data is stored are stored in the storage unit.
Entered in 20.

When this address data is notified to the storage unit 20, the management data stored in the 0th cluster and the 1st cluster of the storage unit 20 is read out and output to the bus 204. The read management data is transferred to the bus 106 via the buffer 24 and further input to the management information reading circuit 14 via the data selector 12 of the IC memory card control device 1. When the management information read circuit 14 reads the management data, the control circuit 18 detects the management data.
On the basis of this management data, new management data for recording the image data temporarily stored in the data processing circuit 10 on the IC memory card 4 is generated by the management information updating circuit 16 under the control of the control circuit 18. Specifically, data processing circuit
Bank header information indicating that the image data temporarily stored in 10 is recorded as a second packet, and bank packet identification information indicating the type and attribute of this second packet,
Management data of bank directory information indicating that the recording start cluster of the second packet is the second cluster and bank MAT information indicating the connection of each cluster when recording the second packet in the second to fourth clusters. Is generated by the management information updating circuit 16. Further, the management information updating circuit 16 generates an address indicating the writing destination of these management data. At this time, the used bit and write protect bit of the bank packet identification information generated by the management information update circuit 16 are set to "1",
Each becomes a significant state.

Next, at step 602, when the control circuit 18 detects the ready signal sent from the mode control unit 26 of the card control unit 22 to the control bus 116, the bus switching signal 110 is sent to the data selector 12. The address is sent from the management information update circuit 16 via the data selector 12 to the bus 10
Dispatched to 6. On the other hand, a status signal and a write signal indicating that the data output to bus 106 are addresses are sent to control bus 116. Next, the data representing the bank header information is sent to the bus 106 via the data selector 12. The data representing the address and bank header information output to the bus 106 is temporarily stored in the buffer 24 of the card controller 22. When the status signal and the write signal are input to the mode control circuit 26, a write mode signal is generated and transferred to the storage control circuit 28. Memory control circuit
When a write mode signal is input to 28, a write command is sent to the storage unit 20 and the storage unit 20 is set to the write mode. When the storage unit 20 enters the write mode, the buffer 24
The data representing the address and the bank header information temporarily stored in the memory are read by the memory control circuit 28, and the address data corresponding to this address and the management data representing the bank header information are output to the memory unit 20. . Memory
This management data input to 20 is written in a predetermined storage area of the byte rewritable EEPROM 30 corresponding to the address data.

Similarly, in steps 604 to 608, the bank packet identification information generated by the management information updating circuit 16, the bank directory information, and the bank MAT.
Information and are sequentially output, and the byte rewrite type EEPR of the storage unit 20
It is written in a predetermined management area of OM30. Particularly, in this embodiment, "1" is written in the used bit and write protect bit of the bank packet identification information set in the management area of the IC memory card 4.

Next, in step 610, the mode control circuit
When the ready signal is sent from 26 to the control bus 116, the address generated by the management information update circuit 16 is transferred to the bus 106 via the data selector 12 and temporarily stored in the buffer 24 of the card control unit 22. . A bus switching signal is output from the output 110 of the control circuit 18, and the image data temporarily stored in the data processing circuit 10 is output to the bus 104. The image data is sent to the bus 106 via the data selector 12,
It is input to the buffer 24 of the card control unit 22 and temporarily stored. At this time, the busy signal is sent from the mode control unit 26 to the control bus.
When sent to 116, the control circuit 18 detects a busy signal, and the control circuit 18 suspends the output of data from the data processing circuit 10 and outputs the data when the busy signal changes to a ready signal. To restart. On the other hand, a control signal for recording data to the IC memory card 4 is output to the control bus 116 of the control circuit 18. The card control unit 22 generates a write mode signal based on the write signal and the status signal appearing on the control bus 116 and sends it to the storage control circuit 28 together with the status signal. The storage control circuit 28 generates a write command and sends it to the storage unit 20. Next, the storage control circuit 28 reads the address stored in the buffer 24 to generate address data designating the second to fourth clusters of the information area, and also the image data corresponding to this address data. Are sequentially read and output to the storage unit 20. Next, the image data is sent to the bus 204 of the storage control circuit 28 and recorded as a second packet in the second to fourth clusters of the information area set in the flash EEPROM 32.

When the recording of the image data in step 610 is completed, the process proceeds to step 612 and the management data updating circuit
The read protect bit of the bank packet identification information temporarily stored in 16 is updated from "1" to "0". The management data representing the bank packet identification information of this second packet and the address are transferred to the bus 10 via the data selector 12.
Dispatched to 6. The management data and address sent to the bus 106 are temporarily stored in the buffer 24. On the other hand, a control signal indicating data write is sent from the control circuit 18 to the control bus 116 and input to the mode control circuit 26. When the control signal is input to the mode control circuit 26, the erase mode signal is sent to the storage control circuit 28, and the storage control circuit 28
Outputs an erase command to the storage unit 20. When the erase command is input, the storage unit 20 is set to the erase mode.
Next, the storage control circuit 28 reads the address stored in the buffer 24, outputs the address data corresponding to this address to the storage unit 20, and erases the bank packet identification information of the second packet. Next, a write signal is output from the control circuit 18 and the card control unit 22 is sent via the control bus 116.
Then, a write command is output from the card control unit 22 to the control bus 206, and the storage unit 20 is set to the write mode. The data and address representing the bank packet identification information of the second packet stored in the buffer 24 are read by the storage control circuit 28, and the address data corresponding to this address and the management data representing the bank packet identification information are stored. Is output to the storage unit 20. The management data input to the storage unit 20 is written in a predetermined storage area of the byte rewritable EEPROM 30 corresponding to the address data, and the writing of the second packet is completed.

In this way, the data of each packet representing the image data is stored in the storage section 20, and the image data of the third and subsequent packets is written in the IC memory card 4 as shown in FIG. At this time, for example, when the IC memory card 4 is unplugged from the connector 3a of the IC memory card control device 1 during the recording of the image data in step 610 shown in FIG. The image data writing operation is interrupted. in this case,
Image data having abnormal data remains in the fifth to seventh clusters in which the third packet is recorded.
The packet is stored in the storage unit 20 of the IC memory card 4 with the used bit and read protect bit of the bank packet identification information set to "1".

Next, the operation in the card rescue processing mode that enables the data reading from the IC memory card 4 in which the third packet data in which the read protection is set to "1" is recorded after the hot-line removal is performed. explain. When the IC memory card 4 is attached to the connector 3a of the IC memory card control device 1, the bus switching signal is output from the output 110 of the control circuit 18 and input to the data selector 12 in step 700 shown in FIG. . Byte rewritable EEPROM
Addresses for reading the 0th cluster and the 1st cluster of the management area set to 30 are generated by the management information read circuit 14 and sent to the bus 106 via the data selector 12. On the other hand, a read signal and a status signal are output to the control bus 116. The card control unit 22 receives the address, read signal, and status signal output from the IC memory card control device 1, and stores the data in the byte rewriting type of the storage unit 20.
The management data stored in the EEPROM 30 is read from the 0th cluster and the 1st cluster and output to the bus 106.
The management data appearing on the bus 106 is input to the management information reading circuit 14 via the data selector 12.

Next, in step 702, when the control circuit 18 detects a packet in which the read protect bit of the bank packet identification information is recorded as "1" among the read management data, the process proceeds to step 704. Then, the data of all the packets stored in the information area set in the flash type EEPROM 32 of the IC memory card 4 is read out and the data selector of the IC memory card control circuit 1 is read.
Transferred to bus 114 via 12. The transferred data is stored in a data storage device (not shown) connected to the bus 114.
The data is transferred to a storage medium such as a floppy disk and stored in an information storage medium such as a floppy disk.

When all the data has been saved, the step
Proceeding to 706, a control signal for initializing the management data stored in the management area of the IC memory card 4 and the packet data stored in the information area is output to the control bus 116. Next, addresses designating these management area and information area are sent from the management information updating circuit 16 to the bus 106 via the data selector 12. These address and control signals are detected by the card control unit 22, address data and an erase command are output from the card control unit 22 to the storage unit 20, and the management area and the information area stored in the IC memory card 4 are managed. The data and image data are deleted. As a result, the IC memory card 4 is initialized. During the erasing of this data, the mode control circuit 26 sends a busy signal to the control bus 116. When the erasing of data is completed, the ready signal is sent to the control bus 116 instead of the busy signal sent from the mode control circuit 26.

Next, at step 708, a packet number in which the chain state of the cluster is normal is extracted from the packet whose read protection is "0" based on the management data temporarily stored in the management information updating circuit 16. It Next, based on the normal packet numbers extracted in step 710, management data representing the management information for recording these packets in the IC memory card 4 is added to the management information updating circuit 16
Created in.

In step 712, the image data of each packet saved in the data storage device (not shown) connected to the bus 114 is read out, and the management information update circuit 16 is read.
The data of each packet is sent to the bus 106 via the data selector 12 based on the management data created in
It is stored in the management area and the information area of the storage unit 20 of the IC memory card 4. At this time, only the packet data that has been recorded normally and whose read protection is "0"
It is written in the storage unit 20 of the memory card 4.

As described above, according to the present invention, prior to the writing of packetized image data, the used bit provided for each packet is set to “1” which is used, and the read protect bit is abnormally recorded. "1" for Further, when the recording of the image data of this packet ends normally, the read protect bit is rewritten to the normal recording code "0". Therefore, if hot-line removal occurs during writing of image data, the IC memory card records a packet with the used bit being "1" and the read protect bit being "1". . Therefore, even if the IC memory card controller does not read all the data recorded in the IC memory card 4 and outputs it to the display device or the like to check the quality of the image, the abnormally recorded packet will be It can be easily detected, and at least the data of the packet can be prohibited from being read to prevent the reading.

Further, when the IC memory card 4 in which such abnormally recorded packet is recorded is mounted in the IC memory card control device 1, the read protection is "1".
The packet recorded in is detected and the card rescue processing mode is set. In this mode, all packet data recorded in the information area of the IC memory card 4 is saved, the IC memory card 4 is initialized, and then the normal packet whose read protect is recorded as "0" Data is written in the IC memory card 4. In this case, the control circuit 18 extracts the packet data whose cluster chain is normal based on the bank MAT information. Therefore, for example, while the bank MAT information is being written in the information area of the IC memory card 4, hot-line removal is performed. Even if the bank MAT information relating to the already recorded packet data is destroyed, the IC memory card 4 can be rescued. Therefore, even if the IC memory card 4 is hot-plugged and the defective data that has been abnormally recorded and remains in the storage area can be substantially removed, the storage capacity of the IC memory card 4 can be effectively used. Can be used.

In this embodiment, the IC memory card control device 1 is configured to save all data, extract only normal data, and write it to the IC memory card 4. However, the present invention is not limited to this. Only the normal data stored in the IC memory card 4 may be detected and saved, and the saved data may be written to the IC memory card 4 after the IC memory card 4 is initialized.

In this embodiment, the image data generated by the digital electronic still camera (not shown) is handled, but the present invention is not limited to this, and character data or other data may be used.

[0047]

As described above, according to the IC memory card control system of the present invention, when the IC memory card control device records data in the mounted IC memory card, it writes the data before writing the data. , This data is IC
The use code indicating that the data is recorded in the data area of the memory card and the significant state recording code indicating that this data is recorded abnormally are stored in the identification area of the management area formed in the IC memory card. It is written as management data representing management information of the data. Next, the IC memory card control device writes the data in the data area of the IC memory card, and finally cancels the significant state of the recording code recorded in the identification area of the management area. As a result, if hot-line removal occurs while writing this data, the IC
Since the data in which the significant state use code and the significant state record code are recorded remains in the identification area of the management area of the memory card, the IC memory card control device can easily detect this data. Therefore, since it is possible to recognize the data in which hot-line removal has occurred without reading all the data recorded in the IC memory card, it is possible to prevent this data from being read. Further, the IC memory card control device discards the abnormally recorded end data based on the management data including the significant state use code and the significant state record code recorded in these identification areas, and records the data in the IC memory card. All the data can be made normal, and this IC memory card can be rescued. As a result, there is an excellent effect that the defective data recorded in the IC memory card can be removed and the storage area of the IC memory card can be effectively used.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an IC memory card control device to which an IC memory card control method and system according to the present invention is applied.

FIG. 2 is a diagram showing a configuration of an IC memory card in this embodiment.

FIG. 3 is a diagram showing a configuration of a management area of an IC memory card in this embodiment.

FIG. 4 is a diagram showing a configuration of a data area of an IC memory card in this embodiment.

FIG. 5 is a diagram showing an example of the configuration of bank packet identification information of the IC memory card in this embodiment.

FIG. 6 is a diagram showing an operation of an IC memory card control device and an IC memory card in a write mode in this embodiment.

FIG. 7 is a diagram showing an operation of an IC memory card control device and an IC memory card in a card rescue processing mode in this embodiment.

[Explanation of symbols]

 1 IC memory card control device 4 IC memory card 10 Data processing circuit 12 Data selector 14 Management information reading circuit 16 Management information updating circuit 18 Control circuit

Claims (4)

[Claims] 1. An IC memory card control device comprising an IC memory card having a plurality of data areas in which data is recorded, and management areas for managing the recording of the data respectively corresponding to the plurality of data areas. In an IC memory card control system which is detachably formed and stores the management information together with the data in the IC memory card, the IC memory card has a usage code indicating that the data is recorded in the data area. An identification area in which a recording code indicating that the data is abnormally recorded in the data area is written in the management area, and the IC memory card control device, when writing the data in the data area, Writing the usage code and the recording code into the identification area as a significant state prior to writing the data, IC, characterized in that to release the significant state of the recording code after writing over data
Memory card control method. 2. An IC memory card control device comprising an IC memory card having a plurality of data areas in which data is recorded, and management areas for managing the recording of the data respectively corresponding to the plurality of data areas. In an IC memory card control system which is detachably formed and stores the management information together with the data in the IC memory card, the IC memory card has a usage code indicating that the data is recorded in the data area. The management area is provided with an identification area in which a recording code indicating that the data is abnormally recorded in the data area is written, and the IC memory card control device stores a use code in a significant state from the management area. When the data recorded with the significant state recording code is detected, the information recorded in the management area and the data area is detected. After the IC memory card is initialized, the normally recorded data is extracted based on the usage code and the recording code, and the management information corresponding to the extracted data is stored in the information area. An IC memory card control method characterized by recording and recording the extracted data in the data area. 3. An IC memory card control device comprising an IC memory card having a plurality of data areas for recording data and management areas for managing the recording of the data respectively corresponding to the plurality of data areas. In an IC memory card control system which is detachably formed and stores the management information together with the data in the IC memory card, the system includes a use code indicating that the data is recorded in the data area, An IC memory card having an identification area in the management area, in which a recording code indicating that data is abnormally recorded in the data area, and management information reading means for reading the management information recorded in the management area Management information updating means for updating the management information read by the management information reading means, and the data in the IC memory card. And a data recording unit that writes the data in the data area, the management information updating unit sets the use code and the recording code as significant states in the identification area prior to writing the data. An IC memory card control system, characterized in that the significant state of the recording code is released after the writing and the writing of the data. 4. The IC memory card control system according to claim 3, wherein the system detects, from the read management information, a recording code in a significant state indicating that the recording is abnormal. The management information updating means includes means for reading and saving the data recorded in the data area and saving the storage area to an initial state in which no data is recorded. Management information is read out, management information for recording the data in which the use code of the significant state and the recording code in which the significant state is released are recorded in the storage area, and the management information is updated. Further, the data recording means, based on the updated management information, stores the saved data in the storage area of the IC memory card initialized by the initialization means. An IC memory card control system that writes data.