JPH0687653B2 - Power control circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power control circuit, and particularly to power control of a load connected to a DC power supply via a semiconductor switch by changing the on / off duty of the semiconductor switch. The present invention relates to a power control circuit.

[Conventional technology]

FIG. 4 is a block diagram showing an embodiment of a conventional power control circuit. In the figure, 1 is a DC power supply, 2 is a load lamp, 3 is a semiconductor switch, 7 is a sawtooth wave generation circuit,
Reference numeral 8 is a variable voltage source, and 9 is a comparison circuit.

The sawtooth wave generation circuit 7 generates a sawtooth wave having a substantially constant repetition period, and its voltage amplitude has a value corresponding to the variable width of the voltage of the variable voltage source 8. Now, assuming that the voltage of the variable voltage source 8 is half of the output voltage amplitude of the sawtooth wave generation circuit 7, the output of the comparison circuit 9 has a high level in 1/2 of the sawtooth wave repetition period. 1/2 becomes low level and the duty of turning on / off the semiconductor switch 3 is 50
%become. By adjusting the voltage of the variable voltage source 8, the duty is adjusted to an arbitrary value and the application of electric power to the load 2 is increased or decreased. The repetition period of the sawtooth wave is
If the load 2 has a relatively fast response such as a lamp, 10
Although it is 0 Hz or more, it may be set to 1 Hz or less for thermal control of a heater or the like, and that is preferable in the sense of reducing noise.

[Problems to be solved by the invention]

The above-mentioned conventional power control circuit has a drawback that the number of parts forming each circuit shown in the block is large and is relatively expensive. To increase the repetition period of the sawtooth wave, a large-capacity timing capacitor is required. There were drawbacks such as a fast turn-on and turn-off speed of the semiconductor switch, a large rise of current d _Z / dt, and a tendency to generate noise.

An object of the present invention is to provide a power control circuit which can be configured at low cost with a small number of parts, which makes it relatively easy to lengthen the repetition cycle, and which can easily control the turn-on turn-off speed of a semiconductor switch. It is in.

[Means for solving problems]

The power control circuit of the present invention connects a semiconductor switch connected in series with a load to a DC power source, a terminal 2 to which a sliding piece is connected to the positive terminal of the DC power source, and resistors to the other terminals 1 and 3, respectively. Connected variable resistor, capacitor connected to the resistor, emitter-base series circuit of the transistor, and one resistor connected to the base of the transistor, the anode of PUT is the connection point of the capacitor and the resistor, and the cathode is the transistor And a relaxation oscillation circuit in which a DC power supply is resistance-divided and applied to the gate.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In the figure, 1 is a DC power supply, 2 is a load, 3 is a MOSFET which is a semiconductor switch, 4 is PUT, 5 is a transistor, and R _{1 to} R _1.
6 is a resistor, VR is a variable resistor, and C is a capacitor. Here, for the following explanation, the sliding terminal of the variable resistor VR and the resistor R4
Let VR1 be the resistance between the terminals connected to, and VR2 be the resistance on the side to which one resistance R5 is connected.

Considering immediately after the DC power supply 1 is connected, the resistors VR1 and R4
The capacitor C is charged through this, and this charging current also flows to the base-emitter of the transistor 5, so that the transistor 5 is on and therefore the MOSFET 3 is off. P
A voltage obtained by dividing the voltage of the DC power supply 1 by the resistors R1 and R2 is applied to the gate of UT4. (The resistance of the load 2 is sufficiently smaller than R1 and R2 and can be ignored.) When the charging voltage of the capacitor C becomes higher than the gate voltage of the PUT4, PU
T4 is turned on, capacitor C is PUT4, DC power supply 1, resistance
It discharges through VR2 and R5. During this period, the transistor 5 is off, so the MOSFET 3 turns on and the current flows through the load 2. MOS
By turning on the FET3, the resistance R1 connected to the gate of the PUT4 becomes low potential, and the turning on of the PUT4 is maintained until the discharging of the capacitor C is finished and the charging is restarted through the resistors VR1 and R4. When the capacitor C is recharged and the base-emitter of the transistor 5 is forward biased again, the transistor 5 is turned on and the MOSFET 3 is turned off. When the MOSFET 3 turns off, the resistor R1 connected to the gate of PUT4 is also connected to the high potential side and turns off, and the same operation is repeated. That is, the period during which the capacitor C is charged through the resistors VR1 and R4 is the off period of the MOSFET 3, and the period during which the capacitor C is discharged through the PUT4, the DC power supply 1 and the resistors VR2 and R5 is MO.
This is the ON period of SFET3.

When the resistance VR1 that sets the charging time constant of the capacitor C increases and the OFF period of the MOSFET 3 increases, the resistance VR2 that sets the discharging time constant of the capacitor 3 decreases and the ON period of the MOSFET decreases. In the opposite case, similarly, when the resistance VR1 is small, VR2 becomes large and repeats as a whole, and the duty changes while the cycle remains substantially constant.

Here, PUT4 is a high-sensitivity N-gate thyristor and is suitable for use in such relaxation oscillation. To lengthen its cycle, it is necessary to increase VR1 which is a charging resistor or the capacitance of a capacitor. It has the advantage that it is easy to increase the charging resistance VR1. In addition, since there is electrostatic capacity between the gate and source of MOSFET3, turn-on and turn-off can be set relatively slowly by the time constant with the resistor R6, and the rise and fall of the current becomes gentle, so noise Has the advantage of being reduced.

FIG. 2 is a circuit diagram showing another embodiment of the present invention, in which a resistor R7 is added. The basic operation is the first
As shown in the figure, but when transistor 5 turns from off to on, ie MOSFET 3 goes from on to off, the voltage drop across resistor R7 acts to reverse bias PUT4, facilitating turn-off of PUT4. So the charging resistance VR
It has the advantage of increasing the margin for setting R1 and R4. Third
FIG. 6 is a circuit diagram showing still another embodiment of the present invention,
In the figure, a transistor 6 is added. Figure 1,
In the circuit shown in FIG. 2, the resistance value of the load 2 is the resistance R
Although the operation has been described under the condition that it is sufficiently smaller than 1 and R2, there is a drawback that the effect occurs when the resistance value of the load 2 fluctuates. In the figure, the transistor 6 is turned on / off in synchronization with the turning on / off of the transistor 5, and the gate voltage of the PUT 4 is changed to the MOSFET 3
Controls the same as on and off.

〔The invention's effect〕

As described above, the present invention uses the charging / discharging circuit of the capacitor C in which the PUT 4 and the transistor 5 are combined to form a MOSFET.
Since 3 is driven, the circuit is simple, the cost is low, and the noise is small. Although the present invention has been described in the case where the MOSFET is used as the semiconductor switch for controlling the load, the present invention is not particularly limited to the MOSFET as long as the switch element has the same function. For example, devices such as a combination of a MOSFET and a bipolar transistor are sold as products.

[Brief description of drawings]

FIGS. 1, 2, and 3 are circuit diagrams showing an embodiment of the present invention, and FIG. 4 is a block diagram showing a conventional example. 1 ... DC power supply, 2 ... Load, 3 ... MOSFET (semiconductor switch), 4 ... PUT (N gate thyristor), 5, 6 ...
Transistor, R ₁ ~ R ₇ ...... Resistor, C ... Capacitor, VR
...... Variable resistance, 7 ... Sawtooth wave generation circuit, 8 ... Variable voltage source, 9 ... Comparison circuit.

Claims (1)

[Claims] 1. A load and a semiconductor switch are connected in series between a first power supply terminal and a second power supply terminal, and a base of a transistor whose emitter is connected to the second power supply terminal and the first power supply terminal. A series circuit of a first resistance circuit and a capacitor and a second resistance circuit are connected in parallel, and the anode of the PUT is connected to the connection point between the first resistance circuit and the capacitor and the cathode is connected directly or with a resistance. Through the emitter of the transistor through the collector of the transistor is connected to the control terminal of the semiconductor switch to control the on / off of the semiconductor switch, the PUT is turned off when the transistor is turned on or when the semiconductor switch is turned off. The power control circuit is characterized in that a voltage to satisfy the above condition is supplied to the gate of the PUT.