JPS598430A - Zero cross control circuit - Google Patents

Zero cross control circuit

Info

Publication number
JPS598430A
JPS598430A JP11721582A JP11721582A JPS598430A JP S598430 A JPS598430 A JP S598430A JP 11721582 A JP11721582 A JP 11721582A JP 11721582 A JP11721582 A JP 11721582A JP S598430 A JPS598430 A JP S598430A
Authority
JP
Japan
Prior art keywords
control circuit
power supply
circuit
zero
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11721582A
Other languages
Japanese (ja)
Inventor
Shigeki Hosogoe
細越 茂基
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11721582A priority Critical patent/JPS598430A/en
Publication of JPS598430A publication Critical patent/JPS598430A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/153Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
    • H03K5/1536Zero-crossing detectors

Abstract

PURPOSE:To obtain an excellent waveform-shaped zero cross signal with a simple circuit constitution, by applying the zero cross signal generated at an output terminal of a control transistor(TR) to a control circuit. CONSTITUTION:A TR10 is biased and turned on, while a voltage of an AC power supply 1 is larger than a voltage of a power supply 6 of a control circuit 5, since a charging current flows to the power supply 6 of the control circuit through a diode bridge 2 and an emitter-base junction of the TR10 from the power supply 1. Further, while the voltage of the power supply 1 is lower than the voltage of the power supply 6 of the control circuit, since the emitter-base junction is biased reverse, the TR10 turns off. Thus, the zero cross signal as the input to the circuit 5 is obtained.

Description

【発明の詳細な説明】 本発明は、ゼロクロス制御回路に関し、詳しく祉、交流
電源のゼロク四ス点に同期した制御を行う電子回路に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a zero-cross control circuit, and more particularly to an electronic circuit that performs control in synchronization with four zero-cross points of an AC power source.

従来、この種の回路は第1図の様に構成され、ダイオー
ドブリッジの出力(第2図の電源電圧(a))から抵抗
分割によシゼロクロス信号を取シ出していた。しかしな
がら、ダイオードブリッジの出力は第2図(b)の様に
ダイオードの接合容量の残留電荷の影響でゼロクロスポ
イントの電圧が完全にゼロボルトにならない問題があっ
た。
Conventionally, this type of circuit was constructed as shown in FIG. 1, and a zero cross signal was extracted from the output of the diode bridge (power supply voltage (a) in FIG. 2) by resistor division. However, as shown in FIG. 2(b), the output of the diode bridge has a problem in that the voltage at the zero cross point does not become completely zero volts due to the influence of the residual charge of the junction capacitance of the diode.

この為に、従来の回路では検出用抵抗の値を小さく選ん
で接合容量の電荷の放電時定数を小さくする方法、ある
いは、第3図の様にトランジスタを2個使った波形整形
回路による対策をとっていた。しかしながら、これらの
方法は、前者では抵抗の定格容量が大きくなってしまい
、又後者では部品点数が増えてしまうといういずれにし
ても回路の実装スペースと;ストが増す欠点があった。
To solve this problem, conventional circuits either choose a small value for the detection resistor to reduce the discharge time constant of the junction capacitance, or use a waveform shaping circuit using two transistors as shown in Figure 3. I was taking it. However, these methods have the disadvantage that the rated capacity of the resistor increases in the former case, and the number of parts increases in the latter case, which increases the mounting space and cost of the circuit.

本発明は従来の上記欠点を解決する為になされたもので
あり、従って本発明の目的は、簡単な回路構成によυ波
形整形された良好なゼロクロス信号を発生し得る新規な
ゼロクロス制御回路を提、供することにある。
The present invention was made in order to solve the above-mentioned drawbacks of the conventional technology, and therefore, an object of the present invention is to provide a novel zero-crossing control circuit that can generate a good zero-crossing signal with a υ waveform shaped by a simple circuit configuration. It is about offering and providing.

本発明の上記目的は、整流回路の両出力端に入力端子及
び出力端子を接続され且つ制御端子を制御回路の直流電
源に接続されたトランジスタを具備し、該トランジスタ
の出力端子に発生するゼロクロス信号を、前記制御回路
に供給することを特徴としたゼロクロス制御回路、によ
って達成される。
The above object of the present invention is to provide a transistor including an input terminal and an output terminal connected to both output terminals of a rectifier circuit, and a control terminal connected to a DC power supply of the control circuit, and a zero-cross signal generated at the output terminal of the transistor. This is achieved by a zero-cross control circuit characterized in that it supplies the control circuit with:

以下、本発明をその好ましい一実施例について第4図及
び第5図を参照しながら詳細に説明する。
Hereinafter, a preferred embodiment of the present invention will be explained in detail with reference to FIGS. 4 and 5.

第4図は本発明の一実施例を示す回路構成図である。第
4図において、第1図と同一番号を符した要素は第1図
のそれと同じ機能を持つものであり、即ち、参照番号1
は交流電源、2はダイオードブリッジ、3は負荷、4は
制御用スイッチング素子、5はゼロクロス信号に同期し
て前記スイッチング素子にトリガ信号を供給する制御回
路、6は制御回路の電源をそれぞれ示す。10は本発明
の特徴である交流電源のゼロクロスポイントの検出と制
御回路電源の充電と波形整形とを兼ねた回路である。
FIG. 4 is a circuit configuration diagram showing an embodiment of the present invention. In FIG. 4, elements with the same numbers as in FIG. 1 have the same function as in FIG. 1, i.e. with reference number 1.
2 is an AC power supply, 2 is a diode bridge, 3 is a load, 4 is a control switching element, 5 is a control circuit that supplies a trigger signal to the switching element in synchronization with a zero-cross signal, and 6 is a power supply for the control circuit. Reference numeral 10 denotes a circuit that serves to detect the zero cross point of the AC power source, charge the control circuit power source, and shape the waveform, which are characteristics of the present invention.

この様に構成すれば、交流電源1の電圧が制御回路5の
電源6の電圧よりも大きい期間には、交流電源1からダ
イオードブリッジ2、トランジスタ10のエミッタベー
ス接合を通して制御回路の電源6への充電電流が流れる
ので、トランジスタ10がバイアスされて6オン”する
、又、交流電源1の電圧が制御回路の電源6の電圧より
も低い期間にはエミッタベース接合が逆バイアスされる
ので、トランジスタ10は”オフ”する。従って、制御
回路5の入力として第5図(C)の様なゼロクロス信号
が得られる事になる。第5図で(イ)は交流電源電圧波
形、(ロ)はダイオードブリッジの出力波形、(ハ)は
制御回路5の電源電圧、に)は波形整形されたゼロクロ
ス信号である。
With this configuration, during a period when the voltage of the AC power supply 1 is higher than the voltage of the power supply 6 of the control circuit 5, the power supply 6 of the control circuit is connected from the AC power supply 1 through the diode bridge 2 and the emitter base junction of the transistor 10. Since the charging current flows, the transistor 10 is biased and turned on, and during the period when the voltage of the AC power supply 1 is lower than the voltage of the power supply 6 of the control circuit, the emitter-base junction is reverse biased, so that the transistor 10 is turned on. is turned off. Therefore, a zero-cross signal as shown in Figure 5 (C) is obtained as an input to the control circuit 5. In Figure 5, (A) is the AC power supply voltage waveform, and (B) is the diode waveform. The output waveform of the bridge, (c) is the power supply voltage of the control circuit 5, and (c) is the waveform-shaped zero-cross signal.

上記した本実施例においては、トランジスタlOとして
バイポーラトランジスタが用いられているが、代りにF
ET等のユニポーラトランジスタを使用することも可能
である。ただこの場合には定電圧ダイオードとコンデン
サにょυ構成された電源6をバッテリ又は定電圧電源に
置換する必要がある。
In this embodiment described above, a bipolar transistor is used as the transistor IO, but instead, F
It is also possible to use unipolar transistors such as ETs. However, in this case, it is necessary to replace the power source 6, which is composed of a constant voltage diode and a capacitor, with a battery or a constant voltage power source.

以上説明した様に、本発明によれば、簡単な回路構成に
よシ、ゼロクロス信号が得られるので、装置の実装スペ
ースとコストを低減する事ができる。
As described above, according to the present invention, a zero-cross signal can be obtained with a simple circuit configuration, so that the mounting space and cost of the device can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のゼロクロス信号検出回路の構成例を示す
図、第2図は第1図の回路の各部の波形を示す図、第3
図は従来のゼロクロス信号検出回路の他の構成例を示す
図、第4図は本発明の一実施例を示す回路構成図、第5
図は第4図の各部の波形を示す図である。 110.交流電源、20.。ダイオードブリッジ、3.
、。 負荷、450.半導体スイッチ素子、500.半導体ス
イッチ素子4の制御回路、6.、、制御回路5の電源、
700.電源6の充電回路、8.、、電源電圧検出回路
、900.波形整形回路、10.、、制御用トランジス
タ化 理 人   弁理士 熊谷雄太部 第3図 2
Figure 1 is a diagram showing a configuration example of a conventional zero-cross signal detection circuit, Figure 2 is a diagram showing waveforms of each part of the circuit in Figure 1, and Figure 3 is a diagram showing a configuration example of a conventional zero-cross signal detection circuit.
4 is a diagram showing another configuration example of a conventional zero-crossing signal detection circuit, FIG. 4 is a circuit configuration diagram showing an embodiment of the present invention, and FIG.
The figure is a diagram showing waveforms at various parts in FIG. 4. 110. AC power supply, 20. . Diode bridge, 3.
,. Load, 450. Semiconductor switch element, 500. a control circuit for the semiconductor switch element 4, 6. ,, the power supply of the control circuit 5,
700. Charging circuit for power source 6, 8. , , power supply voltage detection circuit, 900. Waveform shaping circuit, 10. ,, Transistorization for control Patent attorney Yuta Kumagai Figure 3 2

Claims (3)

【特許請求の範囲】[Claims] (1)、整流回路の両出力端に入力端子及び出力端子を
接続され且つ制御端子を制御回路の直流電源に接続され
たトランジスタを具備し、該トランジスタの出力端子に
発生するゼロクロス信号を、前記制御回路に供給するこ
とを特徴としたゼロクロス制御回路。
(1) A transistor is provided whose input terminal and output terminal are connected to both output terminals of the rectifier circuit, and whose control terminal is connected to the DC power supply of the control circuit, and the zero-cross signal generated at the output terminal of the transistor is A zero-cross control circuit characterized by supplying power to a control circuit.
(2)、前記トランジスタをバイポーラトランジスタと
し且つ前記直流電源を定電圧素子とコンデンサの並列回
路で構成し、前記整流回路の出力から前記バイポーラト
ランジスタのエミッタ接合を介して前記コンデンサを充
電することを更に特徴とする特許請求の範囲第(1)項
記載のゼロクロス制御回路。
(2) The transistor is a bipolar transistor, the DC power supply is configured with a parallel circuit of a constant voltage element and a capacitor, and the capacitor is charged from the output of the rectifier circuit via the emitter junction of the bipolar transistor. A zero-cross control circuit according to claim (1).
(3)、前記トランジスタをユニポーラトランジスタと
し、且つ前記直流電源をバッテリ又は定電圧回路とした
ことを更に特徴とする特許請求の範囲第(1)項記載の
ゼロクロス制御回路。
(3) The zero-cross control circuit according to claim (1), further characterized in that the transistor is a unipolar transistor, and the DC power source is a battery or a constant voltage circuit.
JP11721582A 1982-07-05 1982-07-05 Zero cross control circuit Pending JPS598430A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11721582A JPS598430A (en) 1982-07-05 1982-07-05 Zero cross control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11721582A JPS598430A (en) 1982-07-05 1982-07-05 Zero cross control circuit

Publications (1)

Publication Number Publication Date
JPS598430A true JPS598430A (en) 1984-01-17

Family

ID=14706239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11721582A Pending JPS598430A (en) 1982-07-05 1982-07-05 Zero cross control circuit

Country Status (1)

Country Link
JP (1) JPS598430A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6197169A (en) * 1984-10-19 1986-05-15 工業技術院長 Tenacious metal boride base superhard heat resistant material
JPH029341U (en) * 1988-07-01 1990-01-22
JPH0231925U (en) * 1988-08-24 1990-02-28
US5233248A (en) * 1991-07-10 1993-08-03 Mitsubishi Denki Kabushiki Kaisha Heat resistant and explosion-proof type permanent magnetic synchronous motor
EP1326081A2 (en) * 2001-12-28 2003-07-09 Canon Kabushiki Kaisha Zero-cross detection circuit
JP2015060676A (en) * 2013-09-18 2015-03-30 株式会社ヨコオ Spring connector

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6197169A (en) * 1984-10-19 1986-05-15 工業技術院長 Tenacious metal boride base superhard heat resistant material
JPH0122233B2 (en) * 1984-10-19 1989-04-25 Kogyo Gijutsu Incho
JPH029341U (en) * 1988-07-01 1990-01-22
JPH0231925U (en) * 1988-08-24 1990-02-28
US5233248A (en) * 1991-07-10 1993-08-03 Mitsubishi Denki Kabushiki Kaisha Heat resistant and explosion-proof type permanent magnetic synchronous motor
EP1326081A2 (en) * 2001-12-28 2003-07-09 Canon Kabushiki Kaisha Zero-cross detection circuit
EP1326081A3 (en) * 2001-12-28 2008-12-10 Canon Kabushiki Kaisha Zero-cross detection circuit
JP2015060676A (en) * 2013-09-18 2015-03-30 株式会社ヨコオ Spring connector

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