JPH0686215A - Digital signal recording and reproducing device - Google Patents

Abstract

PURPOSE:To obtain a digital signal recording and reproducing device capable of recording a compressed digital video signal as it is and outputting a satisfactory video even when only a part of recording signal is reproduced. CONSTITUTION:A purpose can be attained by separating a compressed video signal inputted from an antenna 1 to intra-frame data and inter-frame data at a receiver 4, applying multiplex recording to the intra-frame data at the recording processing circuit 14 of a recording and reproducing device 5, and outputting data reproduced correctly from a reproduction processing circuit 15. Therefore, it is possible to increase probability to reproduce the intra-frame data and to output the satisfactory video even when only a part of recording signal is reproduced when drop out occurs on a tape or variable speed reproduction is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording / reproducing apparatus for recording / reproducing a digital video signal, and more particularly to an apparatus for recording / reproducing a compressed digital video signal.

[0002]

2. Description of the Related Art Television Society of Japan Vol. 46, No. 3 (199
(2 years) As described on pages 276 to 283, a digital broadcasting system for compressing and transmitting a digital video signal has been considered.

FIG. 2 shows a method of compressing a digital video signal. Reference numerals 21 and 22 represent one frame. The video signal is compressed by compressing all the image information in the frame for every 9th frame as indicated by diagonal lines, and for the other frames, only the difference information is obtained by using the prediction from the data of the previous or subsequent frame. The amount of transmission is reduced by performing compression. In the following description, the former is called an intra frame and the latter is called an inter frame.

[0004]

When recording a video signal sent by such digital broadcasting, if the compressed digital video signal is recorded as it is, the recording capacity is small and the recording is efficient. It can be performed. However, since the video signal is compressed, the video signal cannot be expanded unless all the recorded signals can be played back, and when only a portion of the recorded signal can be played back, such as when dropout occurs on the tape or during variable speed playback. There is a problem that video cannot be output.

An object of the present invention is to provide a digital signal recording / reproducing apparatus capable of recording a compressed digital video signal as it is and outputting a good video even when only a part of the recording signal is reproduced.

[0006]

The above object is to separate a compressed video signal into intra-frame data and inter-frame data, the former is multiplex-recorded, and the data which has been correctly reproduced is output at the time of reproduction. Can be achieved.

[0007]

Since the decompression can be performed independently, and the intraframe data that is the reference when decompressing the interframe data is multi-recorded, the probability that the data can be reproduced can be increased. Further, during variable speed reproduction, the intra frame data is preferentially reproduced to generate an image, so that a good image can be output even during variable speed reproduction.

[0008]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a digital signal recording / reproducing apparatus of the present invention. 1 is an antenna, 4 is a receiving device for receiving the transmitted digital video signal, 6 is a receiving circuit for receiving the signal, 7 is a demodulating circuit for demodulating the digital signal from the received signal, and 8 is generated during transmission An error correction circuit for correcting an error, 9 is a video processing circuit for expanding a compressed video signal, 10 is an audio processing circuit for processing an audio signal transmitted together with the video signal, 11 is a switching circuit, and 12 is recording / reproducing. An interface circuit that inputs and outputs signals to and from the device. Reference numeral 5 is a recording / reproducing device for recording the transmitted digital video signal, 13 is an interface circuit for inputting / outputting a signal to / from a receiving device, 14 is a recording processing circuit for generating a recording signal from the input digital video signal, Reference numeral 15 is a reproduction processing circuit for demodulating a digital signal from a reproduction signal, 17 is a rotary head, 18 is a magnetic tape, and 19 is a servo circuit for controlling the running of the magnetic tape 18.

In the receiving device 4, at the time of normal reception, the switching circuit 11 selects the output of the demodulation circuit 7, and the video signal and the audio signal are output from the output terminals 2 and 3, and at the same time, via the interface circuit 12. The compressed digital video signal is output to the recording / reproducing device 5. When reproducing the recorded signal, the switching circuit 11 selects the output of the interface circuit 12, and the recording / reproducing device 5
The signal reproduced in step 3 is input to the error correction circuit 8. The error correction circuit 8 performs error correction using the error correction code added to the received digital video signal. After that, the video processing circuit 9 and the audio processing circuit 10 perform processing such as expansion and output from the output terminals 2 and 3.

By recording the signal before error correction,
The error correction circuit 8 can correct an error generated at the time of transmission, and at the same time, can detect and correct an uncorrectable error generated in the recording / reproducing device 5.
For an uncorrectable error generated in the recording / reproducing apparatus 5, a flag indicating the error may be received from the recording / reproducing apparatus 5 together with the reproduction signal. Of course, the output of the error correction circuit 8 may be recorded in the recording / reproducing device 5.

At the time of recording, the error correction device 5 adds a recording error correction code, a synchronization signal, etc. to the digital video signal input from the reception device 4 in the recording processing circuit 14 to generate a recording signal, and the rotary head It records on the magnetic tape 18 by 17. At the time of reproduction, the signal reproduced by the rotary head 17 is input to the reproduction processing circuit 15, and the error generated at the time of recording / reproduction is corrected and the digital signal is demodulated. Then, it outputs to the receiving circuit 4.

FIG. 3 shows an example of a signal output from the interface circuit 12 to the recording / reproducing apparatus 5. The interface circuit 12 separates the digital video signal into a high priority signal and a low priority signal and outputs them.
The data 62 has a packet structure, and 63 indicates one packet. The packet is composed of a packet of high priority data (H packet) and a packet of low priority (L packet), and the ratio of the data of H packet and L packet is 1: 4. And H
One packet and four L packets are set as one set, and a synchronization signal 61 is added to it.

The H packet is, for example, intra frame data that can be expanded only by the data of the frame or a control signal of high importance, and the L packet is, for example,
It is composed of inter-frame data and audio data that are expanded using the data of the previous or subsequent frame.

The recording / reproducing apparatus 5 may separate the high priority and the low priority. Further, the H packet and the L packet may be output separately.

FIG. 4 shows the structure of the packet 63. 64
Is a header, which is composed of data type, frame number, position information in the frame, and the like. Reference numeral 65 is data, which is composed of a digital video signal and an error correction code added during transmission.

FIG. 5 shows a recording pattern on the magnetic tape 18. 24 indicates one track. Here, as shown in FIG. 1, it is assumed that two heads are attached to the rotary head 18 so as to face each other by 180 degrees and two-track recording is performed by one scanning. For example, track 1A and 1 in FIG.
Two tracks of B track are recorded at the same time.

FIG. 6 shows the structure of two tracks recorded by one scanning. For example, (A) is a 1A track,
(B) is a 1B track configuration. One track is composed of three areas, and each area is composed of a plurality of blocks. H packet data is recorded in an area 25 in the center of the track where an error is unlikely to occur, and L packet data is recorded in areas 26 at both ends of the track.

FIG. 7 shows the configuration of blocks constituting each area of FIG. 31 is a synchronization signal, 32 is an ID signal, 33
Is packet data, and 34 is a parity for detecting and correcting an error in the packet data 33.

FIG. 8 shows the structure of the ID signal 32. 35
Is a track number for identifying a track, and a number that repeats in a predetermined number of tracks, for example, in units of 16 tracks is used. 36 is a block number for identifying the position of the block in the track. 37 is a flag for identifying the type of packet, which is an H packet or an L packet.
The packet is identified. Reference numeral 38 is control information such as a recording time on the tape and a program number. Control information 38
If multiple recording is performed in the track a plurality of times, it is possible to improve the detection capability at the time of searching. 39 is the ID
It is a parity for detecting a signal error.

FIG. 9 shows the structure of the areas 25 and 26.
The sync signal 31 and the ID signal 32 are omitted in FIG. Packet data is recorded in the first block 41 and the second block 43, and the second block is recorded in the central block 42.
The parity for error detection and correction is recorded. In this way, the error detection and correction capability is improved by using the error detection and correction parity twice. The parity 42 may be arranged at another position such as the last block of the area.

FIG. 10 shows the structure of the regions 25 and 26 more specifically. Here, one area is composed of 34 blocks, and 30 packets of data and 4 blocks of parity 42 are recorded. Reference numeral 51 indicates one block (packet). Record on 2 tracks 12
0 L packets (L0 to L119) are in the SA area, S
The data is sequentially recorded in the B area, the SC area, and the SD area.
On the other hand, 30 H packets (H0 to H29) are doubly recorded in the HA area and the HB area. Further, the packets recorded in the first half of the HA area are recorded in the second half of the HB area. As described above, the data of the H-packet having a high priority is recorded in different areas in a multiplexed manner, so that even if the data is lost due to a dropout on the tape, the data in the error-free area or the area with few errors is recorded. By selecting and outputting, it is possible to correctly reproduce.

FIG. 11 shows the configuration of the recording processing circuit 14. Reference numeral 73 is a storage circuit, 74 is a packet detection circuit, 75 is a parity generation circuit, and 76 is a recording signal generation circuit. The packet data output from the interface circuit 13 is input to the packet detection circuit 74 from the input terminal 71. The packet detection circuit 74 detects the type of packet and stores it in a predetermined position on the storage circuit 73 according to the type. The parity generation circuit 75 generates the C1 parity 34 and the C2 parity 42 from the packet data stored in the storage circuit 73 and stores them in the storage circuit 73. The recording signal generation circuit 76 reads the packet data and the C1 parity and C2 parity stored in the storage circuit 73, adds the synchronization signal 31 and the ID signal 32 into the block format of FIG. 7, and outputs the rotary head from the output terminal 72. Output to 17.

FIG. 12 shows the structure of the reproduction processing circuit 15. Reference numeral 83 is a memory circuit, 84 is a block reproducing circuit, 85 is an error correction circuit, and 86 is a packet output circuit. The reproduction signal reproduced by the rotary head 17 is input to the input terminal 81.
Is input to the block reproduction circuit 84. The block reproducing circuit 84 detects the sync signal 31 and the ID signal 32. Then, the track number 35, the block number 36, and the flag 37 in the ID signal are stored in a predetermined position on the storage circuit 83. In the error correction circuit 85, the storage circuit 83
C1 parity 34 and C2 parity 4 stored in
2 is used to correct the error in the packet data. At the same time, a pointer indicating an error state is generated and stored in the storage circuit 83.
To remember. The packet output circuit 86 reads the packet data from the storage circuit 83 and outputs it from the output terminal 72. For H packet data, the pointer is first read to check if there is an uncorrectable error.
If there is an uncorrectable error, the H packet data in the other area in which multiple recording is performed is read and output. Also,
When outputting the packet data, a pointer may be added and output so that the receiving device 4 can confirm the presence or absence of an error during recording and reproduction.

At the time of variable speed reproduction, only a part of the data of one track can be reproduced because the scanning locus of the head deviates from the track. Therefore, at the time of variable speed reproduction, the H packet data may be preferentially reproduced and the video may be generated by the intra frame data.

FIG. 13 shows the scanning locus of the head during variable speed reproduction. The alternate long and short dash line indicates the scanning locus of the A head (head having the same azimuth as the A track). During variable speed playback,
As indicated by the diagonal lines in FIG. 13, the servo circuit 19 controls the running of the magnetic tape 18 so that the head can trace the first half or the second half of the HA or HB area where the H packet data is recorded. Since the H packet data is multiplexed and recorded in the first half or the second half of the HA area and the second half or the first half of the HB area, it suffices that either one can be reproduced.

In the reproduction processing circuit 15, the error correction circuit 85
In (1), error detection and correction are performed in block units by the C1 parity 34, and packet data of a correctly reproduced block is output to the receiving device 4. In the receiving device 4, the position of the video signal is identified by the header 64 of the packet and expanded, and the video signal which cannot be reproduced is subjected to processing such as complementing with the previous video signal and output.

[0028]

According to the present invention, it is possible to independently perform decompression, and it is possible to increase the probability that intraframe data that is the reference when decompressing interframe data can be reproduced, and the intraframe data can be reproduced on the tape. A good image can be output even when only a part of the recording signal can be reproduced, such as when dropout occurs. Furthermore, even during variable speed reproduction, good video can be output by preferentially reproducing intra frame data.

[0029]

[Brief description of drawings]

FIG. 1 is a configuration of a digital signal recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a digital video signal compression method.

FIG. 3 shows a recording / reproducing device 5 from an interface circuit 12.
It is a timing diagram of the signal output to.

FIG. 4 is a configuration diagram of a packet 63.

5 is a recording pattern diagram on the magnetic tape 18. FIG.

FIG. 6 is a configuration diagram of two tracks recorded by one scan.

FIG. 7 is a block diagram of blocks forming each area of FIG. 6;

FIG. 8 is a configuration diagram of an ID signal 32.

FIG. 9 is a configuration diagram of regions 25 and 26.

FIG. 10 is a specific configuration diagram of areas 25 and 26.

FIG. 11 is a configuration diagram of a recording processing circuit 14.

FIG. 12 is a configuration diagram of a reproduction processing circuit 15.

FIG. 13 is a diagram showing a scanning locus of a head during variable speed reproduction.

[Explanation of symbols]

4 ... Receiving device, 5 ... Recording / reproducing device, 12 ... Interface circuit, 13 ... Interface circuit, 14 ... Recording processing circuit, 15 ... Reproduction processing circuit, 19 ... Servo circuit, 73
... storage circuit, 74 ... packet detection circuit, 75 ... parity generation circuit, 76 ... recording signal generation circuit, 83 ... storage circuit,
84 ... Block reproduction circuit, 85 ... Error correction circuit, 86 ...
Packet output circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Keiji Noguchi 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Ltd.

Claims (4)

[Claims] 1. A digital signal recording / reproducing apparatus for recording / reproducing a digital video signal composed of a signal composed of difference information between a signal composed of full-screen information and a front or rear frame signal. Recording means for dividing into a first signal and a second signal including a signal of a signal constituted by the full screen information and recording the first signal and the second signal in different areas on a recording medium, respectively. A digital signal recording / reproducing apparatus characterized by being provided with. 2. The digital signal recording / reproducing apparatus according to claim 1, wherein said recording means multiplex-records said first type signal in a plurality of areas. 3. The recording medium is a magnetic tape, and the recording means records the first signal at the center of the magnetic tape and the second signal at both ends. The digital signal recording / reproducing apparatus according to claim 1 or 2. 4. When the reproduction is performed at a feed speed different from the feed speed of the recording medium at the time of recording, control means for controlling the feed speed of the recording medium so that the first signal is reproduced most. The digital signal recording / reproducing apparatus according to claim 1, wherein the digital signal recording / reproducing apparatus is provided.