KR100221414B1 - Digital signal recording and reproducing device - Google Patents

Abstract

An apparatus for recording and reproducing a compressed digital video signal, wherein the digital video signal can be recorded directly and can be reproduced with good quality even when only a part of the recording signal can be reproduced. In order to be able to reproduce the original video signal satisfactorily even in the trick play mode, i.e., at a speed different from the normal speed, the priority of the signal is lower than that of the first conventional signal having high priority and the signal of the first kind. Recording means for receiving a digital video signal comprising a second type of signal and multiplexing and recording the first type of signal on a recording medium multiple times; and reproducing means for reading information from the recording medium and reproducing the digital video signal. Prepared.

With such a configuration, it is possible to increase the probability of being able to expand independently and to reproduce the interlayer frame data used as a criterion when the interframe data is extended. The effect that a good image can be output even when only a part can be reproduced is obtained.

Description

Digital signal recorder

The present invention relates to a digital signal recording and reproducing apparatus for recording and reproducing digital video signals, and more particularly, to an apparatus for recording and reproducing a compressed digital video signal.

Digital broadcasting system that compresses and transmits digital video signal is "ERROR CONCEALMENT IN DIGITAL SIMULCAST AD-HDTV DECODER" Trans. on Consumer Electroincs, Vol. 38, no. 3, August 1992, pp. 108-118 and "MPEG-Based Video Conding for Digital Simulcasting", International Workshop on HDTV '92, Nov. 18-20, 1992, Proceedings Vol. I, pp. Proposed as described in 141-148.

2 is a diagram showing the digital video signal compression method described in the above document. 21 and 22 each represent one frame. For example, as indicated by dots in FIG. 2, all image information is compressed every nine frames of the video signal, and only the difference information of each other frame is taken from the data of the previous frame or the next frame. By predicting and compressing, the amount of data to be transmitted can be reduced. Hereinafter, the former frame is called intraframes, and the latter frame is called interframes.

Compressed digital video signals transmitted by digital broadcasting can be directly recorded with high efficiency in a small area. However, since the video signal is compressed, the video signal cannot be extended unless all of the video signals can be reproduced. The original video signal cannot be output when a dropout occurs on the magnetic tape, when playing in trick play mode (playing at a speed different from the normal speed), or when only part of the recording signal can be played. there is a problem.

Further, almost no lead error occurs in the center portion of the recording magnetic tape during reproduction, but lead errors occur at both ends. Therefore, when the intra frame is recorded at both ends of the tape, the frost of the reproduced video is degraded due to lead errors occurring at both ends at the time of reproduction.

An object of the present invention is to record a compressed digital video signal as it is, without stretching, and to read data with high right-to-rightness, such as interframe data, with a low error, thereby making it possible to reproduce video signals satisfactorily. A digital signal recording and reproducing apparatus is provided.

It is another object of the present invention to provide a digital signal recording and reproducing apparatus capable of directly recording a compressed digital video signal as it is and reproducing the original video signal satisfactorily even when only a part of the recording signal can be reproduced.

It is still another object of the present invention to record a compressed digital video signal as it is and to reproduce the original video signal satisfactorily even when the compressed digital video signal is reproduced in a trick play mode, that is, at a speed different from the normal speed. It is to provide a recording and reproducing apparatus.

1 is a diagram showing a digital signal recording and reproducing apparatus according to an embodiment of the present invention.

2 is a diagram illustrating a method of compressing a digital video signal.

3 is a timing diagram of an example of a signal supplied to a recording and reproducing apparatus at an interface a and b.

4 is a format diagram of a packet.

5 shows a recording pattern on magnetic tape.

Sixth a and b show two tracks recorded by one scanning operation;

FIG. 7 is a format diagram of one block of each area shown in FIGS. 6A and 6B.

8 is a format diagram of an ID signal.

9 is a format diagram of each area shown in FIGS. 6A and 6B.

10A to 10F are detailed format diagrams of respective areas.

11 is a block diagram of a recording processor.

12 is a block diagram of a playback processor.

Fig. 13 is a diagram showing the scanning trajectory of the head in the trick play mode or at a speed different from the normal speed.

14 is a block diagram of an interface circuit in a receiving device.

Fig. 15 is a block diagram of an interface circuit in the recording / playback apparatus.

16 is a block diagram of a servo circuit.

17 is a waveform diagram used to explain the operation of the servo circuit.

18A to 18D are four track format diagrams based on one rotation of a rotating head in a digital signal recording and reproducing apparatus according to another embodiment of the present invention.

19 is a format diagram of an area.

20a to f are concrete format diagrams of tracks 1A and 1B.

21 is a diagram showing the scanning trajectory of the head in the normal double speed mode.

22A to 22B show the formats of two track blocks recorded by one scanning operation in the digital signal recording and reproducing apparatus according to still another embodiment of the present invention.

23A to 23B show different formats of two track blocks recorded by one scanning operation.

24A to 24B show another format of two track blocks by one scanning operation.

An object of the present invention can be achieved by recording high priority data such as interframe data and low priority data such as interframe data in another area of the magnetic tape. It is preferable to record high priority data inside or in the center of the magnetic tape.

Another object of the present invention can be achieved by separating high priority data such as interframe data and low priority data such as interframe data and multi-recording the former, that is, high priority data. In this case, the well-reproduced data of the interframe data recorded in the multi-record multi-layered area is output, so that the original video signal is reproduced correctly. Intraframe data, which is used as reference data when decompressing interframe data, can expand interframe data independently and can be recorded in a multilayer area of a magnetic tape, so that data can be recorded with good probability with good probability. .

A further object of the present invention is to achieve by preferentially reproducing high-priority data, such as intraframe data, in a trick play mode, i.e., to output a video signal reproduced at a speed different from the normal speed. Can be.

EMBODIMENT OF THE INVENTION Hereinafter, the Example of this invention is described using drawing.

In addition, in each figure, the same part is shown with the same code | symbol, and the repeated description is abbreviate | omitted.

1 is a block diagram of a digital signal recording and reproducing apparatus according to one embodiment of the present invention. In Fig. 1, reference numeral 1 denotes an antenna, reference numeral 4 denotes a receiver for receiving a transmitted digital video signal, reference numeral 6 denotes a tuner for receiving a signal from an antenna, and reference numeral 7 denotes a digital signal. A demodulation circuit for demodulating, (8) an error correction circuit for correcting errors occurring in transmission, (9) an image signal processor for extending a compressed video signal, and (10) an audio signal transmitted together with the video signal. An audio signal processor for processing 11 is a multiplexer for inputting and outputting signals to and from a recording and reproducing apparatus, and 12 is an interface circuit. In addition, reference numeral 5 denotes a recording / playback apparatus for recording the burned digital video signal, 13 an interface circuit for performing input / output with a receiving apparatus, and 14 a recording processor for generating a signal recorded from an input digital video signal. 15 denotes a reproducing processor for demodulating a reproduced signal into a digital signal, 17 a rotating head drum having magnetic heads A and B, 18 a magnetic tape, and 19 a magnetic tape 18 for driving. It is a servo circuit to control.

In the normal reception at the receiving device 4, the multiplexer 11 selects an output from the demodulation circuit 7 and outputs a video signal and an audio signal to the output terminals 2 and 3. As shown in FIG. At the same time, the compressed digital video signal is supplied to the recording / playback apparatus 5 via the interface circuit 12. When reproducing the recorded signal, the multiplexer 11 selects the output from the interface circuit 12 and supplies the signal reproduced by the recording / reproducing apparatus 5 to the error blackout circuit 8. The error correction circuit 8 corrects an error of the reproduced signal by using an error correction code added to the received digital video signal. Thereafter, the error correction signal is subjected to processing such as decompression by the video signal processor 9 and the audio signal processor 10, and then output from the output terminals 2 and 3. As shown in FIG.

Since the signal before the error correction is recorded, the error correction circuit 8 can correct an error occurring at the time of transmission, and even for an error that is generated in the recording / reproducing apparatus 5 and cannot be corrected in the apparatus 5. Can be detected and corrected. In addition, a flag indicating an error can be received by the recording / playback device 5 together with the playback signal even for an error that is generated in the recording / playback device 5 and cannot be corrected. Of course, the output from the error correction circuit 8 may be recorded in the recording / playback apparatus.

In the recording / reproducing apparatus 5, at the time of recording, the recording processor 14 adds a recording error correction code, a synchronization signal, or the like to the digital video signal supplied from the receiving apparatus 4, and outputs the recording signal. Is recorded on the magnetic tape 18 by using " The signal reproduced by the rotating head 17 at the time of reproduction is supplied to the reproduction processor 15, corrects an error occurring during recording and reproduction, and demodulates the correction signal into a digital signal and supplies it to the receiver 4.

FIG. 3A is a diagram showing an example of a signal output from the interface circuit 12 to the recording / playback apparatus 5. FIG. The interface circuit 12 separates the digital video signal into a high priority signal and a low priority signal. The data 62 has a packet configuration and consists of a packet 620, a packet 630, and the like. These packets include high priority packets (H-packets 620) and low priority packets (L-packets 630). The ratio of H-packet and L-packet data is 1: 4. One H packet and four L-packets are made into one set, and a synchronization signal 61 is added thereto. In this embodiment, H-packets and L-packets are supplied in time division on the same signal line.

The H-packet is formed of, for example, interframe data of all image information that can be independently extended and important control signals. The L packet is formed of, for example, interframe data and voice data that can be expanded by using data adjacent to a preceding frame, that is, adjacent frame data.

3B is a diagram showing another example of the signal output from the interface circuit 12 to the recording / playback apparatus 5. FIG. In this example, the interface circuit 12 separates the digital video signal into high priority data and low priority data, and outputs the data separately. As shown in FIG. 3A, the data 62 has a packet structure, that is, a high priority data (H-packet) 621 and a low priority data (L-packet) 631. FIG. The ratio of the amount of data of the H-packet and the L-packet is 1: 4, and the transmission rate of the L-packet and the data 631 is four times that of the H-packet data 621. One H-packet and four L-packets are made into one set, and a synchronization signal 61 is added thereto.

Hereinafter, detailed configurations of the interface circuits 12 and 13 will be described. Separating the video signal into H-packets and L-packets is performed in the interface circuit 13 in the recording / playback apparatus 5. If the digital video signal transmitted and received from the antenna 1 is already separated into an H-packet sequence and an L-packet sequence, there is no need to separate it in the interface circuit.

4 is a diagram illustrating the format of a packet 620, 621, 630, or 631. Reference numeral 64 denotes a header, which is composed of data type (dividing whether it is an H-packet or an L-packet), a frame number, position information in a frame, and the like. Numeral 65 denotes data of a digital video signal and audio signal, and numeral 66 denotes parity added for error detection and correction during transmission.

5 shows a recording pattern on the magnetic tape 18. As shown in FIG. Reference numeral 24 denotes each track of the recording pattern. As shown in FIG. 1, the drum 17 has two pairs of heads A and B which are mounted to face 180 degrees. Therefore, two tracks are simultaneously recorded by one scanning operation. For example, two tracks of 1A and 1B are simultaneously recorded as shown in FIG.

6A and 6B show an example of a format of two tracks recorded by one scanning operation. For example, FIG. 6A shows a format of a track 1A, and FIG. 6B shows a format of a 1B track. Each track is composed of three areas, and each area is composed of several blocks. The area 25 is the center of the track, and the frequency of error occurrence in this area is low. In this area 25, H-packet data is recorded. In the area 26 at both ends of the track, L-packet data is recorded. Therefore, the recording rate can be reduced by dividing the recording data into two and simultaneously recording the data divided into two tracks.

The rotational speed of the rotating head is synchronized with the number of packets recorded by one scanning operation. That is, the rotating head is controlled to rotate 180 degrees during the time that the packet recorded in one scanning operation is transmitted from the receiving device 4. Thereby, the process of the interface with the receiving apparatus 4 can be performed easily.

FIG. 7 is a diagram showing respective formats of blocks constituting each area shown in FIGS. 6A and 6B. The block is composed of a synchronization signal 31, an ID signal 32, a packet data 33, and a parity 34 for detecting and correcting errors in the packet data 33.

8 shows the format of the ID signal 32. As shown in FIG. The track number 35 for identifying the track has a predetermined number of cycles, for example 16 cycles. The block number 36 is used to identify the position of the block in the track. The flag 37 is used to determine the type of packet, i.e., H-packet or L-packet. The control information 38 indicates information such as the recording time on the tape, the program number, and the like. If the control information 38 is repeatedly recorded in various areas in the track, it can be used efficiently during the search operation. Parity 39 is used to detect an error in the ID signal.

The regions 25 and 26 have a common format as shown in FIG. 9, and the synchronization signal 31 and the ID signal 32 are omitted. Packet data is recorded in the first part 41 and the second part 43, and the second error detection correction parity is recorded in the center part 42. Dual parity for error detection correction improves error detection correction capability. The parity 42 may be disposed at another position such as the end of the area.

10A to 10F illustrate the formats of the regions 25 and 26 in more detail. One area is composed of 34 blocks, 30 blocks are used for packet data, and 4 blocks are used for parity 42. Reference numeral 51 denotes one block (packet).

120 L-packets (L0-L119) recorded over two tracks are sequentially arranged in the LA region (Figure 10a), LB region (Figure 10c), LC region (Figure 10d), and LD region (Figure 10f). Is recorded. On the other hand, 30 H-packets (H0-H29) are recorded in the double recording method in the HA area (Fig. 10b) and the HB area (Fig. 10e). In addition, packets recorded in the first half of the HA area are recorded again in the second half of the HB area. If data with high priority is repeatedly recorded in several different areas in a multi-recording manner as described above, data recorded in an area where there is no error or less error even if a dropout exists on the tape can be selected and reproduced.

11 is a block diagram of the recording processor 14. The write processor is composed of a memory 73, a packet detection circuit 74, a parity generator 75 and a write signal generator 76. Packet data from the interface circuit 13 is supplied to the packet detection circuit 74 via the input terminal 71. The packet detection circuit 74 detects the type of the packet, and the memory 73 stores the packet data at a predetermined position in accordance with the detected type. The parity generator 75 generates C1 parity 34 and C2 parity 42 from the packet data stored in the memory 73 and stores the C1 parity 34 and C2 parity 42 in the memory 73. The write signal generator 76 reads packet data and C1 and C2 parity from the memory 73, and adds the synchronization signal 31 and the ID signal 32 to form the block format shown in FIG. The output signal from the recording signal generator 76 is supplied to the rotating heads A and B on the drum 17 via the output terminal 72.

12 is a block diagram of the playback processor 15. As shown in FIG. The reproducing processor 15 is composed of a memory 83, a block data reproducing circuit 84, an error correction circuit 85, and a packet data output circuit 86. The reproduction signals from the rotation heads A and B on the drum 17 are supplied to the block data reproduction circuit 84 via the input terminal 81. The block data reproduction circuit 84 supplies the synchronization signal 31 and the ID signal. (32) is detected. The memory 83 stores the packet in a predetermined position in accordance with the track number 35, the block number 36, and the flag 37 in the ID signal. The error correction circuit 85 corrects an error in the packet data by using the C1 parity 34 and the C2 parity 42 stored in the memory 83. At the same time, a pointer indicating an error state is generated and stored in the memory 83. The packet data output circuit 86 reads packet data from the memory 83 and outputs it from the output terminal 82. For H-packet data, first read the pointer and check whether or not it is an uncorrectable error. If the error is not correctable, the H-packet data is read in another area in which it is recorded. When the packet data is output, a pointer may be added so that the reception apparatus 4 can confirm the presence or absence of an error in recording or reproducing.

When the playback is made at a speed or trick play mode that is different from the normal speed, only a part of each track can be played back because the head is scanned out of the track. In trickframe mode, the H-packet is played first and the image is generated from the intraframe data.

FIG. 13 shows the trajectory of the rotating head in the trick play mode. The dashed-dotted line represents the trajectory of head A (head having the same azimuth angle as track A). By controlling the magnetic tape 18 by the servo circuit 19 in the trick flame mode, the first half or the second half of the HA region or the HB region for recording the H-packet data, as indicated by the oblique region shown in FIG. Can trace. Since the H-packet data is recorded twice in the first half or the second half of the HA area and the first half or the second half of the HB area, either side may be reproduced. The configuration of the servo circuit 19 will be described next.

The error correction circuit 85 in the playback processor 15 performs error detection correction on each block by using the C1 parity 34. The packet data of the corrected block is supplied to the receiving device 4. In the receiver 4, the video signal processor 9 identifies and extends the position of the video signal in the header 64 of the packet. Video signals that could not be reproduced are interpolated by the previous video signals.

14 is a block diagram of the interface circuit 12. In FIG. 14, an output signal (packet) from the demodulation circuit 7 (see FIG. 1) at the time of writing is supplied to the data divider 100 and separated into an H-packet and an L-packet. This separation is performed by using an identification signal indicating the type of data, such as whether it is an H-packet or an L-packet, included in each packet. Separate H-packets and L-packets are stored in H-registers 102 and L-registers 104, respectively. The outputs of the H-register 102 and the L-register 104 are connected to the input of the multiplexer (MPX) 106. The timing generator 108 receives the clock signal generated by the receiver 4, and outputs a control signal H- such that the multiplexer 106 can output the data string 62 as shown in FIG. 3A, for example. Supplies to register 102, L-register 104 and multiplexer 106. The synchronizing signal 61 is also generated. The output 62 and the synchronization signal 61 from the multiplexer 106 are supplied to the interface circuit 13 in the recording / playback apparatus 5.

At the time of reproduction, the data string 62 and the synchronization signal 61 from the interface circuit 13 are supplied to the H-register 112, the L-register 114, and the synchronization detector 110, respectively. The H-packets and L-packets included in this data string are stored in the H-register 112 and the L-register 114, respectively. The H-register and the L-register are controlled by the synchronous detector 110 and the stored H-packets and L-packets are supplied to the data synthesizer 116. The data synthesizer 116 converts the packet into a format of a reproduction signal identical to the output from the demodulation circuit 7 and supplies the packet to the multiplexer 11.

FIG. 15 shows a block diagram of the interface circuit 13 of the recording / playback apparatus.

At the time of writing, the synchronization signal 61 and the data string 62 from the interface circuit 12 in the receiving device 4 are sent to the H-register 118, the L-register 120 and the synchronization detector 124, respectively. Supplied.

The synchronous detector 124 controls the H-register 118 and the L-register 120, and separates the data string 62 into H-packets and L-packets and supplies them to the recording processor 14. The sync detector 124 also generates a clock used in the write processor 14.

H-packet, L-packet and clock from the playback processor 15 (signal identical to the output signals from the H-register 118, L-register 120 and the sync detector 124 of the proxy) at the time of playback. Is supplied to the H-register 126, L-register 128 and the timing generator (13). Output signals from the H-register 126 and the L-register 128 are supplied to the multiplexer 132.

The timing generator 130 controls the H-register 126, the L-register 128, and the multiplexer 132, and generates and receives the data string 62 and the synchronization signal 61 as shown in FIG. 3A. To the H-register 112, the L-register 114 and the sync detector 110 of the interface circuit 12 of the apparatus 4, respectively.

Those skilled in the art will readily understand that data streams in the format shown in FIG. 3B can be separated and synthesized by the same circuit configuration.

16 is a block diagram of the servo circuit 19. As shown in FIG. In FIG. 16, the tracking signal detected by the head 140 and amplified by the amplifier 142 is supplied to one input of the comparator 144, and the multiplexer 146 receives the other input of the comparator 144. Phase is compared with the reference signal supplied by. The output signal from the comparator 144 indicating the comparison result is supplied to the motor drive circuit 145. The motor drive circuit 145 controls the capstan motor 148 according to the comparison result. One input terminal of the multiplexer 146 is supplied with a reference signal reproduced in a normal speed mode, and the other input terminal is supplied with a reference signal reproduced in a trick play mode (for example, a double speed mode). The playback mode setting signal of the multiplexer 146 is controlled to select an arbitrary playback mode.

FIG. 17 is a diagram showing a reference signal for normal speed regeneration mode and a reference signal for double speed regeneration mode. By providing a predetermined phase difference between these signals as shown in the figure, the magnetic tape can be controlled so that the rotating head traces an arbitrary area on the magnetic tape in a trick play mode such as a double speed regeneration mode.

According to the above embodiment, the decompression can be performed independently and the probability of reproducing the interframe data used as a reference when decompressing the interframe data can be increased. In addition, even when a dropout occurs on the tape and only a part of the recording signal can be reproduced, a good video signal can be output. In addition, even in the trick play mode, the inter frame data can be selectively reproduced to output a good video signal.

In the above-described embodiment, H-packets such as interframe data are recorded multiplely on various tracks of magnetic tape and inside or center of the tape as shown in Figs. 6A and 6B. However, since recording / lead errors do not occur very much at the inside or the center of the tape, the H-packet may be recorded at the center without multiple recording. In this case, a better signal can be obtained than when the transmitted compressed data is directly recorded on the tape as it is.

Another embodiment of the digital signal recording and reproducing apparatus of the present invention will be described next. This embodiment differs from the above embodiment in that the format of the recording data is the same, and the circuit configuration is the same.

Description of the circuit configuration of this embodiment will be described using the circuit configuration of the above-described embodiment.

The signal supplied from the interface circuit 12 to the recording / playback apparatus 5 is as shown in Figs. 3A and 3B, for example. The recording pattern on the magnetic tape 18 is as shown in FIG. In this embodiment, as shown in FIG. 1, two tracks can be recorded simultaneously in one scanning operation by mounting two pairs of rotating heads A and B on the drum 17 so as to face each other by 180 degrees. . For example, as shown in FIG. 5, two tracks of 1A and 1B are simultaneously recorded.

18A to 18D show four tracks 1A, 1B, 2A, and 2B formed when the rotation heads A and B rotate once. Each track consists of three areas, each of which consists of several blocks. H-packet data is recorded in the area 25 with low error correction frequency, and L-packet data is recorded in both end areas 26 of the track. The above information of the H-packet data is repeatedly recorded in the tracks 1A, 1B, 2A and 2B.

As shown in FIG. 7, each of the blocks constituting each of the regions shown in FIGS. 18A to 18D has errors in the synchronization signal 31, the ID signal 32, the packet data 33, and the packet data 33. As shown in FIG. It consists of a detection correction parity 34.

The format of the ID signal 32 is similar to that shown in FIG. In this format, each track 1A, 1B, 2A, and 2B can be identified by the track number 35. Regions 25 and 26 have a common format shown in FIG. In Fig. 19, the synchronization signal 31 and the ID signal 32 are omitted. Packet data is recorded in the central portion 41 of this area, and the second error detection correction parity is recorded in the front and rear portions 42. The error detection and correction capability can be improved by using the parity for error detection correction twice. The parity 42 may be arranged at another position such as the end of the area.

More specifically, the format of the areas 25 and 26 of FIGS. 20A to 20F is shown. Each area consists of 66 blocks, 60 blocks (packets) are used for the data 41, and 6 blocks are used for the parity 42. Reference numeral 51 denotes one block (packet). The formats shown in Figs. 20A to F are for two track numbers of 1A and 1B in Figs. 18A and b. 240 L-packets L0-L239 recorded over two tracks are sequentially recorded in the areas L1, L2, L3, and L4. 120 H-packets H0-H119 are recorded in the regions H1 and H2. The following 240 L-packets (L240-L479) are recorded in the areas L5-L8 in the tracks 2A and 2B shown in FIGS. 18C and d, and the same H-packets as the tracks 1A and 1B are recorded in the areas H1 and H2. H0-H119) are recorded. By repeatedly recording high-priority packet data on another track, even if a dropout occurs on the tape, accurate data can be selected in an area where there is no error or less.

The configuration and operation of the recording processor and the reproducing processor are the same as those shown in Figs. 11 and 12, and thus description thereof is omitted.

In the reception apparatus 4, an uncorrectable error occurring at the time of recording / reproducing can be detected and corrected using the parity 66 added for the detection and correction of the error occurring at the time of transmission. At this time, by using the pointer supplied from the playback processor 15, the correction ability can be further improved. This also applies to the embodiment described initially. In trick-play mode, the head is scanned off track, so only a portion of the data can be played on each track. Therefore, in the trick play speed mode, the H-packet data is preferentially reproduced and an image is generated from the intraframe data.

21 is a diagram showing the scanning trajectory of the head in the double speed mode. In the same figure, 71 denotes head A (head having the same azimuth angle as track A), 72 denotes head B (head having the same azimuth angle as track B), and the dashed-dotted line indicates the scan trajectory of the head. Indicates. In the double speed mode, the A head 71 and the B head 72 scan every two tracks. Therefore, if the magnetic tape 18 is controlled by the servo circuit 19 so that the head can scan the center portions H1 and H2 of the track, as shown by the oblique region in FIG. 21, in the regions H1 and H2 every two tracks. H-packet data can be played. As shown in Fig. 18, since the H-packet is recorded in a repeating manner in units of two tracks, it is sufficient that either side of the recording area can be reproduced. In other words, all H-packet data and intraframe data can be reproduced in the double speed mode. Also, about 2 times H-packet data which is not multi-recorded can be reproduced even in a mode of 3 times speed or more.

By increasing the number of times of multirecording of H-packet data, playback can be performed at a higher speed than normal speed. For example, if the H-packet data in the regions H1 and H2 is repeatedly recorded in six different tracks 1A, 1B, 2B and 2A, and 3A and 3B, all the H-packet data is recorded in triple speed mode. can do. Similarly, by repeating the recording n times, all H-packet data can be reproduced in the n-speed mode.

When the number of heads used is changed, the number of tracks to be recorded in another area is determined according to the number of tracks recorded by one scanning operation. When one track is recorded in one scanning operation using two heads, one track length of H-packet data is repeatedly recorded over two or more tracks. When four tracks are recorded by one scanning operation using eight heads, four track length H-packet data may be repeatedly recorded over eight tracks or three times or more of four tracks.

In this embodiment as well, the decompression can be performed alone, and the probability of the interframe data used as a reference for decompressing interframe data can be increased. In addition, even when a part of the recorded signal is lost due to drop out of the tape yarn, a good image can be output. In addition, even in the trick play mode, a good video can be output by preferentially reproducing the interframe data.

Hereinafter, another embodiment of the digital signal recording and reproducing apparatus of the present invention will be described. This embodiment differs from the above-described embodiment in the recording format, but in the same circuit configuration. Therefore, the circuit configuration will be described using the circuit configuration of the above-described embodiment.

The signal supplied from the interface circuit 12 to the recording / playback apparatus 5 is as shown in FIG. 3A or FIG. The recording pattern on the magnetic tape 18 is as shown in FIG. Also in this embodiment, as shown in FIG. 1, two pairs of rotating heads A and B are mounted on the drum 17 so as to face 180 degrees, so that two tracks can be recorded simultaneously in one scanning operation. For example, as shown in FIG. 5, two tracks of 1A and 1B can be recorded simultaneously. Packet data is recorded in block format on each track.

22A and 22B show a block format of two tracks recorded in one scanning operation. In block 25, H-packet data is recorded, and in block 26, L-packet data is recorded. For example, FIG. 22A is a format diagram of 1A track, and FIG. 22B is a format diagram of 1B track. One track is a unit of three blocks, H packet data is recorded in one block, and L-packet data is recorded in two blocks. For example, 90 blocks are recorded in one track. In addition, the same information of the H-packet data is repeatedly or repeatedly recorded on two different tracks A and B. FIG.

Each of the blocks 25 or 26 shown in FIGS. 22A and 22B shows the synchronization signal 31, the ID signal 32, the packet data 32, and the packet data 33 as shown in FIG. Parity 34 for error detection correction.

The format of the ID signal 32 is composed of a track 35, a block 36, a flag 37, control information 38 and a parity 39, as shown in FIG.

The data format of each track is the same as that shown in FIG. In FIG. 9, the packet data is recorded in the first half 41 and the second half 43, and the second error detection correction parity is recorded in the middle 42. FIG. The parity 42 forms a code sequence of data of each block in units of three blocks. That is, the H packet data block, the L1 or L3 packet data block and the L2 or L4 packet data block shown in Figs. 22A and 22B constitute the code sequence of the parity 42. In this way, the error detection and correction capability can be improved by using the error detection and correction parity in duplicate. The parity 42 may be arranged at another position such as the end of the track.

23A and 23B show the formats of different tracks of two tracks recorded in one scanning operation. As shown in Figs. 23A and 23B, the synchronization signal 31 and the ID signal 32 are added in units of three blocks. As a result, the redundancy of the recording signals can be reduced. In addition, since blocks of high-priority data, that is, H-packet data, are arranged at a position close to the synchronization signal 31, the detection capability at the time of reproduction can be made the same as when a synchronization signal is added to each block. The parity 34 and the parity 42 may be added as shown in FIG.

24A and 24B show the formats of the other tracks of two tracks recorded in one operation. As shown in Figs. 24A and B, the information of the H-packet data is repeatedly recorded in different areas of the track A, and the L-packet is recorded in the track B. By increasing the number of repetitions of recording the H-packet in another area, the detection capability at the time of reproduction can be improved. The synchronization signal 31 and the ID signal 32 may be added in units of blocks or 4 blocks.

The configuration and operation of the recording processor and the reproduction processor are the same as in FIGS.

In the trick play mode, the head is scanned off track, so that only a part of the data recorded on each track is reproduced. Therefore, in the trick play mode, the H-packet data may be preferentially reproduced and an image may be generated from the intraframe data.

As described above, according to the present invention, it is possible to increase the probability of independently reproducing and reproducing the interframe data used as a reference for extending the interframe data. In addition, even when only a part of the recording signal can be reproduced by dropout on the tape, a good image can be output.

Claims (1)

Receiving means (13) for receiving a digital video signal comprising a first kind of signal having a high priority and a second kind of signal having a lower priority than the first kind of signal, and received by the receiving means Detection means 74 for detecting the type of digital video signal, arrangement means 73 for multiplexing and arranging the signal of the first kind detected by the detection means, and a signal arranged by the arrangement means. A digital signal comprising parity adding means 75 for adding parity, recording means for recording the parity-added signal on a recording medium, and reproducing means for reading information from the recording medium and reproducing the digital video signal. Record and playback device.