JP3301424B2 - Digital signal recording / reproducing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording / reproducing apparatus for recording / reproducing a digital video signal, and more particularly to a device for recording / reproducing a compressed digital video signal.

[0002]

2. Description of the Related Art The Institute of Television Engineers of Japan, Vol. 46, No. 3 (199)
(2nd year) As described on pages 276 to 283, a digital broadcasting system for compressing and transmitting digital video signals has been considered.

FIG. 2 shows a method of compressing a digital video signal. 21 and 22 represent one frame. For compression of a video signal, for example, every nine frames as shown by diagonal lines perform compression of all image information in the frame, and in other frames, only difference information is obtained using prediction based on data of the previous or subsequent frame. By performing compression, the amount of transmission is reduced. In the following description, the former is called an intra frame, and the latter is called an inter frame.

[0004]

In recording such a video signal transmitted by digital broadcasting, if the compressed digital video signal is recorded as it is, the recording capacity is small and efficient recording is possible. It can be performed. However, since the video signal is compressed, the video signal cannot be expanded unless all the recording signals can be reproduced, and when a dropout occurs on the tape or when only a part of the recording signal can be reproduced, such as during variable speed reproduction. There is a problem that video cannot be output.

It is an object of the present invention to provide a digital signal recording / reproducing apparatus which can record a compressed digital video signal as it is and can output a good video even when only a part of the recording signal is reproduced.

[0006]

An object of the present invention is to record a first digital video signal, for example, intra-frame data, and a second digital video signal, for example, inter-frame data, in different areas on the same recording medium. In the digital signal recording / reproducing apparatus for reproducing, the first
Means for multiplex-recording a digital video signal in a plurality of areas on the recording medium, and a feed speed of the recording medium during recording
When performing playback at a feed rate different from that of the first
Transmission of the recording medium so that the digital video signal is reproduced.
And control means for controlling the speed . Further, this can be achieved by providing recording means for recording the first digital video signal and the second digital video signal by adding a flag capable of identifying the type of the signal to each of the first digital video signal and the second digital video signal.

[0007]

The expansion can be performed independently, and the intra-frame data serving as a reference when expanding the inter-frame data is multiplex-recorded, so that the probability of reproducing the data can be increased. Also, at the time of variable-speed reproduction, by generating intra-frame data with priority, and generating a video, it is possible to output a good video even at the time of variable-speed reproduction.

[0008]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a digital signal recording / reproducing apparatus according to the present invention. 1 is an antenna, 4 is a receiving device for receiving a transmitted digital video signal, 6 is a receiving circuit for receiving a signal, 7 is a demodulation circuit for demodulating a digital signal from a received signal, and 8 is a signal generated during transmission. An error correction circuit for correcting an error, 9 is a video processing circuit for expanding a compressed video signal, 10 is an audio processing circuit for processing an audio signal transmitted together with the video signal, 11 is a switching circuit, and 12 is recording / reproducing. An interface circuit for inputting and outputting signals to and from the device. 5 is a recording / reproducing device for recording the transmitted digital video signal, 13 is an interface circuit for inputting / outputting a signal to / from a receiving device, 14 is a recording processing circuit for generating a recording signal from the input digital video signal, Reference numeral 15 denotes a reproduction processing circuit for demodulating a digital signal from a reproduction signal, reference numeral 17 denotes a rotary head, reference numeral 18 denotes a magnetic tape, and reference numeral 19 denotes a servo circuit for controlling the running of the magnetic tape 18.

In the receiving device 4, at the time of normal reception, the switching circuit 11 selects the output of the demodulation circuit 7, video signals and audio signals are output from the output terminals 2 and 3, and at the same time, via the interface circuit 12. The compressed digital video signal is output to the recording / reproducing device 5. When reproducing the recorded signal, the switching circuit 11 selects the output of the interface circuit 12, and the recording / reproducing device 5
Is input to the error correction circuit 8. The error correction circuit 8 performs error correction using an error correction code added to the received digital video signal. Thereafter, processing such as decompression is performed by the video processing circuit 9 and the audio processing circuit 10, and output from the output terminals 2 and 3.

By recording a signal before error correction,
The error correction circuit 8 corrects an error generated during transmission, and at the same time, detects and corrects an uncorrectable error generated in the recording / reproducing device 5.
For an uncorrectable error generated in the recording / reproducing device 5, a flag indicating the error may be received from the recording / reproducing device 5 together with the reproduction signal. Of course, the output of the error correction circuit 8 may be recorded in the recording / reproducing device 5.

In the recording / reproducing apparatus 5, at the time of recording, a recording processing circuit 14 adds a recording error correction code and a synchronization signal to the digital video signal inputted from the receiving apparatus 4 to generate a recording signal. The information is recorded on the magnetic tape 18 by 17. At the time of reproduction, a signal reproduced by the rotary head 17 is input to the reproduction processing circuit 15 to correct an error generated at the time of recording and reproduction, and to demodulate a digital signal. Then, it outputs to the receiving device 4.

FIG. 3 shows an example of a signal output from the interface circuit 12 to the recording / reproducing device 5. The interface circuit 12 separates the digital video signal into a high priority signal and a low priority digital signal and outputs the separated signal.
The data 62 has a packet configuration, and 63 indicates one packet. The packet is composed of a high-priority data packet (H packet) and a low-priority packet (L packet), and the ratio of the H packet to the L packet data is 1: 4. And H
One packet and four L packets form a set, and a synchronization signal 61 is added to the set.

H-packets are, for example, intra-frame data which can be expanded only with the data of the frame, control signals of high importance, and L-packets are, for example,
It is composed of inter-frame data and audio data that are expanded using the data of the previous or subsequent frame.

It is to be noted that the recording and reproducing apparatus 5 may separate the high-priority one from the low-priority one. Further, the H packet and the L packet may be output separately.

FIG. 4 shows the structure of the packet 63. 64
Is a header, which is composed of data type, frame number, position information in the frame, and the like. Reference numeral 65 denotes data, which is constituted by a digital video signal or an error correction code added during transmission.

FIG. 5 shows a recording pattern on the magnetic tape 18. Reference numeral 24 denotes one track. Here, as shown in FIG. 1, it is assumed that two heads are attached to the rotary head 18 so as to face each other by 180 degrees, and two tracks are recorded by one scanning. For example, in FIG.
Two tracks of track B are recorded simultaneously.

FIG. 6 shows a configuration of two tracks recorded by one scan. For example, (A) is a 1A track,
(B) shows the configuration of a 1B track. One track is composed of three areas, and each area is composed of a plurality of blocks. H packet data is recorded in an area 25 at the center of the track where an error occurs less frequently, and L packet data is recorded in areas 26 at both ends of the track.

FIG. 7 is a block diagram showing the configuration of each area shown in FIG. 31 is a synchronization signal, 32 is an ID signal, 33
Is a packet data, and 34 is a parity for detecting and correcting an error in the packet data 33.

FIG. 8 shows the configuration of the ID signal 32. 35
Is a track number for identifying a track, and a number which repeats in a predetermined number of tracks, for example, 16 tracks, is used. 36 is a block number for identifying the position of the block in the track. Reference numeral 37 denotes a flag for identifying the type of the packet.
The packet is identified. Reference numeral 38 denotes control information such as a recording time on the tape, a program number, and the like. Control information 38
By performing multiplex recording a plurality of times in a track, the detection capability at the time of search or the like can be improved. 39 is the ID
Parity for detecting a signal error.

FIG. 9 shows the structure of the regions 25 and 26.
In FIG. 9, the synchronization signal 31 and the ID signal 32 are omitted. The packet data is recorded in the first half block 41 and the second half block 43, and the second block is
The parity for error detection and correction is recorded. As described above, the error detection / correction capability is improved by using the parity for error detection / correction twice. Note that the parity 42 may be arranged at another position such as the last block of the area.

FIG. 10 shows the structure of the regions 25 and 26 more specifically. Here, one area is composed of 34 blocks, and data of 30 packets and parity 42 of 4 blocks are recorded. Reference numeral 51 denotes one block (packet).

[0023] 120 pieces of L packets to be recorded on the two tracks (L0~L119) is, L A region, L B region are sequentially recorded in L C region and L D region. On the other hand, 30 H packets (H0 to H29) are recorded twice in the HA area and the HB area. Furthermore, the packet recorded in the first half of the HA area is recorded in the second half of the HB area. As described above, the data of the high-priority H packet is multiplex-recorded in different areas, so that even if data is lost due to dropout on the tape or the like, data in an error-free area or an area with few errors is stored. By selecting and outputting, it is possible to reproduce correctly.

FIG. 11 shows the configuration of the recording processing circuit 14. 73 is a storage circuit, 74 is a packet detection circuit, 75 is a parity generation circuit, and 76 is a recording signal generation circuit. The packet data output from the interface circuit 13 is input to the packet detection circuit 74 from the input terminal 71. The packet detection circuit 74 detects the type of the packet and stores it in a predetermined position on the storage circuit 73 according to the type. In the parity generation circuit 75, the C1 parity 34 and the C2 parity 42 are generated from the packet data stored in the storage circuit 73, and stored in the storage circuit 73. The recording signal generation circuit 76 reads out the packet data and the C1 parity and the C2 parity stored in the storage circuit 73, adds the synchronization signal 31 and the ID signal 32 to the block format shown in FIG. 17 is output.

FIG. 12 shows the configuration of the reproduction processing circuit 15. 83 is a storage circuit, 84 is a block reproduction circuit, 85 is an error correction circuit, and 86 is a packet output circuit. A reproduction signal reproduced by the rotary head 17 is input to an input terminal 81.
The signal is input to the block reproducing circuit 84. The block reproduction circuit 84 detects the synchronization signal 31 and the ID signal 32. Then, it is stored in a predetermined position on the storage circuit 83 by the track number 35, the block number 36, and the flag 37 in the ID signal. In the error correction circuit 85, the storage circuit 83
Parity 34 and C2 parity 4 stored in
2 to correct errors in the packet data. At the same time, a pointer indicating an error state is generated, and the storage circuit 83
To be stored. The packet output circuit 86 reads the packet data from the storage circuit 83 and outputs it from the output terminal 72. As for the H packet data, first, a pointer is read to check whether there is an uncorrectable error.
If there is an uncorrectable error, the multiplex-recorded H packet data in another area is read and output. Also,
At the time of outputting the packet data, a pointer may be added and output, so that the receiving device 4 can confirm whether there is an error at the time of recording and reproduction.

At the time of variable speed reproduction, the scanning locus of the head is shifted from the track, so that only a part of the data of one track can be reproduced. Therefore, at the time of variable speed reproduction, the H packet data may be preferentially reproduced, and a video may be generated using intra-frame data.

FIG. 13 shows the scanning trajectory of the head during variable speed reproduction. An alternate long and short dash line indicates a scanning locus of the A head (a head having the same azimuth as the A track). During variable speed playback,
As shown by the diagonal lines in FIG. 13, the servo circuit 19 controls the running of the magnetic tape 18 so that the head can trace the first or second half of the HA or HB area where the H packet data is recorded. Since the H packet data is multiplex-recorded in the first half or the second half of the HA area and the second half or the first half of the HB area, it is only necessary that one of them can be reproduced.

In the reproduction processing circuit 15, an error correction circuit 85
In, error detection and correction are performed on a block basis by the C1 parity, and the packet data of the correctly reproduced block is output to the receiving device 4. The receiving device 4 identifies and expands the position of the video signal based on the header 64 of the packet, and performs processing such as complementing the video signal that could not be reproduced with the previous video signal, and outputs it.

[0029]

According to the present invention, it can be performed alone stretching, and, inter-frame data can be increased probability of reproduction of the intra-frame data as a reference at the time of stretching a recording medium on A good image can be output even when only a part of the recording signal can be reproduced, for example, when a dropout occurs. Further, even during the variable speed reproduction, by reproducing the intra-frame data with priority, a good image can be output.

[Brief description of the drawings]

FIG. 1 shows the configuration of a digital signal recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a compression method of a digital video signal.

FIG. 3 shows a recording / reproducing device 5 from an interface circuit 12.
FIG. 4 is a timing chart of signals output to the first embodiment.

FIG. 4 is a configuration diagram of a packet 63.

FIG. 5 is a diagram showing a recording pattern on a magnetic tape 18;

FIG. 6 is a configuration diagram of two tracks recorded by one scan.

FIG. 7 is a configuration diagram of a block constituting each area in FIG. 6;

8 is a configuration diagram of an ID signal 32. FIG.

FIG. 9 is a configuration diagram of regions 25 and 26.

FIG. 10 is a specific configuration diagram of regions 25 and 26.

FIG. 11 is a configuration diagram of a recording processing circuit 14;

FIG. 12 is a configuration diagram of a reproduction processing circuit 15;

FIG. 13 is a diagram showing a scanning locus of a head during variable speed reproduction.

[Explanation of symbols]

4 receiving apparatus, 5 recording / reproducing apparatus, 12 interface circuit, 13 interface circuit, 14 recording processing circuit, 15 reproduction processing circuit, 19 servo circuit, 73
... A storage circuit, 74 a packet detection circuit, 75 a parity generation circuit, 76 a recording signal generation circuit, 83 a storage circuit,
84: block reproduction circuit, 85: error correction circuit, 86:
Packet output circuit.

──────────────────────────────────────────────────続 き Continuation of the front page (72) Keiji Noguchi Inventor Keiji Noguchi 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Media Research Laboratory of Hitachi, Ltd. (56) References JP-A-4-352584 (JP, A) Kaihei 4-86183 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H04N 5/76-9/956 G11B 20/10-20/12

Claims (5)

(57) [Claims] 1. A digital signal recording and reproducing apparatus of the first digital video signal and the second digital video signal reproducing record, multiple recording of said first digital picture signal into a plurality of areas on the record medium Playback at a different feed rate from the recording means and the feed rate of the recording medium during recording
The first digital video signal is reproduced.
Control means for controlling the feeding speed of the recording medium so that
And a digital signal recording and reproducing apparatus. 2. The digital signal recording and reproducing apparatus according to claim 1, wherein said recording means records said first and second digital video signals in a packet format of a predetermined number of bytes. 3. The digital signal recording apparatus according to claim 1, wherein said recording medium is a magnetic tape, and said recording means multiplex-records said first digital video signal on different tracks on said magnetic tape. Playback device. 4. The apparatus according to claim 1, wherein said control means controls the feeding of said recording medium so that said first digital video signal is reproduced most when reproducing at a feeding speed different from the feeding speed of said recording medium during recording. digital signal recording and reproducing apparatus according to claim 1, wherein the benzalkonium control the speed. 5. The recording means according to claim 1, wherein said recording means adds a flag capable of identifying the type of said signal to each of said first digital video signal and said second digital video signal. 2. The digital signal recording / reproducing apparatus according to 1.