JPH0677251U - Package for storing semiconductor devices - Google Patents
Package for storing semiconductor devicesInfo
- Publication number
- JPH0677251U JPH0677251U JP014889U JP1488993U JPH0677251U JP H0677251 U JPH0677251 U JP H0677251U JP 014889 U JP014889 U JP 014889U JP 1488993 U JP1488993 U JP 1488993U JP H0677251 U JPH0677251 U JP H0677251U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- insulating
- package
- insulating lid
- sealing material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
(57)【要約】
【目的】内部に収容する半導体素子に外部よりノイズが
入り込むのを有効に防止し、半導体素子を正常、且つ安
定に作動させることができる半導体素子収納用パッケー
ジを提供することにある。
【構成】半導体素子３が載置される載置部を有する絶縁
基体１と絶縁蓋体２から成り、絶縁基体１と絶縁蓋体２
とを導電性封止材８を介し接合することによって内部に
半導体素子３を気密に収容するようになした半導体素子
収納用パッケージであって、前記導電性封止材８は絶縁
蓋体２の絶縁基体１側の全面に予め被着されている。
(57) [Abstract] [Purpose] To provide a semiconductor element housing package that can effectively prevent noise from entering the semiconductor element housed inside from the outside and can operate the semiconductor element normally and stably. It is in. [Structure] An insulating base 1 having a mounting portion on which a semiconductor element 3 is mounted, and an insulating lid 2, and the insulating base 1 and the insulating lid 2
Is a package for housing a semiconductor element, wherein the semiconductor element 3 is hermetically housed inside by bonding the above with a conductive sealing material 8, and the conductive sealing material 8 is of the insulating lid 2. It is pre-deposited on the entire surface of the insulating substrate 1.
Description
【０００１】[0001]
本考案は半導体素子を収容するための半導体素子収納用パッケージに関する。 The present invention relates to a semiconductor device housing package for housing a semiconductor device.
【０００２】[0002]
従来、半導体素子を収容する半導体素子収納用パッケージはアルミナセラミッ クス等の電気絶縁材料から成り、その上面の略中央部に半導体素子を収容するた めの凹部を有し、且つ該凹部周辺から下面にかけて導出されたタングステン、モ リブデン、マンガン等の高融点金属粉末から成るメタライズ配線層を有する絶縁 基体と、半導体素子を外部電気回路に電気的に接続するために前記メタライズ配 線層に銀ロウ等のロウ材を介し取着された外部リード端子と、アルミナセラミッ クス等の電気絶縁材料から成る絶縁蓋体とから構成されており、絶縁基体の凹部 底面に半導体素子を接着剤を介して取着固定し、半導体素子の各電極とメタライ ズ配線層とをボンディングワイヤを介して電気的に接続するとともに絶縁基体の 上面に絶縁蓋体をガラス、樹脂等の封止材により接合させ、絶縁基体と絶縁蓋体 とから成る容器の内部に半導体素子を気密に封止することによって製品としての 半導体装置となる。 Conventionally, a semiconductor element housing package for housing a semiconductor element is made of an electrically insulating material such as alumina ceramics, and has a recess for accommodating the semiconductor element in a substantially central portion of its upper surface, and a portion from the periphery of the recess to the lower surface. An insulating substrate having a metallized wiring layer made of a refractory metal powder such as tungsten, molybdenum, manganese, etc., which has been derived over time, and a silver solder or the like on the metallized wiring layer for electrically connecting the semiconductor element to an external electric circuit. It is composed of external lead terminals attached via a brazing material and an insulating lid made of an electrically insulating material such as alumina ceramics.A semiconductor element is attached to the bottom of the recess of the insulating base with an adhesive. It is fixed and each electrode of the semiconductor element and the metallized wiring layer are electrically connected via a bonding wire, and an insulating lid is provided on the upper surface of the insulating substrate. Glass, are joined by a sealing material such as a resin, a semiconductor device as a product by sealing a semiconductor element hermetically in the interior of the container made of insulating substrate and the insulating lid.
【０００３】[0003]
しかしながら、この従来の半導体素子収納用パッケージは絶縁基体や絶縁蓋体 に使用されているアルミナセラミックスがノイズに対するシールド効果に弱いこ と、及び近時、半導体素子は高速駆動が行われるようになってきており、ノイズ の影響を極めて受け易いものとなってきていること等から外部近接位置にノイズ 発生源があると内部に収容する半導体素子にノイズが極めて容易に入り込み、そ の結果、前記入り込んだノイズによって半導体素子に誤動作を発生させてしまう という欠点を有していた。 However, in this conventional package for accommodating semiconductor elements, the alumina ceramics used for the insulating base and the insulating lid are weak in the shielding effect against noise, and recently, the semiconductor elements have been driven at high speed. Since it is becoming very susceptible to noise, if there is a noise source at an external proximity position, noise easily enters the semiconductor element housed inside, and as a result, the noise enters. It has a drawback that a semiconductor device may malfunction due to noise.
【０００４】 また高速駆動を行う半導体素子はそれ自体がノイズを発生し易く、半導体素子 の発生したノイズが他の装置に入り込んで誤動作等の悪影響を与えるという問題 も有していた。In addition, the semiconductor element which is driven at high speed is apt to generate noise by itself, and the noise generated by the semiconductor element has a problem that it may enter other devices and cause an adverse effect such as malfunction.
【０００５】[0005]
本考案は上記欠点に鑑み案出されたものでその目的は、内部に収容する半導体 素子に外部よりノイズが入り込むのを有効に防止し、半導体素子を正常、且つ安 定に作動させることができる半導体素子収納用パッケージを提供することにある 。 The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to effectively prevent noise from entering the semiconductor element housed inside from the outside and to operate the semiconductor element normally and stably. It is to provide a package for housing a semiconductor element.
【０００６】[0006]
本考案は半導体素子が載置される載置部を有する絶縁基体と絶縁蓋体から成り 、絶縁基体と絶縁蓋体とを導電性封止材を介し接合することによって内部に半導 体素子を気密に収容するようになした半導体素子収納用パッケージであって、前 記導電性封止材は絶縁蓋体の絶縁基体側の全面に予め被着されていることを特徴 とするものである。 The present invention comprises an insulating base body having a mounting portion on which a semiconductor element is mounted and an insulating lid body, and a semiconductor element is internally provided by joining the insulating base body and the insulating lid body through a conductive sealing material. A package for housing a semiconductor element, which is hermetically housed, characterized in that the above-mentioned conductive encapsulating material is previously applied to the entire surface of the insulating lid body on the side of the insulating base.
【０００７】[0007]
次に本考案を添付図面に基づき詳細に説明する。 Next, the present invention will be described in detail with reference to the accompanying drawings.
【０００８】 図１は本考案の半導体素子収納用パッケージの一実施例を示す断面図であり、 １は絶縁基体、２は絶縁蓋体である。この絶縁基体１と絶縁蓋体２とで半導体素 子３を収容するための容器４が構成される。FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor device of the present invention, in which 1 is an insulating base and 2 is an insulating lid. The insulating substrate 1 and the insulating lid 2 constitute a container 4 for housing the semiconductor element 3.
【０００９】 前記絶縁基体１はアルミナセラミックス等の電気絶縁材料から成り、その上面 略中央部に半導体素子３を収容するための空所を形成する凹部１ａが設けてあり 、該凹部１ａ底面には半導体素子３がエポキシ樹脂等の接着剤を介して取着され る。The insulating base 1 is made of an electrically insulating material such as alumina ceramics, and a recess 1a is formed in the upper surface substantially in the center thereof to form a space for housing the semiconductor element 3, and the bottom of the recess 1a is formed. The semiconductor element 3 is attached via an adhesive such as an epoxy resin.
【００１０】 前記絶縁基体１はアルミナセラミックスから成る場合、例えば、アルミナ（Ａ ｌ2 Ｏ3 ）、シリカ（ＳｉＯ2 ）、カルシア（ＣａＯ）、マグネシア（ＭｇＯ） 等の原料粉末に適当な有機溶剤、溶媒を添加混合して泥漿状となすとともにこれ を従来周知のドクターブレード法やカレンダーロール法等を採用することによっ てセラミックグリーンシート（セラミック生シート）を形成し、しかる後、前記 セラミックグリーンシートに適当な打ち抜き加工を施すとともに複数枚積層し、 高温（約１６００℃）で焼成することによって製作される。When the insulating substrate 1 is made of alumina ceramics, for example, an organic solvent suitable for a raw material powder such as alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), magnesia (MgO), A solvent is added and mixed to form a slurry, which is then applied to the conventionally well-known doctor blade method or calender roll method to form a ceramic green sheet (ceramic green sheet). It is manufactured by performing a suitable punching process, stacking a plurality of sheets, and baking at a high temperature (about 1600 ° C).
【００１１】 また前記絶縁基体１には凹部１ａ周辺から下面にかけて導出する複数のメタラ イズ配線層５が形成されており、該メタライズ配線層５の凹部１ａ周辺部には半 導体素子３の各電極がボンディングワイヤ６を介して電気的に接続され、また下 面に導出された部位には外部電気回路と接続される外部リード端子７が銀ロウ等 のロウ材を介し取着される。A plurality of metallized wiring layers 5 extending from the periphery of the recess 1 a to the lower surface are formed on the insulating base 1, and the electrodes of the semiconductor element 3 are formed around the recess 1 a of the metallized wiring layer 5. Are electrically connected via a bonding wire 6, and external lead terminals 7 connected to an external electric circuit are attached to the portion led out on the lower surface via a brazing material such as silver brazing.
【００１２】 前記メタライズ配線層５は半導体素子３の各電極を外部電気回路と接続される 外部リード端子７に電気的に接続させる作用を為し、タングステン、モリブデン 、マンガン等の高融点金属粉末により形成されている。The metallized wiring layer 5 has a function of electrically connecting each electrode of the semiconductor element 3 to an external lead terminal 7 connected to an external electric circuit, and is made of a refractory metal powder such as tungsten, molybdenum, or manganese. Has been formed.
【００１３】 尚、前記メタライズ配線層５はタングステン、モリブデン、マンガン等の高融 点金属粉末に適当な有機溶剤、溶媒を添加混合して得た金属ペーストを従来周知 のスクリーン印刷法を採用し、絶縁基体１となるセラミックグリーンシートに予 め所定パターンに印刷塗布しておくことによって絶縁基体１の凹部１ａ周辺から 下面にかけて被着形成される。For the metallized wiring layer 5, a metal paste obtained by adding and mixing a high melting point metal powder such as tungsten, molybdenum, or manganese with an appropriate organic solvent or solvent is adopted by a conventionally known screen printing method. By pre-printing a predetermined pattern on the ceramic green sheet that will become the insulating substrate 1, the insulating substrate 1 is deposited and formed from the periphery of the recess 1a to the lower surface.
【００１４】 また前記メタライズ配線層５はその露出する表面にニッケル、金等の良導電性 で、耐蝕性に優れ、且つロウ材と濡れ性の良い金属をメッキ法により１. ０乃至 ２０. ０μｍの厚みに層着させておくとメタライズ配線層５の酸化腐食を有効に 防止することができるとともにメタライズ配線層５とボンディングワイヤ６との 接続及びメタライズ配線層５と外部リード端子７とのロウ付けを極めて強固なも のとなすことができる。従って、前記メタライズ配線層５の酸化腐食を防止し、 メタライズ配線層５とボンディングワイヤ６との接続及びメタライズ配線層５と 外部リード端子７とのロウ付けを強固とするにはメタライズ配線層５の露出する 表面にニッケル、金等を１. ０乃至２０. ０μｍの厚みに層着させておくことが 好ましい。The metallized wiring layer 5 has a metal such as nickel, gold, etc., which has good conductivity, excellent corrosion resistance, and good wettability with the brazing material, and is 1.0 to 20.0 μm in thickness on the exposed surface. The thickness of the metallized wiring layer 5 can effectively prevent the oxidative corrosion of the metallized wiring layer 5, and the connection between the metallized wiring layer 5 and the bonding wire 6 and the brazing of the metallized wiring layer 5 and the external lead terminal 7 Can be extremely strong. Therefore, in order to prevent the oxidative corrosion of the metallized wiring layer 5 and to strengthen the connection between the metallized wiring layer 5 and the bonding wire 6 and the brazing of the metallized wiring layer 5 and the external lead terminals 7, It is preferable to deposit nickel, gold or the like on the exposed surface to a thickness of 1.0 to 20.0 μm.
【００１５】 更に前記メタライズ配線層５にロウ付けされる外部リード端子７は内部に収容 する半導体素子３を外部電気回路に接続する作用を為し、外部リード端子７を外 部電気回路に接続することによって内部に収容される半導体素子３はメタライズ 配線層５及び外部リード端子７を介し外部電気回路と電気的に接続されることと なる。Further, the external lead terminals 7 brazed to the metallized wiring layer 5 have a function of connecting the semiconductor element 3 housed therein to an external electric circuit, and connect the external lead terminals 7 to an external electric circuit. As a result, the semiconductor element 3 housed inside is electrically connected to the external electric circuit through the metallized wiring layer 5 and the external lead terminal 7.
【００１６】 前記外部リード端子７はコバール金属（Ｆｅ−Ｎｉ−Ｃｏ合金）や４２アロイ （Ｆｅ−Ｎｉ合金）等の金属材料から成り、コバール金属等のインゴット（塊） を圧延加工法や打ち抜き加工法等、従来周知の金属加工法を採用することによっ て所定の板状に形成される。The external lead terminal 7 is made of a metal material such as Kovar metal (Fe—Ni—Co alloy) or 42 alloy (Fe—Ni alloy), and an ingot (lump) of Kovar metal or the like is rolled or punched. It is formed into a predetermined plate shape by adopting a conventionally known metal processing method such as a method.
【００１７】 また前記外部リード端子７はメタライズ配線層５と同様、その露出表面にニッ ケル、金等を従来周知のメッキ法により１. ０乃至２０. ０μｍの厚みに層着さ せておけば外部リード端子７を外部電気回路に確実に強固に接続することができ る。従って、外部リード端子７の露出する表面にもニッケル、金等を１. ０乃至 ２０. ０μｍの厚みに層着させておくことが好ましい。Similarly to the metallized wiring layer 5, the external lead terminals 7 may be formed by depositing nickel, gold or the like on the exposed surface to a thickness of 1.0 to 20.0 μm by a conventionally known plating method. The external lead terminal 7 can be securely and firmly connected to the external electric circuit. Therefore, it is preferable that nickel, gold or the like is also layered to a thickness of 1.0 to 20.0 μm on the exposed surface of the external lead terminal 7.
【００１８】 前記絶縁基体１は更にその上面にアルミナセラミックス等の電気絶縁材料から 成る絶縁蓋体２が導電性封止材８を介して接合され、これによって絶縁基体１と 絶縁蓋体２とから成る容器４内部に半導体素子３が気密に封止される。An insulating lid 2 made of an electrically insulating material such as alumina ceramics is further bonded to the upper surface of the insulating base 1 through a conductive sealing material 8, whereby the insulating base 1 and the insulating lid 2 are separated from each other. The semiconductor element 3 is hermetically sealed inside the container 4.
【００１９】 前記絶縁蓋体２はアルミナセラミックスから成る場合、例えばアルミナ（Ａｌ 2 Ｏ3 ）、シリカ（ＳｉＯ2 ）、カルシア（ＣａＯ）、マグネシア（ＭｇＯ）等 に適当な有機溶剤、溶媒を添加混合して得た原料粉末を所定形状のプレス金型内 に充填するとともに一定圧力で押圧して形成し、しかる後、前記成形品を約１５ ００℃の温度で焼成することによって製作される。When the insulating lid 2 is made of alumina ceramics, for example, alumina (Al 2 O3), Silica (SiO2), Calcia (CaO), magnesia (MgO), etc., are added and mixed with a suitable organic solvent and solvent, and the resulting raw material powder is filled in a press die of a predetermined shape and pressed with a constant pressure to form the powder. Then, the molded product is manufactured by firing the molded product at a temperature of about 1500 ° C.
【００２０】 また前記絶縁基体１と絶縁蓋体２とを接合させる導電性封止材８は、導電性ガ ラスや導電性樹脂から成り、例えば、導電性ガラスから成る場合には酸化鉛（Ｐ ｂＯ）６０．０容量％、酸化チタン（ＴｉＯ2 ）０．１容量％、酸化ホウ素（Ｂ 2 Ｏ3 ）９．０容量％、酸化亜鉛（ＺｎＯ）９．０容量％を含むガラス粉末に導 電性材料である金、銀、銅等から成る金属粉末を７０〜９５容量％含有させたも のが好適に使用され、封止の作業性を向上させるために絶縁蓋体２の絶縁基体１ 側に予め被着されている。The conductive sealing material 8 for joining the insulating base 1 and the insulating lid 2 is made of conductive glass or conductive resin. For example, when it is made of conductive glass, lead oxide (P bO) 60.0% by volume, titanium oxide (TiO 22) 0.1% by volume, boron oxide (B 2 O3) Glass powder containing 9.0% by volume and 9.0% by volume of zinc oxide (ZnO) contained 70 to 95% by volume of a metal powder made of a conductive material such as gold, silver or copper. It is preferably used and is previously attached to the side of the insulating base 1 of the insulating lid 2 in order to improve the workability of sealing.
【００２１】 前記導電性ガラスから成る導電性封止材８の絶縁蓋体２への被着は金、銀、銅 等の導電性材料を含有するガラス粉末に適当な有機溶剤、溶媒を添加混合するこ とによって得たガラスペーストを絶縁蓋体２の絶縁基体１側表面に従来周知のス クリーン印刷法等により所定厚みに印刷塗布することによって行われる。The conductive sealing material 8 made of the conductive glass is applied to the insulating lid body 2 by adding an appropriate organic solvent and a solvent to glass powder containing a conductive material such as gold, silver or copper and mixing them. The glass paste thus obtained is applied by printing onto the surface of the insulating lid 2 on the side of the insulating substrate 1 to a predetermined thickness by a conventionally known screen printing method or the like.
【００２２】 更に前記導電性封止材８は絶縁蓋体２と絶縁基体１との接合領域のみならず絶 縁蓋体２の絶縁基体１側全面に被着されている。そのため半導体素子３を収容す る絶縁基体１の凹部１ａは前記導電性封止材８によってシールドされることとな り、その結果、外部ノイズが絶縁蓋体２を介して入り込むのが有効に防止され、 容器４内部の半導体素子３を長期間にわたり、正常、且つ安定に作動させること ができる。Further, the conductive sealing material 8 is applied not only to the joint region between the insulating lid 2 and the insulating base 1 but also to the entire surface of the insulating lid 2 on the insulating base 1 side. Therefore, the concave portion 1a of the insulating substrate 1 that houses the semiconductor element 3 is shielded by the conductive sealing material 8, and as a result, external noise is effectively prevented from entering through the insulating lid 2. Therefore, the semiconductor element 3 inside the container 4 can be normally and stably operated for a long period of time.
【００２３】 また同時に内部に収容した半導体素子３等から発生するノイズも絶縁蓋体２を 介して外部に漏れることが有効に防止され、半導体素子３の発生するノイズが他 の装置に入り込んで誤動作等の悪影響を与えることも極小となる。At the same time, noise generated from the semiconductor element 3 and the like housed inside is also effectively prevented from leaking to the outside through the insulating lid 2, and the noise generated from the semiconductor element 3 enters another device and malfunctions. It also minimizes adverse effects such as.
【００２４】 尚、前記導電性封止材８に使用される導電性ガラスは含有される金、銀、銅等 の量が７０容量％未満であると導電性封止材８の電気抵抗が高くなってシールド 効果が弱くなり、９５容量％を越えると導電性封止材８における金属粉末の含有 量が多くなりすぎ、ガラスと絶縁基体１及び絶縁蓋体２との接着強度が低下して 気密封止の信頼性が劣化する傾向にある。従って、前記導電性封止材８に使用さ れる導電性ガラスは含有される金、銀、銅等の量を７０〜９５容量％の範囲とし ておくことが好ましい。When the amount of gold, silver, copper, etc. contained in the conductive glass used for the conductive sealing material 8 is less than 70% by volume, the conductive sealing material 8 has a high electric resistance. As a result, the shielding effect becomes weaker, and when the content exceeds 95% by volume, the content of the metal powder in the conductive sealing material 8 becomes too large, and the adhesive strength between the glass and the insulating substrate 1 and the insulating lid 2 decreases, and The reliability of tight sealing tends to deteriorate. Therefore, it is preferable that the conductive glass used for the conductive sealant 8 contains gold, silver, copper, etc. in an amount of 70 to 95% by volume.
【００２５】 また前記導電性封止材８は絶縁基体１と絶縁蓋体２とを接合させた際、絶縁基 体１に形成したメタライズ配線層のうち半導体素子３の接地電極が接続されるも のに電気的に接続されるようにしておくと、導電性封止材８が接地されてノイズ に対するシールドがより強くなり、半導体素子３をより安定に作動させることが できる。従って、絶縁蓋体２に被着させた導電性封止材８は絶縁基体１と絶縁蓋 体２とを接合させた際には絶縁基体１に形成したメタライズ配線層のうち半導体 素子３の接地電極が接続されるものに電気的に接続させておくことが好ましい。In addition, the conductive sealing material 8 is connected to the ground electrode of the semiconductor element 3 in the metallized wiring layer formed on the insulating base 1 when the insulating base 1 and the insulating lid 2 are joined. If electrically connected, the conductive sealing material 8 is grounded, the shield against noise becomes stronger, and the semiconductor element 3 can be operated more stably. Therefore, when the insulating base 1 and the insulating cover 2 are bonded to each other, the conductive sealing material 8 applied to the insulating cover 2 is grounded to the semiconductor element 3 in the metallized wiring layer formed on the insulating base 1. It is preferable to be electrically connected to the one to which the electrodes are connected.
【００２６】 かくして本考案の半導体素子収納用パッケージによれば絶縁基体１の凹部１ａ 底面に半導体素子３を接着剤を介して取着するとともに半導体素子３の各電極を メタライズ配線層５にボンディングワイヤ６を介して電気的に接続し、しかる後 、絶縁基体１と絶縁蓋体２とを導電性封止材８により接合させ、絶縁基体１と絶 縁蓋体２とから成る容器４の内部に半導体素子３を気密に封止することによって 製品としての半導体装置となる。Thus, according to the semiconductor element housing package of the present invention, the semiconductor element 3 is attached to the bottom surface of the concave portion 1a of the insulating substrate 1 with an adhesive, and each electrode of the semiconductor element 3 is bonded to the metallized wiring layer 5 with a bonding wire. After electrically connecting via 6, the insulating base 1 and the insulating lid 2 are joined by a conductive sealing material 8, and the inside of the container 4 composed of the insulating base 1 and the insulating lid 2 is joined. A semiconductor device as a product is obtained by hermetically sealing the semiconductor element 3.
【００２７】 尚、本考案は上述の実施例に限定されるものではなく、本考案の要旨を逸脱し ない範囲であれば種々の変更は可能であり、例えば上述の実施例では導電性封止 材８としてガラス粉末に金、銀、銅等の金属粉末を含有させたものを使用したが 樹脂に銀等の金属粉末を含有させた導電性樹脂を使用してもよい。The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the above-mentioned embodiments, the conductive sealing is used. As the material 8, glass powder containing metal powder such as gold, silver or copper was used, but a conductive resin containing resin containing metal powder such as silver may be used.
【００２８】[0028]
本考案の半導体素子収納用パッケージによれば、絶縁基体と絶縁蓋体とを接合 させ、絶縁基体と絶縁蓋体とから成る容器内部に半導体素子を気密に封止する封 止材を導電性とするとともに、該封止材を絶縁基体と絶縁蓋体の接合領域のみな らず絶縁蓋体の絶縁基体側の全面に被着させたことから絶縁基体と絶縁蓋体とを 導電性封止材を介して接合し、内部に半導体素子を気密に収容封止した際、内部 に収容される半導体素子は前記導電性封止材でシールドされることとなり、その 結果、外部ノイズが絶縁蓋体を介して入り込むのを有効に防止でき、容器内部の 半導体素子を長期間にわたり、正常、且つ安定に作動させることができる。 According to the package for accommodating semiconductor elements of the present invention, the insulating base and the insulating lid are joined together, and the sealing material that hermetically seals the semiconductor element inside the container composed of the insulating base and the insulating lid is made conductive. In addition, since the sealing material is applied not only to the bonding area between the insulating base body and the insulating lid body but to the entire surface of the insulating base body on the insulating base body side, the insulating base body and the insulating lid body are electrically conductive sealing material. When the semiconductor element is hermetically housed and sealed inside, the semiconductor element housed inside is shielded by the conductive sealing material, and as a result, external noise causes the insulating lid to It is possible to effectively prevent the semiconductor element from entering through the container, and it is possible to operate the semiconductor element inside the container normally and stably for a long period of time.
【００２９】 また同時に内部に収容した半導体素子から発生するノイズも絶縁蓋体を介して 外部に漏れることが有効に防止され、内部に収容する半導体素子の発生するノイ ズが他の装置に入り込んで誤動作等の悪影響を与えるということも殆ど無くなる 。At the same time, noise generated from the semiconductor element housed inside is also effectively prevented from leaking to the outside through the insulating lid, and noise generated by the semiconductor element housed inside enters into another device. Almost no adverse effects such as malfunctions will occur.
【図面の簡単な説明】[Brief description of drawings]
【図１】本考案の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor device of the present invention.
１・・・絶縁基体 ２・・・絶縁蓋体 ３・・・半導体素子 ４・・・容器 ８・・・導電性封止材 DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Insulating lid 3 ... Semiconductor element 4 ... Container 8 ... Conductive sealing material
Claims (1)
縁基体と絶縁蓋体から成り、絶縁基体と絶縁蓋体とを導
電性封止材を介し接合することによって内部に半導体素
子を気密に収容するようになした半導体素子収納用パッ
ケージであって、前記導電性封止材は絶縁蓋体の絶縁基
体側の全面に予め被着されていることを特徴とする半導
体素子収納用パッケージ。1. An insulating base body having a mounting portion on which a semiconductor element is mounted, and an insulating lid body. The insulating base body and the insulating lid body are bonded to each other through a conductive sealing material to form a semiconductor element inside. A package for housing a semiconductor element, which is hermetically housed, wherein the conductive encapsulating material is pre-applied to the entire surface of the insulating lid on the side of the insulating substrate. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1993014889U JP2577088Y2 (en) | 1993-03-29 | 1993-03-29 | Package for storing semiconductor elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1993014889U JP2577088Y2 (en) | 1993-03-29 | 1993-03-29 | Package for storing semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0677251U true JPH0677251U (en) | 1994-10-28 |
| JP2577088Y2 JP2577088Y2 (en) | 1998-07-23 |
Family
ID=11873584
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1993014889U Expired - Fee Related JP2577088Y2 (en) | 1993-03-29 | 1993-03-29 | Package for storing semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2577088Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6286841A (en) * | 1985-10-14 | 1987-04-21 | Mitsubishi Electric Corp | High frequency hybrid integrated circuit |
| JPS63110756A (en) * | 1986-10-29 | 1988-05-16 | Nec Corp | Package for transistor |
| JPH03283640A (en) * | 1990-03-30 | 1991-12-13 | Nec Corp | Ic package |
-
1993
- 1993-03-29 JP JP1993014889U patent/JP2577088Y2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6286841A (en) * | 1985-10-14 | 1987-04-21 | Mitsubishi Electric Corp | High frequency hybrid integrated circuit |
| JPS63110756A (en) * | 1986-10-29 | 1988-05-16 | Nec Corp | Package for transistor |
| JPH03283640A (en) * | 1990-03-30 | 1991-12-13 | Nec Corp | Ic package |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2577088Y2 (en) | 1998-07-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2763446B2 (en) | Package for storing semiconductor elements | |
| JP2750253B2 (en) | Semiconductor device | |
| JP3046148B2 (en) | Electronic component storage package | |
| JPH0677251U (en) | Package for storing semiconductor devices | |
| JP2948998B2 (en) | Electronic device storage package | |
| JP2750232B2 (en) | Electronic component storage package | |
| JP2801449B2 (en) | Package for storing semiconductor elements | |
| JP2514094Y2 (en) | Package for storing semiconductor devices | |
| JP3318453B2 (en) | Electronic component storage package | |
| JP3176267B2 (en) | Package for storing semiconductor elements | |
| JP4051162B2 (en) | Manufacturing method of electronic component storage container | |
| JP3464136B2 (en) | Electronic component storage package | |
| JP2750255B2 (en) | Electronic component storage package | |
| JP3020783B2 (en) | Package for storing semiconductor elements | |
| JP2851740B2 (en) | Electronic component storage package | |
| JPH05275608A (en) | Semiconductor element housing package | |
| JP2740606B2 (en) | Package for storing semiconductor elements | |
| JPH0653339A (en) | Semiconductor-device storing package | |
| JPH05144964A (en) | Package for containing semiconductor element | |
| JPH0936145A (en) | Semiconductor device | |
| JP2828531B2 (en) | Package for storing semiconductor elements | |
| JP3462072B2 (en) | Electronic component storage container | |
| JPH08115990A (en) | Semiconductor device package | |
| JPH0922957A (en) | Package for housing semiconductor element | |
| JPH08162553A (en) | Package for containing semiconductor element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |