JPH0669405A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To increase packaging density by arbitrarily selecting the connection of the electrodes of an IC chip with the external terminals of a package thereby to reduce the area occupied by the wiring on a wiring board on which semiconductor integrated circuits are mounted. CONSTITUTION:Around an IC chip 2 mounted on a package 1, loop wirings 4a, 4b, 4c and 4d connecting to the respective electrodes A, B, C and D of the IC chip 2 are provided, and by selectively cutting leads 5a, 5b, 5c and 5d connected to external terminals 6a, 6b, 6c and 6d and connected in parallel to the loop wirings 4a to 4d, the connection between the IC chip and any of the external terminals 6a to 6d is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit,
Especially regarding packaging.

[0002]

2. Description of the Related Art As shown in FIG. 3, a conventional semiconductor integrated circuit has an IC chip 2 mounted on packages 1a and 1b.
a, 2b electrodes A, B, C, D and external terminals 6a, 6b,
The connection between 6c and 6d is fixed for each model, for example, the electrode A of the IC chip 2a and the electrode A of the IC chip 2b.
When connecting the electrode C of the IC chip 2a and the electrode B of the IC chip 2b, the wiring 8 on the wiring board can be arranged at the shortest distance, but the wiring 7 must be arranged in a detoured manner. I won't.

[0003]

In this conventional semiconductor integrated circuit, since the connection arrangement between the electrodes of the IC chip mounted on the package and the external terminals is fixed, the external terminals of the semiconductor integrated circuit mounted on the wiring board are fixed. If the terminal is on the opposite side when the wiring for connecting between the semiconductor integrated circuit and the external terminal of another semiconductor integrated circuit is provided, the wiring must bypass the semiconductor integrated circuit, and the area occupied by the wiring increases. Therefore, there is a problem that the mounting density of the wiring board is reduced.

[0004]

In a semiconductor integrated circuit of the present invention, a plurality of loop wirings provided around an IC chip mounted on a package and connected to respective electrodes of the IC chip and the loop wirings are arranged in parallel. And lead-out wiring for connecting to and connecting to external terminals provided on the outer periphery of the package.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a schematic layout diagram for explaining one embodiment of the present invention.

As shown in FIG. 1, each of the electrodes A, B, C, D provided on the periphery of the IC chip 2 mounted on the package 1 and each of the lead wires 3a, 3b, 3 is provided.
loop wirings 4a, 4 electrically connected through c, 3d
b, 4c, 4d and loop wirings 4a, 4b, 4c, 4d
Wirings 5a, 5b, 5c, 5d for connecting the respective in parallel
External terminals 6a provided on the outer periphery of the package 1 connected to
6b, 6c, 6d, and the lead wiring 5a-
By selectively disconnecting the connection between 5d and the loop wirings 4a to 4d, any connection between the IC chip 2 and the external terminals 6a to 6d can be arbitrarily selected.

Incidentally, the lead wires are cut by cutting the lead wires 5a to 5a.
It is possible to lead out the cutting portion of d to the outside of the package 1 in advance and cut it, or cut it with a transparent resin body and cut with a laser beam or the like.

FIG. 2 is a block diagram showing a mounting example of the semiconductor integrated circuit of the present invention.

As shown in FIG. 2, the IC of the package 1a
By electrically connecting the electrode A of the chip 2a and the external terminal 6d, and the electrode D and the external terminal 6a, the wiring 7 on the wiring board can be arranged at the shortest distance in the same manner as the wiring, and the mounting density on the wiring board can be improved. Can be improved.

[0011]

As described above, according to the present invention, by providing the loop wiring connected to each electrode of the IC chip in the package, the connection between the IC chip and the external terminal can be arbitrarily changed and the semiconductor on the wiring substrate can be changed. The wiring connecting the integrated circuits can be arranged in the shortest distance, and the packaging density can be improved.

[Brief description of drawings]

FIG. 1 is a schematic layout diagram for explaining an embodiment of the present invention.

FIG. 2 is a block diagram showing a mounting example of a semiconductor integrated circuit of the present invention.

FIG. 3 is a block diagram showing a mounting example of a conventional semiconductor integrated circuit.

[Explanation of symbols]

1 Package 2 IC Chips 3a, 3b, 3c, 3d, 5a, 5b, 5c, 5d
Lead wiring 4a, 4b, 4c, 4d Loop wiring 6a, 6b, 6c, 6d External terminals 7, 8 Wiring A, B, C, D electrodes

Claims (1)

[Claims] 1. A plurality of loop wirings provided around an IC chip mounted on a package and connected to respective electrodes of the IC chip, and external terminals connected in parallel to the loop wiring and provided on an outer periphery of the package. And a lead-out wiring connected to the semiconductor integrated circuit.