JPH0669140B2 - Level shift circuit - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a level shift circuit.

[Technical background of the invention and its problems]

A conventional level shift circuit is shown in FIGS. The example shown in FIG. 1 is a circuit of a shift type using a diode. That is, the input signal applied to the input terminal P ₁ is shifted through the transistor Q ₁₁ and the diodes D ₁₁ and D ₁₂ and is guided to the output terminal P ₂ . Level shift of this circuit (potential difference between input terminal P ₁ and output terminal P ₂ ) V _LS is V _LS = V _BE1 + V _D1 + V _D2 (1) where V _{BE1 is the} forward direction between the base and emitter of transistor Q _11. Drop voltage V _D1 : Forward drop voltage of diode D ₁₁ V _D2 : Forward drop voltage of diode D ₁₂ .

However, in the case of the above configuration, when the characteristics of the transistor Q ₁₁ and the diodes D ₁₁ and D ₁₂ change from desired values due to manufacturing errors and temperature changes, the level shift amount V _LS changes. Further, the level shift amount V _LS is determined by the number of diodes. However, if the level shift amount V _LS is desired to be large, the number of diodes is large.

The example shown in FIG. 2 shows a method using a constant current source I ₁₁ . The level shift amount V _LS of this circuit is V _LS = V _BE a + RaIa (2) where V _BE a: Base-emitter forward drop voltage of transistor Q ₁₂ Ra: Resistance value of resistor R ₁₁ Ia: Constant current Current of the source I ₁₁ This circuit complicates the circuit design of the constant current source I ₁₁ because it is required to design the circuit considering the fluctuation of the characteristic of the circuit element and the temperature compensation. . Further, as the constant current source I ₁₁ , a circuit is used in which the collector current of the transistor is kept constant by controlling the base voltage of the transistor and used as the current Ia. However, in this case, when an unnecessary signal component is added to the base side of the current source transistor as described above, the value of the current Ia changes, which causes the level shift amount V _LS to change.
Also, the level shift amount V _LS is determined by Ia and Ra,
To increase this, increasing Ia increases power consumption, and increasing Ra increases frequency characteristics.

Further, the circuits shown in FIGS. 1 and 2 have only one shift direction from the high level to the low level, and there is a drawback that the design cannot be changed as it is in the opposite direction.

FIGS. 3 and 4 show an example configured so that the level can be shifted from the low level to the high level. FIG. 3 shows a method using a diode as in FIG.
The figure shows a system using a constant current source as in FIG. These circuits shown in FIGS. 3 and 4 are also the same as those in the above-mentioned first circuit.
It naturally has the same drawbacks as the circuits of FIGS. 2 and 3, but has the following drawbacks.

First, in an integrated circuit, a lateral PNP transistor or a substrate PNP transistor is generally used as the PNP transistor. This kind of PNP transistor is NPN
The current amplification factor is lower than that of the transistor, and the input impedance is low. Therefore, the circuits of FIGS. 3 and 4 which use PNP transistors in the input stage have a drawback that the input impedance is lower than that of the circuits of FIGS. 1 and 2 which use NPN transistors.

The circuits of FIGS. 3 and 4 have power supply dependency.
That is, when the power supply voltage in the circuit of FIG. 3 varies, the current flowing through the transistor Q ₁₁ is changed, the transistor Q _11
Has the drawback that the forward drop voltage V _BE a between the base and emitter and the temperature coefficient change. In the circuit of FIG. 4, the constant current source I
The base bias voltage of the current source transistor ₁₁ is often determined depending on the power supply voltage. Therefore, if the power supply voltage changes, the current Ia changes and the level shift amount V _LS also changes.

[Object of the Invention]

The present invention has been made to cope with the above circumstances, and an object of the present invention is to provide a level shift circuit suitable for integration into a circuit, having a simple circuit configuration, and capable of always performing stable level shift. .

[Outline of Invention]

This invention has an input terminal to which an input signal is applied, a base, an emitter, and a collector. The input signal from the input terminal is applied to the base, and the emitter is DC-coupled to a reference potential point. The transistor includes a transistor, a first resistor arranged in a current path from the input terminal through the base / emitter of the first transistor to a reference potential point, an input terminal and an output terminal, and the input terminal is the A PN having a current mirror circuit connected to the collector of the first transistor, a base, an emitter, and a collector, and a collector and a base coupled to an output terminal of the current mirror circuit.
A second transistor having a junction, a constant voltage source connected in series to the emitter of the second transistor in terms of direct current, and a constant voltage from the output terminal of the current mirror circuit via the base-emitter of the second transistor. A second resistor arranged in a current path to the source, and an output terminal provided at a connection point between the output terminal of the current mirror circuit and the collector of the second transistor, (Rb / Ra)・ N = 1 Ra is the resistance value of the first resistor Rb is the resistance value of the second resistor n is the current ratio of the output end current to the input end current of the current mirror circuit (including n = 1) It is a thing.

Example of Invention

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 5 is a circuit diagram showing the first embodiment. The input terminal P ₁ is connected to the base of the transistor Q ₂₁ . The emitter of the transistor Q ₂₁ is grounded through a resistor R _21, the collector is connected to the collector of the transistor Q _22. The collector of the transistor Q ₂₂ is connected to the base to form a diode structure, and the base is further connected to the base of the transistor Q ₂₃ . The emitters of the transistors Q ₂₂ and Q ₂₃ are connected to the power source Vcc. The collector of the transistor Q ₂₃ is connected to the midpoint between the collector and the base of the diode-connected transistor Q ₂₄ . The emitter of the transistor Q ₂₄ is connected to one end of the resistor R _22, the other end of the resistor R ₂₂ is connected to the positive side electrode of the constant voltage source E _21. The negative electrode of the constant voltage source E ₂₁ involved in the level shift amount is grounded. The output terminal P ₂ is provided at the collector of the transistor Q ₂₃ .

The transistors Q ₂₂ and Q ₂₃ form a current mirror circuit. Therefore, in FIG. 5, the collector-emitter current path of the transistor Q ₂₁ is connected to the input terminal side of the current mirror circuit, and the collector-emitter current path of the transistor Q ₂₄ is connected to the output terminal side. The current mirror circuit causes an output current proportional to the input current flowing through the collector of the transistor Q ₂₂ to flow through the collector of the transistor Q ₂₃ .

The operation of the above configuration will be described. A signal whose operating point is the ground potential, for example, is applied to the input terminal P ₁ . now,
If the characteristics of the transistors Q ₂₂ and Q ₂₃ are made equal, the current flowing through the transistor Q ₂₁ and the resistor R ₂₁ becomes equal to the current flowing through the transistor Q ₂₄ and the resistor R ₂₂ due to the current mirror operation. Under these conditions, if the characteristics of the transistors Q ₂₁ and Q ₂₄ are further equalized, the base-emitter forward drop voltage of these transistors Q ₂₁ and Q ₂₄ can be equalized. According to the above configuration, a signal whose level is shifted from the ground potential to the constant voltage of the constant voltage source E ₂₁ can be obtained while keeping the gain at the output terminal P ₂ .

The potential of the output terminal P ₂ can be expressed by the following formula. Now, the base current of the transistor Q ₂₁ ~Q ₂₄ is negligibly small compared to the collector current of the transistors Q ₂₁ ~Q _24.

For example, if a DC level signal of voltage V ₁ is applied to the input terminal P ₁ , the DC voltage level V ₂ of the output terminal at that time is V ₂
Is Where Ea: constant voltage of constant voltage source E ₂₁ V _BE a, V _BE b: base-emitter forward drop voltage of transistors Q ₂₁ and Q ₂₄ , Ra and R b: resistance values of resistors R ₂₁ and R ₂₂ , respectively Become. By transforming equation (4), Becomes Here, in order to obtain the relationship of V ₂ = Ea + V ₁ (5) without depending on the diode characteristic between the base and the emitter, The following two conditions must be met. These two conditions are not fixed, Is the condition.

The condition is obtained by making the characteristics of the transistors Q ₂₁ and Q ₂₄ and Q ₂₂ and Q ₂₃ equal to each other. Also The condition is naturally obtained by making the resistance values of the resistors R ₂₁ and R ₂₂ equal.

By the way, when a plurality of transistors are integrated on the same semiconductor substrate, the characteristics of the transistors of the same type can be set to a desired value with relative accuracy. In this case, even if the characteristics of each transistor fluctuate from a desired value due to a manufacturing error or a temperature change, the fluctuation tendency of the characteristics of all the transistors becomes the same, so that only the characteristic ratio can be kept constant. Therefore, in the circuit of FIG.
The ratio of the characteristic of Q _22, Q ₂₃ 1: it is easy to 1, further transistor Q _21, the ratio of the characteristic of the Q ₂₄ 1: also because it is easy to 1, the transistors Q _21, Q _The current flowing in ₂₄ (strictly speaking, the current density of the emitter current) can be easily made equal. Therefore, V _BE a / V _BE b can be surely set to 1.

Similarly, when integrating a plurality of resistors on the same semiconductor substrate, it is easy to set the ratio of the resistance values to a desired value, so that Rb / Ra can be surely set to 1. .

Therefore, in the circuit of FIG. 5, it is possible to reliably obtain the output voltage V ₂ as expressed by the equation (5). Then, in this case, the constant voltage Ea of the constant voltage source E ₂₁ becomes the level shift amount, so by appropriately setting this voltage Ea, the operating point of the input signal is converted into an operating point suitable for the circuit of the next stage. be able to.

As described above in detail, in this embodiment, a signal input circuit including a series circuit of one base-emitter current path of the transistor Q ₂₁ and one resistor R ₂₁ is provided between the input terminal P ₁ and the ground. Provided between the constant voltage source E ₂₁ and the output terminal P ₂ is a signal output circuit composed of a base-emitter current path of a transistor Q ₂₄ and a resistor R _{22 as in the} signal input circuit, and a current mirror. The circuit supplies the same bias current to both circuits. In this case, a voltage equal to the input voltage V ₁ is generated in the signal output circuit,
This is appropriately level-shifted according to the constant voltage Ea generated from the constant voltage source E _21, and is led to the output terminal P ₂ .

According to the above configuration, the circuit on the input end side and the circuit on the output end side of the current mirror circuit cancel out the variation in the characteristic of the circuit element. Therefore, even if the characteristic of the circuit element varies, the desired level shift is always performed. The quantity can be secured.

Further, by appropriately selecting the constant voltage Ea of the constant voltage source E ₂₁ provided independently, it is possible to set various level shift amounts. In this case, by selecting the constant voltage Ea as a positive voltage or a negative voltage, it is possible to realize a level shift in both directions from low level to high level or from high level to low level.

As described above, the input-side transistor and the output-side transistor have the same base-emitter characteristics.
Assuming that the emitter voltage is V _BE , the above equation (4) is Generally indicated by.

n: current ratio of the current mirror circuit composed of Q ₂₂ and Q ₂₃ .

k: The number of diodes (PN junction) connected to the output circuit side.

In the above equation (4) ′, Rb / R is set so that the coefficient term of V _BE becomes zero.
By setting the resistance ratio a, the current ratio n, and the number of diodes k, the DC level at the input terminal P ₁ is level-converted at the output terminal P ₂ without being affected by temperature changes.

That is, If the following condition is satisfied, the DC level can be converted without being affected by the PN junction voltage V _BE . In this case, the DC level conversion amount is This conversion level is set by setting the current ratio n and resistance ratio Rb / Ra of the current mirror circuit, and if the number k of diodes to be inserted in the output circuit is set on the conversion level, it depends on the change in V _BE . The DC conversion level amount can be determined without being affected. Note that the resistor Rb indicates a combined resistance when the resistor R ₂₈ and the resistor R ₂₂ are divided and connected to the output side as in the example shown in FIG. 11 described later.

Further, the constant voltage source E ₂₁ can prevent the power consumption from increasing and the frequency characteristic from deteriorating even if the constant voltage Ea is increased.

Further, since the currents of the transistors Q ₂₂ and Q ₂₃ do not change even if the power supply voltage changes, the input signal can be guided to the output terminal P ₂ while maintaining the gain at the input terminal P ₁ . Moreover, if the constant voltage source E ₂₁ is configured as shown in FIG. 6, for example, the constant voltage Ea can be prevented from being affected by the fluctuation of the power supply voltage. From the above, level shift can be performed without being affected by fluctuations in the power supply voltage. The sixth
The figure shows a diode-connected transistor Q ₂₅ , Q ₂₆ and a Zener diode D ₂₁ connected in series. With such a configuration, it is possible to always obtain a constant voltage Ea and make the temperature coefficient zero.

Moreover, since the NPN transistor Q ₂₁ is used in the input stage, the input impedance is high.

Further, the above configuration is advantageous even when only a low power supply voltage can be used.

7 to 10 are circuit diagrams showing different configurations of the signal input circuit and the signal output circuit, respectively. First, FIG. 7 shows a diode-connected transistor Q ₂₇ connected in the forward direction between the emitter of the transistor Q ₂₁ and the resistor R ₂₁ . Even in such a case, for example, by inserting a diode-connected transistor Q ₂₈ in the forward direction between the output terminal P ₂ and the collector of the transistor Q ₂₄ , the voltage across the transistor Q ₂₇ can be secured by the transistor Q ₂₈ . Therefore, the above formula (5) can be obtained.

In FIG. 8, the emitter of the transistor Q ₂₁ is directly connected to the ground on the signal input circuit side, and the resistor R ₂₃ is inserted between the base and the input terminal. On the signal output circuit side, a resistor R ₂₄ having a resistance value equal to that of the resistor R ₂₃ is inserted between the base and collector of the transistor Q ₂₄ . In this configuration, the emitter current of the transistor Q _21, Q ₂₄ are substantially equal, the base current is also substantially equal, therefore, the resistance
The voltage across the R _23, R ₂₄ also substantially equal. As a result, a voltage approximately equal to the input voltage V ₁ is generated between the collector and the emitter of the transistor Q ₂₄ , and the output voltage V ₂ becomes the same as the expression (5).

Figure 9 is at the eighth previous figures, by inserting the resistor R ₂₅ between the base and the ground of the transistor Q _21, resistors R ₂₆ the resistance value and the resistance R ₂₆ between the base and the emitter is equal to the transistor Q ₂₄ It is inserted. Even in such a configuration, a voltage substantially equal to the input voltage V ₁ can be generated between the collector and the emitter of the transistor Q ₂₄ .

In FIG. 10, a diode-connected transistor Q ₂₉ is connected in the forward direction between the base of the transistor Q ₂₁ and ground, and a resistor R ₂₇ is inserted between the base of the transistor Q ₂₁ and the input terminal P ₁ . The resistor R ₂₂ is inserted in the emitter of the transistor Q ₂₄ as in FIG.
In this case, the resistance values of the resistors R ₂₇ and R ₂₂ are made equal.
In such a configuration, the transistor Q _22, Q ₂₃ forms a current mirror circuit, a current equal to the current flowing through the transistor Q ₂₁ flows through the transistor Q _29. Therefore, the circuit consisting of transistor Q ₂₉ and resistor R ₂₇ is
_The circuit operates in the same way as the circuit composed of ₂₄ and the resistor R ₂₂ , and a voltage approximately equal to the input voltage V ₁ is obtained between the constant voltage source E ₂₁ and the output terminal P ₂ .

Although the circuit configured so that the gain with respect to the input signal is 1 has been described above, the gain can be an integer multiple other than 1. FIG. 11 shows a case in which the gain is doubled, for example. That is, two circuits having the same connection structure as the circuit composed of the transistor Q ₂₄ and the resistor R ₂₂ are inserted in series between the collector of the transistor Q ₂₃ and the positive electrode of the constant voltage source E _21. Is. In this case, the transistors Q ₂₄ and Q ₃₀ have the same characteristics,
The resistors R ₂₂ and R ₂₈ have the same resistance value.

According to such a configuration, the positive side electrode and the collector of the transistor Q _24, transistor Q ₂₄ collector and the transistor Q respectively input voltages V ₁ between the collector of ₃₀ of the constant voltage source E ₂₁
A voltage equal to is generated. Therefore, at the output terminal P ₂ , a signal that is amplified twice and the operating point of which is level-shifted to the constant voltage Ea is obtained.

When the output voltage V ₂ is expressed using an equation, However, V _BE c: base-emitter forward drop voltage of transistor Q ₃₀ Rc: resistance value of resistor R ₂₈ . Here, since V _BE a = V _BE b = V _BE c and Ra = Rb = Rc, V ₂ = Ea + 2V ₁ (9). In the same manner, by increasing the number of circuits connected in series, it is possible to obtain a gain of 3 times or more and an integer times.

FIG. 12 shows a level shift circuit that is efficiently configured when there are a plurality of circuits in the next stage and the input operating points of the circuits are different. In this case, for example, it is not necessary to provide a plurality of circuits as shown in FIG. 5, but a plurality of output transistors of the current mirror circuit are provided, and each output transistor is provided with a signal output circuit as described in FIG. 5, for example. Just connect the circuit. FIG. 12 shows the configuration when there are two next-stage circuits having different input operating points. That is, the output transistor Q ₃₁ of the current mirror circuit has the same characteristics as the transistor Q _23, and the transistor Q ₃₂ and the resistor R ₂₉ connected to the collector side of the transistor Q ₃₁ are the transistor Q ₂₄ and the resistor R _22, respectively. Have the same characteristics and have the same connection configuration. Therefore, at the output terminal P ₃ , the output voltage V ₃ obtained by level-shifting the operating point of the input voltage V ₁ to the constant voltage Eb of the constant voltage source E ₂₂ is obtained.

_{V 3 = Eb + V 1 ...} (10) Therefore, a constant voltage Ea of the constant voltage source E _21, E _22, by appropriately selecting the Eb, output terminal P _2, the next-stage circuit to P ₃ which is connected here It is possible to obtain a signal level-shifted up to the input operating point of.

FIG. 13 shows a structure for supplying a level-shifted signal to a differential amplifier circuit at the next stage composed of transistors Q ₃₃ and Q ₃₄ , resistors R _{30 to} R ₃₃ , and a constant current source I _21. . That is, the base of one transistor Q ₃₃ forming a differential pair is connected to the output terminal P _2, and the base of the other transistor Q ₃₄ is connected to the positive electrode of the constant voltage source E ₂₁ . According to this structure, the bases of the transistors Q ₃₃ and Q ₃₄ are
Since the bias is supplied with the constant voltage Ea of the constant voltage source E ₂₁ as a reference in both cases, the differential input voltage does not fluctuate due to the fluctuation of the voltage Ea, and only the input voltage V ₁ is supplied as the differential input. You can Then, by appropriately setting the resistance values of the load resistors R ₃₂ and R ₃₃ , it is possible to obtain a voltage obtained by amplifying the input voltage V ₁ at the output terminals P ₃ and P ₄ .

The present invention is not limited to the above embodiment. For example, in FIG. 5, constant voltage Ea of constant voltage source E ₂₁
The level shift amount can be set to zero by setting to zero.
In other words, the circuit can be simply used as an impedance conversion circuit. Further, it goes without saying that the current mirror circuit is not limited to the one shown in FIG.

〔The invention's effect〕

As described above, according to the present invention, it is possible to provide a level shift circuit suitable for an integrated circuit, having a simple circuit configuration, and capable of always performing a stable level shift.

[Brief description of drawings]

1 to 4 are circuit diagrams showing different examples of conventional level shift circuits, FIG. 5 is a circuit diagram showing a first embodiment of the level shift circuit according to the present invention, and FIGS.
FIG. 13 is a circuit diagram showing the second to ninth embodiments of the present invention. P ₁ …… Input terminal, P ₂ , P ₃ …… Output terminal, Vcc …… Power supply, E
₂₁ , E ₂₂ …… Constant voltage source, I ₂₁ …… Constant current source, Q _{21 to} Q ₃₄ ……
Transistor, R _{21 to} R ₃₃ ...... Resistor, D ₂₁ ...... Zener diode.

Claims (1)

[Claims] 1. A first circuit having an input terminal to which an input signal is applied, a base, an emitter, and a collector, wherein the input signal from the input terminal is applied to the base, and the emitter is DC-coupled to a reference potential point. Transistor, a first resistor arranged in a current path from the input terminal to a reference potential point via the base / emitter of the first transistor, an input end and an output end, and the input end is the A current mirror circuit connected to the collector of the first transistor; a PN junction second transistor having a base, an emitter, and a collector, the collector and the base of which are coupled to the output terminal of the current mirror circuit; Constant voltage source connected in series in series to the emitter of the second transistor, and from the output end of the current mirror circuit to the base-emitter of the second transistor A second resistor arranged in a current path reaching a constant voltage source via the output terminal and an output terminal provided at a connection point between the output terminal of the current mirror circuit and the collector of the second transistor; Rb / Ra) · n = 1 Ra is the resistance value of the first resistor Rb is the resistance value of the second resistor n is the current ratio of the output end current to the input end current of the current mirror circuit (including n = 1) A level shift circuit characterized in that