JPH0669122A - Fabrication of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent increase and fluctuation of contact resistance while preventing lowering of migration resistance of metallization by forming an antireflection film on an interlayer dielectric film and a fine resist pattern thereon. CONSTITUTION:After forming a first interlayer dielectric film 6, a second interlayer dielectric film 7 is formed on the entire surface. An antireflection film 9 composed of titanium nitrogen (TiN) or titanium tungsten (TiW) is formed entirely through sputtering. Resist is then applied on the entire surface and subjected to exposure and development thus forming a fine resist pattern 8a. The antireflection film 9 is subsequently etched using chlorine based etching gas with the resist pattern 8a as a mask. Subsequently, the second interlayer dielectric film 7 is etched using fluorine based etching gas, e.g. CF4, CFH3, thus forming fine contact holes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for stably forming a fine resist pattern on an interlayer insulating film.

[0002]

2. Description of the Related Art A fine resist pattern formed on an interlayer insulating film of a semiconductor device is used as an etching mask for forming fine contact holes in this interlayer insulating film. Through this contact hole, for example, a diffusion layer formed on the surface of the semiconductor substrate and a metal wiring formed on the interlayer insulating film are connected. The method of forming the contact hole of the N-channel MOS transistor will be described as an example.

Referring to FIG. 4, which is a sectional view in order of steps,
In the conventional method of manufacturing a semiconductor device, first, the surface of the field oxide film 2, the gate oxide film 3, the polycrystalline silicon gate electrode 4, the N ⁺ diffusion layer 5, and the polycrystalline silicon gate electrode 4 is formed on the P-type silicon substrate 1. After forming the first interlayer insulating film 6 for covering, the second interlayer insulating film 7 is formed on the entire surface [FIG.
(A)]. Usually, the first interlayer insulating film 6 and the second interlayer insulating film 7
A silicon oxide film (SiO ₂ ) is used for each of these. Next, a resist is applied and formed on the entire surface, and the resist is exposed and developed to form a finely patterned resist 8b [FIG. 4 (b)]. next,
Using this resist 8b as an etching mask, reactive ion etching (RI
A fine contact hole is formed in the second interlayer insulating film 7 by the method E) [FIG. 4 (c)].

[0004]

In the conventional method for forming the finely patterned resist 8b described above, as shown in FIG. 5, the exposure wavelength is 436 nm, the exposure amount is 200 mJ /
When exposed under the condition of cm ² , the shape of the side surface of the resist 8b largely depends on the film thickness of the second interlayer insulating film 7 underlying the resist 8b. This occurs because the reflected light (including multiple reflected light) from the interface between the second interlayer insulating film 7 and the silicon substrate 1 (N ⁺ diffusion layer 5) interferes with the incident light in the resist 8b. When the side surface of the resist 8b is formed as described above, the diameter of a fine contact hole formed by using the resist 8b as a mask varies, and the step coverage of the metal wiring in this contact hole, the metal wiring and N
⁺ There is a problem that the contact area with the diffusion layer 5 is varied, the contact resistance is increased and varied, and the resistance of the metal wiring to migration is lowered.

[0005]

A method of manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device, in which an interlayer insulating film is provided on a semiconductor substrate.
In the step of forming the fine resist pattern, an antireflection film is formed on the interlayer insulating film, and further, a fine resist pattern is formed on the antireflection film. Preferably, the interlayer insulating film is a silicon oxide film, and the antireflection film is a titanium nitride film or titanium.
It is a tungsten film.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. The method of forming the contact hole of the N-channel MOS transistor will be described as an example.

Referring to FIG. 1 which is a cross-sectional view in the order of steps,
In one embodiment of the present invention, first, as in the conventional method of manufacturing a semiconductor device, a field oxide film 2 is formed on a P-type silicon substrate 1.
After the gate oxide film 3, the polycrystalline silicon gate electrode 4, the N ⁺ diffusion layer 5, and the surface of the polycrystalline silicon gate electrode 4 are formed with a first interlayer insulating film 6 made of, for example, SiO ₂ , chemical vapor deposition is performed on the entire surface. By the phase growth (CVD) method, for example, S
forming a second interlayer insulating film 7 made of iO ₂ [Figure 1
(A)].

Next, titanium nitride (TiN) or titanium-tungsten (Ti) is formed on the entire surface by a sputtering method or the like.
An antireflection film 9 made of W) is formed. Next, a resist is applied and formed on the entire surface, and the resist is exposed and developed to form a finely patterned resist 8a.
Are formed [FIG. 1 (b)].

Then, using this resist 8a as an etching mask, RI using a chlorine-based etching gas is first used.
The antireflection film 9 is etched by the E method, and subsequently, the second interlayer insulating film 7 is etched by the RIE method using a fluorine-based etching gas such as CF ₄ or CFH _3. Then, a fine contact hole is formed [Fig. 1 (c)].

Exposure wavelength 365 nm (i of Hg lamp
Line) or 436 nm (g line of Hg lamp), the film thickness dependence of the reflectance of TiN for these wavelengths is as shown in FIG. 2, and the film thickness dependence of the reflectance of TiW is As shown in FIG. From this, in the above-described embodiment, when TiN is used as the antireflection film 9, the TiN film thickness is preferably in the range of 50 to 60 nm. Further, when TiW is used as the antireflection film 9, the film thickness of TiW is preferably 40 nm or more. By providing the antireflection film 9 under such conditions, the interference between the incident oblique light and the reflected light (including multiple reflected light) is mitigated,
It is possible to suppress the occurrence of an abnormal shape of the side surface of the resist 8a depending on the film thickness of the second interlayer insulating film 7 underlying the resist 8a, and prevent an increase and variation in contact resistance and a decrease in resistance to migration of metal wiring. It will be possible. The same effect can be obtained when a KrF excimer laser light source with a wavelength of 248 nm is used.

[0011]

As described above, according to the method of manufacturing a semiconductor device of the present invention, by forming the antireflection film on the interlayer insulating film, the resist pattern shape due to the difference in film thickness of the interlayer insulating film underlying the resist is formed. It is possible to eliminate the change of the contact resistance, and it is possible to prevent the increase and the variation of the contact resistance and the deterioration of the resistance of the metal wiring against migration.

[Brief description of drawings]

FIG. 1 is a cross-sectional view in process order for explaining an embodiment of the present invention.

FIG. 2 is a graph showing the film thickness dependence of the reflectance of titanium nitride for explaining the above-mentioned example.

FIG. 3 is a graph showing the film thickness dependence of the reflectance of titanium / tungsten for explaining the above-mentioned embodiment.

4A to 4C are cross-sectional views in order of processes for explaining a conventional method for manufacturing a semiconductor device.

FIG. 5 is a schematic diagram for explaining a problem of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 P-type silicon substrate 2 Field oxide film 3 Gate oxide film 4 Polycrystalline silicon gate electrode 5 N ⁺ diffusion layer 6 First interlayer insulating film 7 Second interlayer insulating film 8a, 8b Resist 9 Antireflection film

Claims (3)

[Claims] 1. A step of forming a fine resist pattern on an interlayer insulating film provided on a semiconductor substrate, wherein an antireflection film is formed on the interlayer insulating film, and the fine resist pattern is formed on the antireflection film. A method of manufacturing a semiconductor device, comprising forming a resist pattern. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the interlayer insulating film is a silicon oxide film, and the antireflection film is a titanium nitride film. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the interlayer insulating film is a silicon oxide film, and the antireflection film is a titanium-tungsten film.