JPH0669073B2 - Leadless parts - Google Patents

Leadless parts

Info

Publication number
JPH0669073B2
JPH0669073B2 JP14361186A JP14361186A JPH0669073B2 JP H0669073 B2 JPH0669073 B2 JP H0669073B2 JP 14361186 A JP14361186 A JP 14361186A JP 14361186 A JP14361186 A JP 14361186A JP H0669073 B2 JPH0669073 B2 JP H0669073B2
Authority
JP
Japan
Prior art keywords
side wall
electrode
carrier
recess
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP14361186A
Other languages
Japanese (ja)
Other versions
JPS63143A (en
Inventor
哲夫 黒川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14361186A priority Critical patent/JPH0669073B2/en
Publication of JPS63143A publication Critical patent/JPS63143A/en
Publication of JPH0669073B2 publication Critical patent/JPH0669073B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔概要〕 キャリアの側壁に並設した平面視弓形の側壁凹部に、回
路素子と接続する側壁電極を形成し、キャリアの底面の
周縁に、この側壁凹部に連通して側面視弓形の底面凹部
を設け、底面凹部の内面に側壁電極に連結した底面電極
を形成したリードレス部品とすることにより、回路基板
のパッドに半田付け実装するにあたり、半田が毛細管現
象により、底面凹部に上昇して底面電極に密着する。
DETAILED DESCRIPTION OF THE INVENTION [Outline] Side wall electrodes connected to a circuit element are formed in side wall recesses formed in parallel with each other on the side wall of a carrier, the side wall recesses being in communication with the side wall recesses at the periphery of the bottom surface of the carrier. By providing a leadless component in which a bottom recess having an arcuate shape in side view is provided and a bottom electrode connected to the sidewall electrode is formed on the inner surface of the bottom recess, when soldering and mounting on a pad of a circuit board, the solder causes a bottom phenomenon due to a capillary phenomenon. Ascends to the recess and adheres to the bottom electrode.

よって、半田付けの強度が強く、且つ隣接した基板パッ
ド間,電極間が短絡する恐れがない。
Therefore, the strength of soldering is high, and there is no risk of short-circuiting between adjacent board pads and electrodes.

〔産業上の利用分野〕[Industrial application field]

本発明は、IC,LSI等の半導体チップ,或いは混成集積回
路の回路素子等(以下回路素子と略称する)を、セラミ
ックよりなるキャリアに、搭載したリードレス部品の改
良に関する。
The present invention relates to an improvement of a leadless component in which a semiconductor chip such as an IC, an LSI or the like, or a circuit element or the like (hereinafter abbreviated as circuit element) of a hybrid integrated circuit is mounted on a carrier made of ceramic.

回路素子を小さな箱形のセラミックよりなるキャリアに
搭載し、キャリアの側壁,及び底面に、導体膜よりなる
電極を設けたリードレス部品は、小形で、回路基板に高
密度に実装することができるばかりでなく、リードがな
いので実装した際に、浮遊容量が発生しない等のメリッ
トがある。
A leadless component in which circuit elements are mounted on a carrier made of a small box-shaped ceramic and electrodes made of a conductive film are provided on the side wall and bottom surface of the carrier are small in size and can be mounted at high density on a circuit board. Not only that, but since there are no leads, there is an advantage that stray capacitance does not occur when mounted.

しかし一方、回路素子に多数の電極があることに伴い、
このようなリードレス部品には、チップキャリアの側
壁,及び底面に、近接した多数の電極が形成されてい
る。
However, on the other hand, with the large number of electrodes in the circuit element,
In such a leadless component, a large number of electrodes adjacent to each other are formed on the side wall and the bottom surface of the chip carrier.

このためリードレス半導体部品には、半田付け実装時に
電極間が短絡する恐れがなく、且つ半田付け強度の強い
構造が要望されている。
For this reason, leadless semiconductor components are required to have a structure in which there is no risk of short-circuiting between electrodes during mounting by soldering and the soldering strength is strong.

〔従来の技術〕[Conventional technology]

第3図及び第4図を参照しながら、従来のリードレス部
品を説明する。
A conventional leadless component will be described with reference to FIGS. 3 and 4.

第3図は従来例の構成図で、(a)は実装前の、(b)
は実装後のそれぞれ斜視図、第4図は従来例の一部破断
側面図で、(a)は実装時の図、(b)実装後の図であ
る。
FIG. 3 is a block diagram of a conventional example, (a) before mounting, (b)
FIG. 4 is a perspective view after mounting, FIG. 4 is a partially cutaway side view of a conventional example, (a) is a view at the time of mounting, and (b) is a view after mounting.

第3図において、セラミック、例えばアルミナよりなる
小さい角板形のキャリア2は、中央部に段付角形凹部3
が形成され、段付角形凹部3に、LSI,IC等の半導体チッ
プである回路素子1が搭載されている。
In FIG. 3, a small rectangular plate-shaped carrier 2 made of ceramics such as alumina has a stepped rectangular concave portion 3 at the center.
Is formed, and the circuit element 1 which is a semiconductor chip such as an LSI or IC is mounted in the stepped rectangular recess 3.

キャリア2の底面23に平行する段付角形凹部3の段端面
4には、段付角形凹部3のそれぞれの辺に直交して放射
状に、キャリア2の側壁に並設された後述する側壁凹部
22にそれぞれ通じる、所望数の金属導体膜よりなる電極
パターン5が形成されている。
On the step end surface 4 of the stepped rectangular recess 3 parallel to the bottom surface 23 of the carrier 2, side wall recesses, which will be described later, are arranged side by side on the side wall of the carrier 2 radially in a direction orthogonal to each side of the stepped rectangular recess 3.
An electrode pattern 5 made of a desired number of metal conductor films, each of which communicates with 22, is formed.

そして、例えば金線よりなる接続線をワイヤボンデング
して、この電極パターン5の内側端部と半導体チップ1
のそれぞれの電極とを接続している。
Then, a connecting wire made of, for example, a gold wire is wire-bonded, and the inner end portion of the electrode pattern 5 and the semiconductor chip 1 are connected.
Of the respective electrodes are connected.

キャリア2のそれぞれの外側の側壁21には、底面23に垂
直で平面視が弓形の側壁凹部22を並列して設け、それぞ
れの側壁凹部22の内面に、電極パターン5の外側端面に
直交して連結した、金属導体膜よりなる側壁電極6を形
成してある。 また、キャリア2の底面23の周縁には、
それぞれの側壁電極6に連結した、金属導体膜よりなる
角片形の底面パッド7を形成してある。
On each outer side wall 21 of the carrier 2, side wall recesses 22 which are perpendicular to the bottom surface 23 and are arcuate in plan view are provided in parallel, and the inner surface of each side wall recess 22 is perpendicular to the outer end surface of the electrode pattern 5. Sidewall electrodes 6 made of a metal conductor film, which are connected to each other, are formed. In addition, on the periphery of the bottom surface 23 of the carrier 2,
A rectangular strip-shaped bottom pad 7 made of a metal conductor film and connected to each side wall electrode 6 is formed.

さらにまた、キャリア2の解放された上端面に、セラミ
ック板,或いは金属板よりなるカバー9を接着し、半導
体チップ1を段付角形凹部3内に封止している。
Furthermore, a cover 9 made of a ceramic plate or a metal plate is adhered to the open upper end surface of the carrier 2 to seal the semiconductor chip 1 in the stepped rectangular recess 3.

一方、セラミック板よりなる回路基板30の上面には、所
望の導体パターンを形成し、それぞれの導体パターンの
端部には、キャリア2の底面パッド7に対応して、角片
形の基板パッド31が並設されている。
On the other hand, a desired conductor pattern is formed on the upper surface of the circuit board 30 made of a ceramic plate, and the end portions of each conductor pattern correspond to the bottom surface pads 7 of the carrier 2 and are square-shaped board pads 31. Are juxtaposed.

なお、上述のキャリア2を製造するには、所望の角板
状、及び枠板状のセラミック板をグリンシートの状態で
積層して、段付角形凹部3の底孔部を形成した後に、上
端面の段端面4に、モリブデン等のペーストをスクリー
ン印刷して、電極パターン5の下地膜を設け、さらにこ
の上面に、枠板状のセラミック板をグリンシートの状態
で積層して段付角形凹部3の状部を形成する。
In order to manufacture the above-mentioned carrier 2, desired rectangular plate-shaped and frame plate-shaped ceramic plates are laminated in the state of a green sheet to form a bottom hole portion of the stepped rectangular concave portion 3, A paste such as molybdenum is screen-printed on the end face 4 of the end face to provide a base film for the electrode pattern 5, and a frame plate-shaped ceramic plate is laminated on the upper face in the state of a green sheet to form a stepped rectangular recess. 3 to form the shape part.

次に焼成し、キャリア2を硬化一体化した後に、側壁凹
部22をレーザー加工等して設け、所望の形状に仕上げ
る。その後、側壁電極6,底面パッド7の下地層を、モリ
ブデン等のペーストをスクリーン印刷,焼成し、電極パ
ターン5の露出面、側壁電極6,底面パッド7の下地層の
上面に、金メッキ等して、電極パターン5,側壁電極6,底
面パッド7を完成させる。
Next, after firing, the carrier 2 is hardened and integrated, the sidewall recess 22 is provided by laser processing or the like, and finished into a desired shape. After that, the base layer of the side wall electrodes 6 and the bottom pad 7 is screen-printed with paste of molybdenum or the like and baked, and the exposed surface of the electrode pattern 5 and the top surface of the base layer of the side wall electrodes 6 and the bottom pad 7 are plated with gold or the like. , The electrode pattern 5, the sidewall electrode 6, and the bottom pad 7 are completed.

リードレス部品は、上述のようにすることにより容易に
製造することができる。
The leadless component can be easily manufactured as described above.

上述のようなリードレス部品を、回路基板30に半田付け
実装するには、第4図(a)のように、基板パッド31の
上面に半田ペーストを、例えばスクリーン印刷し、基板
パッド31に底面パッド7を位置合わせして、リードレス
部品を回路基板30に仮設置し、回路基板30を例えば赤外
線加熱炉等に入れて加熱する。
To mount the leadless component as described above on the circuit board 30 by soldering, a solder paste is screen-printed on the upper surface of the board pad 31, for example, as shown in FIG. The pads 7 are aligned, the leadless component is temporarily installed on the circuit board 30, and the circuit board 30 is placed in an infrared heating furnace or the like for heating.

加熱すると第4図(b)のように、半田ペーストがリフ
ローして、底面パッド7に密着すると同時に、溶融状態
の半田が毛細管現象により側壁凹部22に上昇して、側壁
電極6に密着し半田10となって固着する。
When heated, as shown in FIG. 4 (b), the solder paste reflows and adheres to the bottom surface pad 7, and at the same time, the molten solder rises to the side wall recess 22 due to the capillary phenomenon and adheres to the side wall electrode 6 and solder. It becomes 10 and sticks.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかしながら上記従来のリードレス部品は、底面23の周
縁に、多数の底面パッド7が並設されていることに起因
して、それぞれの底面パッド7の大きさが制限されてい
る。したがって、半田10の固着面が比較的小さくて、半
田付け強度が弱くなり、回路基板の振動、回路素子であ
る半導体チップの稼働による熱膨張等により、半田10に
亀裂が発生する恐れがある。即ちリードレス部品の実装
固着の信頼度が低いという問題点がある。
However, in the conventional leadless component described above, the size of each bottom pad 7 is limited due to the large number of bottom pads 7 arranged side by side on the periphery of the bottom surface 23. Therefore, the fixing surface of the solder 10 is relatively small, the soldering strength becomes weak, and the solder 10 may crack due to vibration of the circuit board, thermal expansion due to the operation of the semiconductor chip that is a circuit element, or the like. That is, there is a problem that the reliability of mounting and fixing the leadless component is low.

また、底面パッド7,基板パッド31が平坦であるので、第
4図(b)に示すように、半田ペーストがリフローする
際に、基板パッド31の外に流出して、隣接する基板パッ
ド31にブリッジする恐れがある。さらにまた、半田ペー
ストの溶剤が加熱沸騰して、基板パッド31の外側に飛び
出して、半田ボール11となる。
Further, since the bottom surface pad 7 and the board pad 31 are flat, as shown in FIG. 4 (b), when the solder paste reflows, it flows out of the board pad 31 to be adjacent to the board pad 31. There is a risk of bridging. Furthermore, the solvent of the solder paste is heated and boiled, jumps out of the board pad 31, and becomes the solder ball 11.

このように基板パッド31の外に飛び出した半田ボール11
は、チップキャリア2,及び回路基板30がセラミックであ
るために、半田の濡れ性が悪くてチップキャリア2,或い
は回路基板30に付着し難い。したがって、リードレス部
品を使用中にブリッジ状態に近い半田の流出部に、半田
ボール11が転がり込み、隣接した基板パッド間を短絡す
るという問題点がある。
In this way, the solder balls 11 jumping out of the board pad 31.
Since the chip carrier 2 and the circuit board 30 are made of ceramic, the solder wettability is poor and it is difficult to adhere to the chip carrier 2 or the circuit board 30. Therefore, when the leadless component is used, there is a problem that the solder ball 11 rolls into the solder outflow portion close to the bridge state and short-circuits between the adjacent board pads.

〔問題点を解決するための手段〕[Means for solving problems]

上記従来の問題点を解決するため本発明は、リードレス
部品を回路基板30に半田付け実装する電極構造を、第1
図のように、キャリア2の側壁21に並列した、平面視弓
形の側壁凹部22の内面に形成した側壁電極6を設け、内
側端部が接続線を介して回路素子1の電極に接続して、
外側端面を側壁電極6に連結する。
In order to solve the above conventional problems, the present invention provides an electrode structure in which a leadless component is mounted on a circuit board 30 by soldering.
As shown in the drawing, the side wall electrode 6 formed on the inner surface of the side wall recess 22 having a bow shape in plan view is provided in parallel with the side wall 21 of the carrier 2, and the inner end portion is connected to the electrode of the circuit element 1 through the connection line. ,
The outer end surface is connected to the sidewall electrode 6.

そして、それぞれの側壁凹部2に連結する如くに、キャ
リア2の底面23の周縁に、側面視弓形の底面凹部24を並
設し、底面凹部24の内面に底面電極25を形成した構成に
したものである。
Then, a bottom recess 23 having an arcuate side view is provided side by side on the periphery of the bottom surface 23 of the carrier 2 so as to be connected to each side wall recess 2, and a bottom electrode 25 is formed on the inner surface of the bottom recess 24. Is.

〔作用〕[Action]

上記本発明の手段によれば、底面電極25が、底面凹部24
の弧形の内面に形成されているので、投影面積が従来の
底面パッドと同面積であるにもかかわらず、半田10に接
着する接着面が大きい。したがって半田付け強度が強く
なり、リードレス部品の実装固着の信頼度が向上する。
According to the above-mentioned means of the present invention, the bottom electrode 25 has the bottom recess 24.
Since it is formed on the inner surface of the arc shape, the bonding surface for bonding to the solder 10 is large even though the projected area is the same area as the conventional bottom surface pad. Therefore, the soldering strength is increased and the reliability of mounting and fixing the leadless component is improved.

また、底面電極25,側壁電極6がともに、底面凹部24,側
壁凹部22の弧形の内面に形成されているので、基板パッ
ド31上に塗布した半田ペーストがリフローした際に、毛
細管現象により底面電極25及び側壁電極6に上昇し接着
する。よって、半田が基板パッド31の外に流出したり、
或いは半田ボールとなって飛び出す恐れが少なく、した
がって、隣接した基板パッド間が短絡する恐れが少な
い。
Further, since both the bottom surface electrode 25 and the side wall electrode 6 are formed on the arc-shaped inner surfaces of the bottom surface recess 24 and the side wall recess 22, when the solder paste applied on the substrate pad 31 reflows, the bottom surface is caused by the capillary phenomenon. The electrode 25 and the sidewall electrode 6 are raised and adhered. Therefore, solder flows out of the board pad 31,
Alternatively, the solder balls are less likely to jump out, and therefore, there is less risk of short-circuiting between adjacent substrate pads.

〔実施例〕〔Example〕

以下図を参照しながら、本発明を具体的に説明する。な
お、全図を通じて同一符号は同一対象物を示す。
The present invention will be specifically described below with reference to the drawings. The same reference numerals denote the same objects throughout the drawings.

第1図は本発明の1実施例の構成図で、(a)は実装前
の斜視図、(b)は実装後の一部破断側面図、(c)は
要部斜視図、第2図は本発明の1実施例の要部側面図
で、(a)は実装時の図、(b)は実装後の図である。
FIG. 1 is a configuration diagram of an embodiment of the present invention, (a) is a perspective view before mounting, (b) is a partially cutaway side view after mounting, (c) is a perspective view of a main part, and FIG. [FIG. 3] is a side view of a main part of one embodiment of the present invention, (a) is a diagram at the time of mounting, and (b) is a diagram after mounting.

第1図において、セラミック、例えばアルミナよりなる
小さな角板形のキャリア2には、中央部に設けた段付角
形凹部3に、LSI,IC等の半導体チップ等の回路素子1が
搭載され、解放された上端面に、カバー9が接着され、
回路素子を封止している。
In FIG. 1, a carrier 2 in the form of a small rectangular plate made of ceramics such as alumina is mounted with a circuit element 1 such as a semiconductor chip such as LSI or IC in a stepped rectangular recess 3 provided in the central portion and released. The cover 9 is adhered to the formed upper end surface,
The circuit element is sealed.

段付角形凹部3の段端面4には、キャリア2の側壁に並
設された後述する側壁凹部22にそれぞれ通じる、所望数
の金属導体膜よりなる電極パターン5を放射状に形成
し、例えば金線よりなる接続線をワイヤボンデングし
て、それぞれの電極パターン5の内側端部と回路素子1
のそれぞれの電極とを接続している。
On the stepped end face 4 of the stepped rectangular recessed portion 3, an electrode pattern 5 made of a desired number of metal conductor films, which communicates with side wall recessed portions 22 which will be described later and which are arranged in parallel on the side wall of the carrier 2, is radially formed. The connecting wires made of wire are wire-bonded to form inner ends of the electrode patterns 5 and the circuit element 1.
Of the respective electrodes are connected.

また、キャリア2のそれぞれの側壁21には、底面23に垂
直な平面視が弓形の側壁凹部22を並列して設け、それぞ
れの側壁凹部22の内面に、電極パターン5の外側端面に
直交して連結する金属導体膜よりなる側壁電極6を形成
してある。
Moreover, side walls 21 of the carrier 2 are provided in parallel with side wall recesses 22 having an arcuate shape in a plan view perpendicular to the bottom surface 23, and the inner surface of each side wall recess 22 is perpendicular to the outer end surface of the electrode pattern 5. A side wall electrode 6 made of a metal conductor film to be connected is formed.

詳細を第1図(c)に示すように、キャリア2の底面23
の周縁には、それぞれの側壁凹部22に連通する如くに、
側面視弓形の底面凹部24を設け、底面凹部24の内面に
は、側壁電極6に連結した金属導体膜よりなる底面電極
25を形成してある。 一方、セラミック板よりなる回路
基板30の上面には、所望の導体パターンを形成し、それ
ぞれの導体パターンの端部には、キャリア2の底面凹部
24に対応して、角片形の基板パッド31が並設されてい
る。
As shown in detail in FIG. 1 (c), the bottom surface 23 of the carrier 2
In the peripheral edge of, so as to communicate with each side wall recess 22,
A bottom recess 24 having an arcuate shape in side view is provided, and a bottom electrode made of a metal conductor film connected to the sidewall electrode 6 is provided on the inner surface of the bottom recess 24.
Formed 25. On the other hand, desired conductor patterns are formed on the upper surface of the circuit board 30 made of a ceramic plate, and the bottom surface recessed portion of the carrier 2 is formed at the end of each conductor pattern.
Corresponding to 24, rectangular piece-shaped substrate pads 31 are arranged in parallel.

上述のようなリードレス部品を、回路基板30に半田付け
実装するには、第2図(a)のように、基板パッド31上
面に半田ペースト10Aを、例えばスクリーン印刷し、基
板パッド31に底面凹部24を位置合わせして、リードレス
部品を回路基板30上に仮設置し、回路基板30を例えば赤
外線加熱炉等に入れて加熱する。
To mount the leadless component as described above by soldering on the circuit board 30, as shown in FIG. 2A, the solder paste 10A is screen-printed on the upper surface of the board pad 31, and the bottom surface of the board pad 31 is printed. The recesses 24 are aligned, the leadless component is temporarily installed on the circuit board 30, and the circuit board 30 is put in, for example, an infrared heating furnace to be heated.

加熱すると第2図(b),第1図(b)のように、半田
ペースト10Aがリフローして、半田が毛細管現象により
上昇し、底面電極25及び側壁電極6に接着する。
When heated, as shown in FIGS. 2B and 1B, the solder paste 10A reflows and the solder rises due to the capillary phenomenon and adheres to the bottom electrode 25 and the side wall electrode 6.

この際、底面電極25は底面凹部24の弧形の内面に形成さ
れているので、半田の濡れ性が良く、且つ従来のように
平面同志が当接するものでないので、毛細管現象が起こ
り易い。よって、流動状態の半田が基板パッド31の外側
に流出する恐れが少なく、また半田ボールが発生する恐
れも少ない。
At this time, since the bottom surface electrode 25 is formed on the arc-shaped inner surface of the bottom surface recess 24, the wettability of the solder is good, and since the flat surfaces do not come into contact with each other as in the conventional case, the capillary phenomenon easily occurs. Therefore, there is little risk that the flowing solder will flow out of the substrate pad 31, and there will be less risk that solder balls will be generated.

また、底面電極25は円弧面に形成されているので、その
投影面積が従来の底面パッドと同面積であっても、半田
10の接着面が従来の底面パッドよりも大きく、半田付け
強度が強い。
Further, since the bottom electrode 25 is formed in an arc surface, even if the projected area is the same as that of the conventional bottom pad,
The adhesive surface of 10 is larger than the conventional bottom pad, and the soldering strength is strong.

本発明は、上記実施例に限ることなく、混成集積回路の
平板形のキャリアについても、側壁電極6,底面電極25を
形成することで実施可能のことを含むものである。
The present invention is not limited to the above-described embodiment, and includes a flat carrier of a hybrid integrated circuit that can be implemented by forming the sidewall electrode 6 and the bottom electrode 25.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明は、キャリアの底面の周縁
に、側壁凹部に連通して底面凹部を設け、底面凹部に底
面電極を形成したリードレス部品であって、半田の接着
面積が大きくて、半田付け強度が強く、回路基板への実
装固着の信頼度が高い。また、半田ブリッジ,或いは半
田ボールの発生する恐れが少なく、隣接した電極間,基
板パッド間が短絡する恐れがない等、実用上で優れた効
果がある。
As described above, the present invention is a leadless component in which a bottom surface recess is provided in communication with a side wall recess on the periphery of the bottom surface of a carrier, and a bottom surface electrode is formed in the bottom surface recess. High soldering strength and high reliability of mounting and fixing to the circuit board. In addition, there is little risk that solder bridges or solder balls will be generated, and there is no risk of short-circuiting between adjacent electrodes or between substrate pads.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の実施例の構成図で、 (a)は実装前の斜視図、 (b)は実装後の一部破断側面図、 (c)は要部斜視図、 第2図は本発明の実施例の要部側面図で、 (a)は実装時の図、 (b)は実装後の図、 第3図は従来例の構成図で、 (a)は実装前の斜視図、 (b)は実装後の斜視図、 第4図は従来例の一部破断側面図で、 (a)は実装時の図、 (b)実装後の図である。 図において、 1は回路素子、 2はキャリア、 3は段付角形凹部、 4は段端面、 5は電極パターン、 6は側壁電極、 7は底面パッド、 9はカバー、 10は半田、 10Aは半田ペースト、 11は半田ボール、 21は側壁、 22は側壁凹部、 23は底面、 24は底面凹部、 25は底面電極、 30は回路基板、 31は基板パッドをそれぞれ示す。 FIG. 1 is a configuration diagram of an embodiment of the present invention. (A) is a perspective view before mounting, (b) is a partially cutaway side view after mounting, (c) is a perspective view of essential parts, and FIG. 2 is FIG. 3 is a side view of a main part of an embodiment of the present invention, (a) is a diagram at the time of mounting, (b) is a diagram after mounting, FIG. 3 is a configuration diagram of a conventional example, (a) is a perspective view before mounting , (B) is a perspective view after mounting, FIG. 4 is a partially cutaway side view of a conventional example, (a) is a drawing at the time of mounting, and (b) is a drawing after mounting. In the figure, 1 is a circuit element, 2 is a carrier, 3 is a stepped rectangular recess, 4 is a step end face, 5 is an electrode pattern, 6 is a sidewall electrode, 7 is a bottom pad, 9 is a cover, 10 is solder, and 10A is solder. Reference numeral 11 is a paste, 11 is a solder ball, 21 is a side wall, 22 is a side wall recess, 23 is a bottom surface, 24 is a bottom surface recess, 25 is a bottom surface electrode, 30 is a circuit board, and 31 is a board pad.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】キャリア(2)に回路素子(1)を搭載し
た部品において、 該キャリア(2)の側壁(21)に並列した、平面視弓形
の側壁凹部(22)の内面に形成されるとともに、該回路
素子(1)に接続された側壁電極(6)と、 それぞれの該側壁凹部(22)に連通する如くに、該キャ
リア(2)の底面(23)の周縁に並設された、側面視弓
形の底面凹部(24)と、 回路基板(30)上に並設した基板パッド(31)のそれぞ
れに半田付け接続すべく、該底面凹部(24)の内面に形
成され、該側壁電極(6)に連結した底面電極(25)と
を、備えたことを特徴とするリードレス部品。
1. A component in which a circuit element (1) is mounted on a carrier (2), which is formed on an inner surface of a side wall recess (22) which is arranged in parallel with a side wall (21) of the carrier (2) and which is arcuate in a plan view. Along with the side wall electrodes (6) connected to the circuit element (1) and the side wall recesses (22), the side wall electrodes (6) are arranged side by side on the periphery of the bottom surface (23) of the carrier (2). , The side wall formed on the inner surface of the bottom surface recess (24) for soldering and connecting to the bottom surface recess (24) in a side view and the board pads (31) juxtaposed on the circuit board (30). A leadless component comprising a bottom electrode (25) connected to the electrode (6).
JP14361186A 1986-06-19 1986-06-19 Leadless parts Expired - Lifetime JPH0669073B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14361186A JPH0669073B2 (en) 1986-06-19 1986-06-19 Leadless parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14361186A JPH0669073B2 (en) 1986-06-19 1986-06-19 Leadless parts

Publications (2)

Publication Number Publication Date
JPS63143A JPS63143A (en) 1988-01-05
JPH0669073B2 true JPH0669073B2 (en) 1994-08-31

Family

ID=15342760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14361186A Expired - Lifetime JPH0669073B2 (en) 1986-06-19 1986-06-19 Leadless parts

Country Status (1)

Country Link
JP (1) JPH0669073B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4699530A (en) * 1985-06-28 1987-10-13 Oiless Industry Co., Ltd. Thrust ball bearing unit
US4817983A (en) * 1987-11-12 1989-04-04 Maremont Corporation Apparatus and method for repairing a MacPherson strut assembly
US5166773A (en) * 1989-07-03 1992-11-24 General Electric Company Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid
US5146308A (en) * 1990-10-05 1992-09-08 Micron Technology, Inc. Semiconductor package utilizing edge connected semiconductor dice
DE10025774A1 (en) * 2000-05-26 2001-12-06 Osram Opto Semiconductors Gmbh Semiconductor device with surface metallization
JP5409236B2 (en) * 2009-09-28 2014-02-05 京セラ株式会社 Wiring board
CN103828038B (en) * 2011-07-25 2016-07-06 京瓷株式会社 Circuit board, electronic installation and electronic module
JP6382615B2 (en) * 2014-07-22 2018-08-29 京セラ株式会社 Wiring board, electronic device, and mounting structure of electronic device

Also Published As

Publication number Publication date
JPS63143A (en) 1988-01-05

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