JPH0666874B2 - Image signal processor - Google Patents

Image signal processor

Info

Publication number
JPH0666874B2
JPH0666874B2 JP61247761A JP24776186A JPH0666874B2 JP H0666874 B2 JPH0666874 B2 JP H0666874B2 JP 61247761 A JP61247761 A JP 61247761A JP 24776186 A JP24776186 A JP 24776186A JP H0666874 B2 JPH0666874 B2 JP H0666874B2
Authority
JP
Japan
Prior art keywords
error
pixel
distribution
binarization
interest
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61247761A
Other languages
Japanese (ja)
Other versions
JPS63102475A (en
Inventor
克雄 中里
博義 土屋
俊晴 黒沢
祐二 丸山
潔 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61247761A priority Critical patent/JPH0666874B2/en
Priority to US07/110,082 priority patent/US4890167A/en
Priority to DE8787309231T priority patent/DE3785290T2/en
Priority to EP87309231A priority patent/EP0264302B1/en
Publication of JPS63102475A publication Critical patent/JPS63102475A/en
Publication of JPH0666874B2 publication Critical patent/JPH0666874B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2059Display of intermediate tones using error diffusion

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、階調画像を含む画像情報を2値再生する機能
を備えた画像信号処理装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing device having a function of binary-reproducing image information including a gradation image.

従来の技術 近年事務処理の機械化や画像通信の急速な普及に伴っ
て、従来の白黒2値原稿の他に、階調画像や印刷画像の
高品質での画像再現に対する要望が高まって来ている。
特に、階調画像の2値画像による擬似階調再現は、表示
装置や記録装置との適合性が良く、多くの提案がなされ
ている。
2. Description of the Related Art In recent years, with the mechanization of office processing and the rapid spread of image communication, there has been an increasing demand for high-quality image reproduction of gradation images and printed images in addition to the conventional monochrome binary document. .
In particular, the pseudo gradation reproduction by the binary image of the gradation image has good compatibility with the display device and the recording device, and many proposals have been made.

これらの疑似階調再現の1つの手段として、ディザ法が
最もよく知られている。この方法は、予め定められた一
定面積において、その面積内に再現するドットの数によ
って階調を再現しようとするもので、ディザマトリクス
に用意した閾値と入力画情報を1画素毎に比較しながら
2値化処理を行っている。この方法は階調特性と分解能
特性がディジマトリクスの大きさに直接依存し、互いに
両立できない関係にある。また印刷画像などに用いた場
合、再現画像におけるモアレ模様の発生は避けがたい。
The dither method is best known as one means for reproducing these pseudo gradations. This method attempts to reproduce gradation in a predetermined fixed area by the number of dots reproduced in that area. While comparing the threshold value prepared in the dither matrix with the input image information for each pixel. Binarization processing is performed. In this method, the gradation characteristic and the resolution characteristic directly depend on the size of the digit matrix, and are incompatible with each other. Further, when it is used for a printed image or the like, it is unavoidable that a moire pattern is generated in a reproduced image.

上記階調特性と高分解能が両立し、かつモアレ模様の発
生抑制効果の大きい方法として、誤差拡散法(文献:ア
ール フロード&エル ステインバーグ “アン アダ
プテイブ アルゴリズム フオー スペシヤル グレー
スケール”エスアイデイー 75ダイジエスト(R.FLOY
D&L.STEINBERG,“An Adaptive Algorithm for spa
tial Grey Scale",SID 75 DIGEST),pp36−37)が
提案されている。
The error diffusion method (reference: Earl Frodde & El Steinberg “Unadaptive Algorithm for Special Gray Scale” S75 Day Digest (R .FLOY
D & L. STEINBERG, “An Adaptive Algorithm for spa
tial Gray Scale ", SID 75 DIGEST), pp36-37) is proposed.

第3図は上記誤差拡散法を実現するための装置の要部ブ
ロック図である。原画像における注目画素の座標を(x,
y)とするとき、1は誤差記憶手段、2は誤差配分係数
マトリクスの示す注目画素の周辺の未処理画素領域、3
は座標(x,y)における集積誤差Sxyの記憶位置、4は座
標(x,y)における入力レベルIxyの入力端子、5はI′
xy(Ixy+Sxy)の入力補正手段、6は出力レベル0また
はRの2値信号Pxyの出力端子、7は一定閾値R/2を
印加する信号端子、8は入力信号I′xy>R/2の時Px
y=Rを、その他の場合はPxy=0を出力する2値化手
段、9はExy(=I′xy−Pxy)の注目画素に対する2値
化誤差を求める差分演算手段である。
FIG. 3 is a block diagram of an essential part of an apparatus for realizing the above error diffusion method. The coordinates of the pixel of interest in the original image are (x,
y), 1 is the error storage means, 2 is the unprocessed pixel area around the pixel of interest indicated by the error distribution coefficient matrix, 3
Is a storage position of the integrated error Sxy at coordinates (x, y), 4 is an input terminal of the input level Ixy at coordinates (x, y), and 5 is I '.
xy (Ixy + Sxy) input correction means, 6 is an output terminal for a binary signal Pxy having an output level 0 or R, 7 is a signal terminal for applying a constant threshold value R / 2, and 8 is an input signal I′xy> R / 2. Hour Px
A binarization unit that outputs y = R and Pxy = 0 in other cases, and a difference calculation unit 9 that obtains a binarization error for the target pixel of Exy (= I'xy-Pxy).

さて、注目画素に対する集積誤差Sxyは式(1)、
(2)で表わされる。
Now, the integration error Sxy for the pixel of interest is expressed by the equation (1),
It is represented by (2).

Sxy=ΣKij・Ex−j+2,y−i+1 ……(1) (但し、i,jは誤差配分係数マトリクス内の座標を示
す。) この誤差配分係数Kijは誤差Exyの注目画素の周辺画素へ
の配分の重み付けをするもので前記文献では を例示している。
Sxy = ΣKij · Ex−j + 2 , y−i + 1 (1) (However, i and j indicate the coordinates in the error distribution coefficient matrix.) This error distribution coefficient Kij is the pixel of interest of the error Exy. In the above literature, the weighting of the distribution to the peripheral pixels is performed. Is illustrated.

第3図の構成では、上記の演算は注目画素に対する2値
化誤差Exyに、未処理の周辺画素領域2内の各画素A〜
Dに対応する配分係数を乗算し、誤差記憶手段1内の値
に加算し再び該当位置へ記憶させる誤差配分演算手段10
によって実現している。ただし、誤差記憶手段1の画素
位置Bの集積誤差は予め0にクリアされている。
In the configuration shown in FIG. 3, the above calculation results in the binarization error Exy for the pixel of interest and each pixel A to A in the unprocessed peripheral pixel region 2.
Error distribution calculation means 10 for multiplying the distribution coefficient corresponding to D, adding to the value in the error storage means 1 and storing again in the corresponding position
Is realized by. However, the integration error at the pixel position B of the error storage means 1 is cleared to 0 in advance.

発明が解決しようとしている問題点 さて上記の誤差拡散法は、ディザ法に比して階調特性や
分解能の点ですぐれた性能を持ち、印刷画像の再現時に
おいてもモアレ模様の出現は極めて少ない。しかし、濃
度変化の少ない画像や計算機で生成された均一な濃度の
画像などでは方式特有の模様(テクスチャ)を作るた
め、ほとんど普及していない。このテクスチャの発生の
主たる原因は、注目画素の周辺画素に対する2値化誤差
の配分の割合が注目画素と常に一定の相対的位置関係に
保持されているためである。
Problems to be Solved by the Invention The error diffusion method described above has excellent performance in terms of gradation characteristics and resolution compared to the dither method, and the appearance of moire patterns is extremely small even when reproducing a printed image. . However, in images with little change in density, images with uniform density generated by a computer, etc., a pattern (texture) peculiar to the method is formed, and therefore it is hardly used. The main cause of the occurrence of this texture is that the ratio of the binarization error distribution to the peripheral pixels of the target pixel is always held in a constant relative positional relationship with the target pixel.

本発明は上記の誤差拡散法におけるテクスチャの発生を
抑制し、階調特性・分解能にすぐれ、かつ印刷画像の再
生時にもモアレ模様の発生の極めて少ない画像信号処理
装置を提供するものである。
The present invention provides an image signal processing apparatus which suppresses the generation of texture in the above-mentioned error diffusion method, has excellent gradation characteristics and resolution, and has a very small amount of moire patterns even when a printed image is reproduced.

問題点を解決するための手段 本発明は、画素単位でサンプリングした多階調の濃度レ
ベルを2値化する際に、注目画素の2値化誤差をその周
辺の画素位置に対応させて記憶するための誤差記憶手段
と、前記注目画素の入力レベルと前記誤差手段内の注目
画素位置に対応した集積誤差を加算し補正レベルを出力
する入力補正手段と、前記補正レベルを予め定められた
閾値と比較し注目画素の2値化レベルを決定する2値化
手段と、前記補正レベルと2値化レベルの差分すなわち
2値化誤差を求める差分演算手段と、前記2値化誤差を
注目画素の周辺の未処理画素に配分する配分係数を、予
め定められた変更周期で、複数組の配分係数セットの中
から予め定められた順序に従い選択しながら発生させる
配分係数発生手段と、前記差分演算手段からの2値化誤
差と前記配分係数発生手段からの複数の配分係数から注
目画素周辺の未処理画素に対応する誤差配分値を算出
し、前記誤差配分値を前記誤差記憶手段内の対応する画
素位置の集積誤差とを加算し新たな集積誤差として再び
記憶させる誤差配分・更新手段とを設けることにより、
上記目的を達成しようとするものである。
Means for Solving the Problems According to the present invention, when binarizing multi-tone density levels sampled on a pixel-by-pixel basis, the binarization error of the pixel of interest is stored in association with the pixel positions in the surroundings. Error storage means, an input correction means for adding an input level of the pixel of interest and an integrated error corresponding to a pixel position of interest in the error means to output a correction level, and the correction level having a predetermined threshold value. Binarization means for comparing and determining the binarization level of the pixel of interest, difference calculation means for obtaining the difference between the correction level and the binarization level, that is, binarization error, and the binarization error around the pixel of interest. Distribution coefficient generating means for generating a distribution coefficient to be distributed to the unprocessed pixels while selecting the distribution coefficient in a predetermined order from a plurality of distribution coefficient sets in a predetermined change cycle, and the difference calculating means. From the binarization error and the plurality of distribution coefficients from the distribution coefficient generating means, an error distribution value corresponding to an unprocessed pixel around the pixel of interest is calculated, and the error distribution value is stored at the corresponding pixel position in the error storage means. By providing an error distribution / updating means for adding the integrated error of and the stored again as a new integrated error,
It is intended to achieve the above object.

また、前記配分係数発生手段は、注目画素周辺の予め定
められた複数の未処理画素に対する配分係数を、予め定
められた変更周期で、複数組の配分係数セット中から無
作意に選択していくように機能させても、上記目的を達
成することが出来る。
The distribution coefficient generating means randomly selects a distribution coefficient for a plurality of predetermined unprocessed pixels around the target pixel from a plurality of distribution coefficient sets at a predetermined change cycle. The above-mentioned purpose can be achieved even if it is made to function as desired.

作 用 本発明は上記の構成により、注目画素の周辺画素に対す
る2値化誤差の配分割合を、複数組の配分係数セットの
中から定められた順序あるいは無作意の順序で1組を選
択する配分係数発生手段の機能によって、2値化誤差の
配分量が注目画素と一定の相対的位置関係にある画素に
偏らないようにし、処理された出力画像にテクスチャ模
様が発生しないようにしたものである。
Operation The present invention has the above-described configuration, and selects one set of the distribution ratio of the binarization error for the peripheral pixel of the pixel of interest from a plurality of sets of distribution coefficient in a predetermined order or in a random order. With the function of the distribution coefficient generation means, the distribution amount of the binarization error is prevented from being biased to the pixel having a fixed relative positional relationship with the pixel of interest, and the texture pattern is not generated in the processed output image. is there.

実施例 第1図は本発明の一実施例における画像信号処理装置の
ブロック結線図である。
Embodiment 1 FIG. 1 is a block connection diagram of an image signal processing apparatus according to an embodiment of the present invention.

第1図において、1〜9の各ブロックの構成と作用は第
3図の従来のものと同様である。第1図において、第3
図の構成と異なる点は第3図で示した誤差配分演算手段
10のかわりに誤差配分・更新手段11と配分係数手段12と
を設けた点で、以下この点について詳細にのべる。
In FIG. 1, the configuration and operation of each block 1 to 9 are the same as those of the conventional one shown in FIG. In FIG. 1, the third
The difference from the configuration of the figure is the error distribution calculating means shown in FIG.
This point will be described in detail below in that error distribution / update means 11 and distribution coefficient means 12 are provided instead of 10.

まず配分係数発生手段12は、注目画素周辺の未処理画素
に対する複素組の配分係数セットを予め用意し、周期信
号入力端子13よりx方向ないしはy方向の画素処理周期
に同期した同期信号14を得て、周辺画素領域2内の画素
位置A〜Dに対する2値化誤差Exyの配分係数KA〜KD
前記複数組の配分係数セットより選択し誤差配分・更新
手段11へ出力する。そして誤差配分・更新手段11は同期
信号14に同期しながら、前記配分係数KA〜KDと共に、差
分演算手段9からの注目画素の2値化誤差Exyおよび誤
差記憶手段1の周辺画素領域2内の画素位置A、C、D
に対応する記憶装置に記憶されているそれ以前の画素処
理過程における集積誤差S′、S′、S′を読み
出し、新たな集積誤差SA〜SDを下記第(3)式により求
める。
First, the distribution coefficient generation means 12 prepares a complex distribution coefficient set for unprocessed pixels around the target pixel in advance, and obtains a synchronization signal 14 synchronized with the pixel processing cycle in the x direction or the y direction from the cyclic signal input terminal 13. Then, the distribution coefficients K A to K D of the binarization error Exy for the pixel positions A to D in the peripheral pixel area 2 are selected from the plurality of distribution coefficient sets and output to the error distribution / update means 11. Then, the error distribution / update means 11 synchronizes with the synchronization signal 14, and along with the distribution coefficients K A to K D , the binarization error Exy of the pixel of interest from the difference calculation means 9 and the peripheral pixel area 2 of the error storage means 1. Pixel positions A, C, D
Integrated error S 'A, S' in the previous pixel process stored in the corresponding storage device and C, reads the S 'D, by the following new integrated error S A ~S D (3) formula Ask.

誤差配分・更新手段11はさらにこれらの新たな集積誤差
SA〜SDを誤差記憶手段1内の画素位置A〜Dに対応する
記憶装置に書き込む更新処理を行なう。
The error distribution / updating means 11 further uses these new accumulated errors.
An update process is performed in which S A to S D are written in the storage device corresponding to the pixel positions A to D in the error storage means 1.

これら誤差配分・更新手段11と配分係数発生手段12の具
体例を第2図に示す。同図においては配分係数発生手段
12は2組の配分係数セットK1A〜K1DとK2A〜K2Dを予め格
納するために記憶装置15と記憶装置16を設け前記係数セ
ットを画素処理に先だって収納する。また選択信号発生
器17は同期信号入力端子13から与えられるX方向ないし
はY方向の画素処理周期に対応した同期信号14の入力に
より、予め定められた画素処理間隔でセレクタ18〜21に
対するセレクト信号22を出力する。セレクタ18〜21は記
憶装置15と記憶装置16に格納されている2組の配分係数
セットから(K1A、K1B、K1C、K1D)のセットと(K2A、K
2B、K2C、K2D)のセットを前記セレクト信号22に基づい
て選択し誤差記憶手段1の画素位置A〜Dに対応する配
分係数KA〜KDとして出力する。なお本配分係数発生手段
12内の選択信号発生器17は、同期信号14を入力とするマ
キシマムレングスカウタ回路(M系列発生器)等を用い
てセレクト信号22を発生し、2組の配分係数セットを無
作意に選択してもよい。そして誤差配分・更新手段11は
同期信号14に同期しながら、配分係数発生手段12から入
力された配分係数KA〜KDと差分演算手段9から入力され
た2値化誤差Exyを乗算し誤差配分値26〜29を得る。誤
差配分値36と誤差記憶手段1より読み込んだ画素位置A
に対応する集積誤差S′と加算し次の画素処理におけ
る集積誤差Sxyとして使用するため内部レジスタ23
(RA)に一時記憶する。画素位置Bに対する集積誤差は
注目画素3の処理において初めて生ずるため、誤差配分
値27を画素位置Bに対応する集積誤差として内部レジス
タ24(RB)に一時記憶する。誤差配分値28と前画素処理
において一時記憶している内部レジスタ24(RB)のデー
タとを加算し画素位置Cの集積誤差として、内部レジス
タ25(RC)に一時記憶する。誤差配分値29と前画素の処
理において一時記憶している内部レジスタ25(Rc)のデ
ータと加算し誤差記憶手段1の画素位置Dに対応する記
憶装置に記憶させる。このような誤差配分・更新手段11
により、誤差記憶手段1内の記憶装置へのアクセスは、
画素位置Aに対応して読み込みアクセス、画素位置Dに
対応して書き込みアクセスとなり容易に実施可能な構成
となる。
Specific examples of the error distribution / update means 11 and the distribution coefficient generation means 12 are shown in FIG. In the figure, distribution coefficient generating means
A storage device 15 and a storage device 16 are provided for storing two sets of distribution coefficient sets K1 A to K1 D and K2 A to K2 D in advance, and store the coefficient sets prior to pixel processing. Further, the selection signal generator 17 receives the synchronization signal 14 corresponding to the pixel processing cycle in the X direction or the Y direction given from the synchronization signal input terminal 13 to select signals 22 for the selectors 18 to 21 at predetermined pixel processing intervals. Is output. The selectors 18 to 21 select a set of (K1 A , K1 B , K1 C , K1 D ) and a set of (K2 A , K2) from the two sets of distribution coefficient stored in the storage device 15 and the storage device 16.
2 B, K2 C, K2 D sets of) outputs as a distribution coefficient K A ~K D corresponding to the selected pixel position A~D the error storage means 1 on the basis of the select signal 22. This distribution coefficient generation means
The selection signal generator 17 in 12 generates a select signal 22 using a maximum length scouter circuit (M sequence generator) which receives the synchronization signal 14 as an input, and randomly selects two allocation coefficient sets. You may. The error distribution / update means 11 multiplies the distribution coefficients K A to K D input from the distribution coefficient generation means 12 and the binarization error Exy input from the difference calculation means 9 while synchronizing with the synchronization signal 14 Get distribution values 26-29. The error distribution value 36 and the pixel position A read from the error storage means 1.
Internal register 23 for adding the corresponding integrated error S 'A for use as an integrated error Sxy for the next pixel processing
Temporarily store in (R A ). Since the integration error for the pixel position B occurs for the first time in the processing of the pixel of interest 3, the error distribution value 27 is temporarily stored in the internal register 24 (R B ) as the integration error corresponding to the pixel position B. The error distribution value 28 and the data of the internal register 24 (R B ) temporarily stored in the previous pixel processing are added and the result is temporarily stored in the internal register 25 (R C ) as an integrated error of the pixel position C. The error distribution value 29 and the data of the internal register 25 (Rc) temporarily stored in the processing of the previous pixel are added and stored in the storage device corresponding to the pixel position D of the error storage means 1. Such error distribution / update means 11
Thus, access to the storage device in the error storage means 1 is
A read access is made corresponding to the pixel position A, and a write access is made corresponding to the pixel position D, which is a structure that can be easily implemented.

発明の効果 以上のように本発明では、注目画素の周辺画素に対する
2値化誤差の配分比率を一定とせず、画素処理と共に複
数の配分係数セットの中から選択して用いる事により、
従来の誤差拡散法に見られた偽画像(テクスチャ)を抑
制することが可能となった。
EFFECTS OF THE INVENTION As described above, in the present invention, the distribution ratio of the binarization error to the peripheral pixels of the pixel of interest is not made constant, but is used by selecting from a plurality of distribution coefficient sets together with the pixel processing.
It has become possible to suppress the false image (texture) seen in the conventional error diffusion method.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例における画像信号処理装置の
ブロック結線図、第2図は同装置の要部ブロック結線
図、第3図は従来の誤差拡散法を実現する画像信号処理
装置のブロック結線図である。 1……誤差記憶手段、11……誤差配分・更新手段、15〜
16……記憶装置、17……選択信号発生器、18〜21……セ
レクタ、23〜25……内部レジスタ。
FIG. 1 is a block connection diagram of an image signal processing apparatus according to an embodiment of the present invention, FIG. 2 is a block connection diagram of main parts of the apparatus, and FIG. 3 is an image signal processing apparatus for realizing a conventional error diffusion method. It is a block connection diagram. 1 ... Error storage means, 11 ... Error distribution / update means, 15-
16 ... Storage device, 17 ... Selection signal generator, 18-21 ... Selector, 23-25 ... Internal register.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 丸山 祐二 神奈川県川崎市多摩区東三田3丁目10番1 号 松下技研株式会社内 (72)発明者 高橋 潔 神奈川県川崎市多摩区東三田3丁目10番1 号 松下技研株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yuji Maruyama 3-10-1 Higashisanda, Tama-ku, Kawasaki City, Kanagawa Matsushita Giken Co., Ltd. (72) Inventor Kiyoshi Takahashi 3-chome, Higashimita, Tama-ku, Kawasaki No. 10 No. 1 Matsushita Giken Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】画素単位でサンプリングした多階調の濃度
レベルを2値化する際に、注目画素の2値化誤差をその
周辺の画素位置に対応させて記憶するための誤差記憶手
段と、前記注目画素の入力レベルと前記誤差記憶手段内
の注目画素位置に対応した集積誤差を加算し補正レベル
を出力する入力補正手段と、前記補正レベルを予め定め
られた閾値と比較し注目画素の2値化レベルを決定する
2値化手段と、前記補正レベルと2値化レベルの差分に
より2値化誤差を求める差分演算手段と、前記2値化誤
差を注目画素の周辺の未処理画素に配分する係数を予め
定められた変更周期で、複数組の配分係数セットの中か
ら選択しながら発生させる配分係数発生手段と、前記差
分演算手段からの2値化誤差と前記配分係数発生手段か
らの複数の配分係数から注目画素周辺の未処理画素に対
応する誤差配分値を算出し、前記誤差配分値を前記誤差
記憶手段内の対応する画素位置の集積誤差とを加算し再
び記憶させる誤差配分・更新手段とを具備する画像信号
処理装置。
1. An error storage unit for storing a binarization error of a pixel of interest in association with pixel positions in the surroundings when binarizing multi-tone density levels sampled in pixel units. The input correction means for adding the input level of the pixel of interest and the integrated error corresponding to the position of the pixel of interest in the error storage means and outputting the correction level, and the correction level is compared with a predetermined threshold value to obtain 2 pixels of the pixel of interest. Binarization means for determining a binarization level, difference calculation means for obtaining a binarization error by the difference between the correction level and the binarization level, and the binarization error is distributed to unprocessed pixels around the pixel of interest. Distribution coefficient generating means for generating a coefficient to be selected while selecting it from a plurality of distribution coefficient sets at a predetermined change cycle, a binarization error from the difference calculating means, and a plurality of distribution coefficient generating means from the distribution coefficient generating means. Distributor Error distribution / update means for calculating an error distribution value corresponding to an unprocessed pixel around the pixel of interest, adding the error distribution value to an integrated error at a corresponding pixel position in the error storage means, and storing again. An image signal processing device provided.
【請求項2】配分係数発生手段は、注目画素周辺の予め
定められた複数の未処理画素に対する配分係数を、予め
定められた変更周期で、複数組の配分係数セットの中か
ら無作為に選択していくことを特徴とする特許請求の範
囲第1項記載の画像信号処理装置。
2. A distribution coefficient generating means randomly selects a distribution coefficient for a plurality of predetermined unprocessed pixels around a target pixel from a plurality of distribution coefficient sets at a predetermined change cycle. The image signal processing device according to claim 1, wherein
JP61247761A 1986-10-17 1986-10-17 Image signal processor Expired - Fee Related JPH0666874B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP61247761A JPH0666874B2 (en) 1986-10-17 1986-10-17 Image signal processor
US07/110,082 US4890167A (en) 1986-10-17 1987-10-16 Apparatus for processing image signal
DE8787309231T DE3785290T2 (en) 1986-10-17 1987-10-19 IMAGE SIGNAL PROCESSING DEVICE.
EP87309231A EP0264302B1 (en) 1986-10-17 1987-10-19 Apparatus for processing image signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61247761A JPH0666874B2 (en) 1986-10-17 1986-10-17 Image signal processor

Publications (2)

Publication Number Publication Date
JPS63102475A JPS63102475A (en) 1988-05-07
JPH0666874B2 true JPH0666874B2 (en) 1994-08-24

Family

ID=17168269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61247761A Expired - Fee Related JPH0666874B2 (en) 1986-10-17 1986-10-17 Image signal processor

Country Status (1)

Country Link
JP (1) JPH0666874B2 (en)

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
A SURVEY OF HALFTONING ALGORITHMS AND INVESTIGATION OF THE ERROR DIFFUSION TECHNIQUE=1984 *

Also Published As

Publication number Publication date
JPS63102475A (en) 1988-05-07

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