JPH0666244B2 - Semiconductor manufacturing method - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a semiconductor manufacturing apparatus equipped with a resist coating apparatus, a semiconductor exposure apparatus, and a developing apparatus used for manufacturing integrated circuits, and more particularly to semiconductor exposure. The present invention relates to a semiconductor manufacturing method in which the overlay accuracy of a baking pattern by an apparatus is automatically measured.

[Prior Art] Conventionally, in a pattern exposure process of a semiconductor manufacturing process, in particular, an etched wafer and a pattern of a reticle are aligned and then superimposed and exposed. At that time, to measure the overlay accuracy and offset error,
A pattern (vernier) for measuring the positional deviation is drawn on the wafer, and an inspection operator uses a microscope or the like to visually inspect the vernier.

Further, for inspection, it is usual to use one or two wafers, which are called preceding wafers, from the wafers of several tens to several hundreds of lots. In the inspection using the preceding wafer, the operator performs all of resist coating, exposure, development, and visual inspection. After confirming the inspection result, the result is input to the exposure apparatus and the remaining wafers are sent to the manufacturing process line.

[Problems to be Solved by the Invention] However, in the visual inspection, since the inspection time is long, the production line is stopped for a long time, and the production efficiency is reduced. Moreover, when the inspection amount increases, a measurement error occurs due to the fatigue of the worker. Furthermore, if the inspection operator changes, there is a large difference in the results of the visual inspection. By the way, in today's LSI manufacturing technology, for example, the inspection result is 0.05 μm.
Even if the difference occurs in and the erroneous value is input to the exposure apparatus as a process offset, the yield deteriorates. That is, the current inspection method causes deterioration of inspection efficiency and inspection accuracy in terms of managing alignment accuracy and process offset for each wafer process in semiconductor manufacturing. Therefore, a high-speed inspection device with stable measurement accuracy is required.

In order to eliminate the drawbacks of visual inspection, a dedicated inspection device that can automatically measure the amount of deviation may be introduced. These apparatuses are currently placed off-line and separately from the semiconductor exposure apparatus, and the wafer exposed by the semiconductor exposure apparatus is subjected to automatic inspection equipment after development. Further, in order to manage the value of the process offset at a value of 0.05 μm or less, the adjustment state of each exposure apparatus also poses a problem. An example of this is correction of the baseline in off-axis alignment. In order to correct the temporal fluctuation of the baseline, it is necessary to measure the offset promptly. Further, in order to achieve a high precision of 0.05 μm or less, the measured value itself in the exposure device when the preceding wafer is printed is also a problem.

In many cases, the exposure apparatus itself is not used and is in a waiting state while actually measuring the input value of the offset and feeding back the exposure apparatus. However, the exposure apparatus is equipped with a highly accurate measurement mechanism for alignment. Such waste is extremely bad in terms of system efficiency.

In consideration of the above points, the present invention utilizes the detection mechanism of the exposure apparatus itself to detect the offset value at high speed and with high accuracy.

[Means for Solving the Problems] In order to achieve the above object, a semiconductor manufacturing method of the present invention includes a step of applying a resist to a test wafer by a resist coating apparatus, and an exposure apparatus for exposing the test wafer coated with the resist. On the inspection wafer by aligning the inspection wafer in the exposure apparatus and exposing the resist on the inspection wafer through a reticle set in the exposure apparatus. Transferring the reticle side mark formed on the reticle to the resist, and exposing the resist on the inspection wafer by the exposure device, and then automatically transporting the inspection wafer to a resist developing device, Developing the exposed resist on the inspection wafer with the resist developing device; and developing the resist. A step of automatically carrying the inspection wafer whose resist has been developed by the apparatus again to the exposure device without applying the resist again by the resist coating device; and the reticle formed in the developed resist on the inspection wafer. A step of capturing an image of the side mark by an image pickup device for alignment mark inspection of the exposure device; and an alignment offset of the exposure device based on an image signal of the reticle side mark in the developed resist imaged by the image pickup device. And a wafer alignment operation of the exposure apparatus using the alignment offset calculated by the controller when exposing the next wafer coated with the resist by the resist coating apparatus by the exposure apparatus. It is characterized by having a step of controlling.

Further, the control device calculates the alignment accuracy of the exposure device on the basis of the image signal, and the imaging means simultaneously determines the wafer side mark previously formed on the inspection wafer and the reticle side mark in the developed resist. You may image. Further, a plurality of the reticle-side marks are transferred to the resist on the inspection wafer by the exposure device,
The imaging means images a plurality of the reticle-side marks formed in the developed resist on the inspection wafer,
The control device may calculate the alignment offset using a plurality of the image signals.

[Operation] In the present invention, by configuring the exposure apparatus and the peripheral apparatus as one system in this manner, the speed of measurement of the process offset and the accuracy thereof are improved. That is, according to the present invention, a coater (resist coating device), a developing device (developer), and a stepper (reduction projection exposure device) having an exposure and inspection mechanism are online controlled, and thereby a preceding wafer that is an inspection wafer is controlled. After the coater sends it to the stepper for exposure, the developer develops it, and then it sends it to the stepper again to perform a consistent inspection work automatically to measure the alignment accuracy. The measured value is compared with the state of the stepper at the time of exposure, and is automatically set in the control means as an offset at any time. Further, since the shift amount measuring method by image processing is used, the measurement is performed with the minimum measurement error.

Embodiments Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a perspective view showing the configuration of a semiconductor manufacturing line (apparatus) according to an embodiment of the present invention, and FIGS. 2 and 3 are flow charts showing the flow of an automatic inspection process in this apparatus,
4 and 5 are perspective views showing the relationship between the reticle used and the wafer, FIG. 6 is an explanatory view showing the method of forming marks and the mark detection method used for inspection, and FIG. 7 is an auto-alignment image. It is a schematic diagram which shows.

As shown in FIG. 1, this semiconductor manufacturing apparatus includes a coater CO, a stepper ST and a developer DE connected in series in order to automate inspection of alignment accuracy and offset error during exposure of the wafer WF. The coater CO has a mechanism for applying a resist to the wafer to be inspected. Stepper ST
Has a mechanism for superposing and exposing the pattern of the reticle RT on the inspection wafer, and a mechanism for measuring the deviation amount measuring mark WP formed on the wafer. Developer DE
It has a mechanism for developing the inspection wafer exposed by the stepper ST.

The inspection is automatically performed according to a command from the control device while moving the inspection wafer placed at the entrance of the coater CO between the respective mechanisms. The alignment accuracy and process offset calculated from the measured displacement amount are the control unit CU of the stepper ST.
And is used as an alignment correction value for the product wafer. The inspection wafer is a wafer that has undergone the same process as the product wafer.

Next, a detailed automatic inspection process will be described with reference to FIGS. 1 and 2 while referring to FIGS. 2 and 3. However, the following first
The control from step to the fourth step is performed by the stepper control unit CU, and each device and the stepper control unit CU are connected by a communication cable.

In the first step (S001 to S003), the wafer to be inspected is placed on the wafer set table WST (S00
1) This wafer passes through the transfer path R1, the resist is applied by the resist coating device (coater) CO (S002), is sent to the stepper ST through the transfer path R2, and is transferred to the wafer chuck on the XY stage XYS by the auto hand HAS. It is placed on WS and vacuum-adsorbed (S003).

The second step (S004 to S006) is a step of exposing the resist drawn on the wafer with the pattern drawn on the reticle RT.

Here, the pattern area exposed at one time is called a shot. The reticle placed above the reduction projection lens LN is aligned by the set marks RSML and RSMR attached to the upper surface of the reduction projection lens LN and the reticle alignment marks RAMR and RAML engraved on the reticle. . The XY stage XYS is a laser interferometer IFX, MR in the X-axis direction.
The X and Y axis directions are precisely measured by laser interferometers IFY and MRY, and an arbitrary position of the wafer can be moved below the reduction projection lens LN while controlling the rotation of the motors MX and MY.

The wafer mounted on the wafer chuck of the wafer stage WS is moved to the mark WA on the wafer by the off-axis optical system OE.
The positions of ML and WAMR are measured and based on this, the XY stage XYS
The position of the wafer is aligned by moving the wafer as described above (S004).

Next, the XY stage XYS is moved so that the first shot is below the reduction projection lens LN, and alignment is performed as follows. That is, first, the He-Cd laser light source LS for alignment is irradiated with light having a wavelength substantially equal to the exposure light,
After diffusing it with the diffuser plate DP to eliminate unevenness in illuminance, scan it with the polygon mirror PM to enlarge the illumination area, and then use the prism DA.
Use P to separate the right and left optics. The alignment light that has entered the left optical system is illuminated by the objective mirror AML onto the reduction projection lens LN and illuminates the alignment WML on the wafer. In this way, the light including the image information of the alignment mark WML is reflected by the wafer WF, then passes through the projection lens LN, passes through the reflection mirror AML together with the image of the alignment mark RML of the reticle RT, and further passes through the prism DAP. It is magnified by the erector lens EL and forms an image on the CCD camera CM. The same applies to the light incident on the right alignment optical system. FIG. 7 shows the alignment marks of the wafer and the reticle imaged on the CCD camera CM in this way.

Next, this image is processed by the stepper control unit CU to calculate the amount of deviation between the wafer and the reticle, and based on the result, the reticle stage RS on which the reticle is mounted is finely driven to determine the position between the wafer and the reticle. Make a match. Simultaneously with the completion of the alignment, the exposure shutter SHT for printing the IC pattern on the reticle is opened. As a result, the light of the exposure light source IL applied to the reticle pattern RT is reduced to ⅕ through the reduction projection lens LN, and the resist coated on the wafer WF is exposed. At this time, the reticle side displacement amount measuring mark (RP in FIG. 4) used in the fourth step described later is superimposed and exposed on the wafer side mark (WP in FIG. 4). When exposure is completed, XY stage XY
S is moved to the next exposure position. The repetition of stage movement, alignment, exposure, and stage movement described here is called step and repeat (S005). When all the exposure of the wafer is completed, the wafer is sent from the wafer chuck to the carry-in passage R3 of the developing device by the collecting hand HAR, and the process proceeds to the third step (S006).

In the third step (S007), the wafer sent to the carry-in passage R3 is sent to the developing device DE for development (S007). When the development is completed, the wafer is sent to the carry-in passage R5 through the carry-in passage R4,
The process moves to the fourth step, which is an inspection process.

In the fourth step (S008 to S012), the wafer is sent directly to the carry-in passage R2 through the carry-in passage R1 used in the first step without coating the resist with the coater CO, and is again picked up by the supply hand HAS. Then, the wafer is aligned by the off-axis optical system OE (S008), and the wafer is aligned (S009). Then, the alignment of the wafer and the reticle as in the second step is not performed, and the alignment accuracy of the second step is inspected by using the deviation amount inspection mark WP on the wafer (S010).

That is, first, the objective mirrors AMR and AML are moved to the positions of the deviation amount measuring windows WIL and WIR (FIG. 5) on the reticle. There are no alignment patterns on the windows. The mark WPA (FIG. 5) observed through the window has a shape as shown in FIG. 6 (E). However, in FIG. 6 (E), only the measurement mark in the X direction is shown, and the mark in the Y direction also has the same shape. The arrangement and shape of the marks are the same as those for alignment, and therefore the measurement processing algorithm,
Furthermore, no change in the optical system is required. The mark measuring method will be described later.

That is, as shown in FIG. 3, while the step and repeat of the XY stage is sequentially performed from the first shot to the final shot of the wafer (SB001), the image of the displacement measurement mark is first captured by the CCD camera CM, and the image is automatically processed by the image processing. The distance between the stage and the projection lens is set to the optimum distance (SB002), the deviation amount measurement mark is measured by image processing (SB003), and the measured value is stored in the control unit CU. To do.

The wafer for which measurement has been completed is sent from the wafer chuck to the carry-in passage R3 of the developing device by the collecting hand HAR, is sent to R4 without developing work in the developing device DE, and is taken out from the wafer receiving table WEN (S011).

Next, the stepper control unit CU calculates, from the deviation amount measurement values accumulated therein, a triple value 3σ of the variance σ and an offset that is the average value of the deviation measurement values, which is the auto alignment accuracy. Output. Here, when the 3σ value is largely outside the allowable range, the terminal for operation is
A warning is output to CS to notify the inspection worker. If the 3σ value is within the allowable range, it means that the process offset of the inspected wafer is normally detected. This process offset is automatically set in the stepper control unit CU as a value for driving and correcting the reticle stage RS during alignment (S012).

The automatic inspection process has been described above. Next, a method of forming the deviation amount measurement mark will be described with reference to FIG.

For the wafer to be inspected, the measurement mark WP on the wafer side is provided on the wafer substrate in the previous step in semiconductor manufacturing, as shown in FIG. 6 (A).
To form. This mark forming method is the same as the alignment mark forming method. In this embodiment, the first
The state in which the resist RE is applied in the step is as shown in FIG. 6 (B). In the second step, while the reticle and the wafer are aligned, the pattern drawn on the reticle is exposed on the resist layer. By being developed in the third step, the cross-sectional shape of the wafer becomes as shown in FIG. 6 (C) or FIG. 6 (D), and the reticle side pattern is formed as RP1, RP2 or RP3, RP4. .

The image captured by the CCD camera in the fourth step of measuring the displacement amount is as shown in FIG. 6 (E), and when processed in the stepper control unit CU, as shown in FIG. 6 (F),
The signal is compressed in the long axis direction of the mark.

Next, the detection of the mark position formed in this way and the calculation of the shift amount will be described. FIG. 6 (F) shows a signal compressed in the long axis direction of the mark. To detect a mark, first, the centers of the three marks are independently obtained one by one. Then, from the two reticle side mark centers R1 and R2 to the reticle mark center The deviation amount is obtained from this and the wafer side mark center WC as E = RC-WC.

There are two possible wafer cross-sectional shapes for the detection mark, as shown in FIG. 6 (C) or FIG. 6 (D). In the case where the resist is applied on the mark (FIG. 6 (D)), an error is likely to occur in the determination of WC due to the influence of resist interference or the non-contrast of the resist applied state. Further, as the NA of the reduction projection lens increases, the depth of focus becomes shallower, and there is a problem that a focus margin cannot be obtained. For the above reasons, it is desirable to use the type shown in FIG. 6 (C) that can obtain the same level difference.

The above-mentioned determination of the process offset and the alignment accuracy is performed by the following equation.

N is the total number of shots, E is the measured shift amount, M is the offset, and σ is the dispersion of alignment accuracy. The alignment evaluation of the inspected wafer is determined by 3 * σ.

The value of M is automatically input to the stepper as an alignment offset. In the above description, the case where the reticle and the wafer are aligned in the second step has been described, but this is not always necessary for the purpose of offsetting. It is also possible to store the measured amount of deviation, perform exposure without performing alignment, and compare it with the automatic measurement value after development later. In addition, when the alignment is performed, an error may exist in the driving amount. Also in this case, when the deviation amount is stored and later compared with the automatic measurement value after development, the offset correction error becomes small.

Next, an example of using the present invention for calibration of measurement error in global alignment measurement will be described.

The global alignment is a method of measuring the array position of all shots by measuring the mark positions of defined shots on the wafer, sending the XY stage XYS to the position with the least deviation, and exposing. In this alignment method, mainly the rotation component and the magnification component of the shot arrangement state in the wafer are measured, and the step movement amount of the XY stage is corrected using these values. The advantage of this alignment method is that it is possible to eliminate the measured values that are clearly outliers in the measurement shots, and the averaging effect of multiple measured values improves the reliability of the measured values of the rotation and magnification components. There is a high point. If the rotation, the magnification component, etc. are precisely measured by this alignment method and the step movement amount of the stage is correctly corrected, the alignment error at the time of exposure becomes almost zero. vice versa,
If an error occurs in the measurement of the stage movement amount, the alignment accuracy is degraded. However, in this case, inferior precision appears as rotation or a magnification component.

In the automatic measurement, it is possible to obtain the alignment error of the rotation component and the magnification component by measuring the deviation amount of the globally aligned inspection wafer. Using the alignment error obtained here, that is, the alignment correction error, it is possible to calibrate the stage movement correction amount at the time of global alignment described above.

An automatic measurement process for calibrating a measurement error of global alignment will be described according to the flow shown in FIG.

First, in the first step, a resist is applied to the wafer in the same manner as described above and sent to the stepper (S101 to S104). Second
In the step, the alignment mark is measured for the measurement shot set for global alignment in the same manner as described above, and the measurement value is used to calculate the stage step movement correction amount. The correction amounts are Rotx (X axis rotation), Roty (Y axis rotation), Magx (X axis magnification), Magy (Y
Axial magnification) is required. Then, these correction amounts are accumulated in the control unit CU (S105). Furthermore, while step-moving the XY stage by the amount calculated according to the correction amount,
Exposure is performed (S106). When all shots have been exposed,
The wafer is transferred to the developing device DE (S107) and the third step of development is performed (S108). Next, in the fourth step, the wafer is sent to the stepper again (S109), pre-alignment for obtaining the position of the wafer is performed (S110), and then the alignment deviation amount is automatically measured (S111). As a result of the measurement, the process offset and the rotation and magnification components obtained as alignment errors are input to the control unit CU as global alignment calibration values (S113, S114). The calibration values input to the control unit CU are M (process offset) and Rotxc (X
Calibration value for axis rotation), Rotyc (calibration value for Y-axis rotation), Magxc
(Calibration value of X-axis magnification) and Magyc (calibration value of Y-axis magnification).

In the alignment exposure of the product wafer, the step movement amount of the stage is corrected by a value obtained by subtracting the calibration value input to the control unit CU from the stage movement correction amount obtained by the position measurement of the deviation measurement shot of the product wafer. While doing. By using this method, extremely high alignment accuracy can be obtained.

Next, autofocus (AF) by image processing will be described.

The mark used for AF is a displacement measurement mark, not a special mark devised for AF. Therefore, in order to obtain the most appropriate stage height, that is, the best focus, an evaluation function that quantifies the degree of image blurring by image processing using, for example, contrast is used. For the position of the best focus, the image is captured while the XY stage is displaced in the height direction, and the evaluation value of the evaluation function at that time is plotted in the control unit CU. I am trying. By adding the AF mechanism, the measurement accuracy of the deviation amount measurement mark is improved and the stability of the process offset measurement is increased.

By using the inspection process of this embodiment described above,
The self-inspection of the reduction projection exposure apparatus is also possible. Conventionally, the inspection of the XY stage, which was performed by inspectors for vernier evaluation,
Evaluation of reduction projection lens and inspection of reticle rotation are
All of resist coating, exposure, development and inspection can be replaced by the automatic inspection process shown in the present invention.

Next, a method of calibrating the deviation amount measurement mark measurement value itself will be described with reference to FIG.

The calibration of the measurement value itself of the deviation amount measurement mark in the automatic measurement can be performed by measuring the mark which is designed in advance so that the deviation amount becomes 0, that is, the calibration mark WPS. The calibration mark is preferably exposed at a position adjacent to the deviation amount measurement mark WPA when the deviation amount measurement mark is exposed on the inspection wafer.
This is because the conditions such as resist coating state, shot elongation, and shrinkage are most similar. The measurement of the calibration mark is performed by sending the XY stage XYS so that the mark WPS enters the mark measuring windows WIL and WIR of the reticle in the above-mentioned fourth step. The measuring method is the same as the method for measuring the deviation amount measuring mark described above. The measurement result is processed by the control unit CU, and the average value MC is calculated by the following equation.

Here, DC is a measurement value, and N is the number of measurement shots. This value becomes the calibration value. Therefore, the process offset M in the deviation amount measurement is calibrated by the following equation.

Mof = M-MC [Other Embodiments] A semiconductor manufacturing apparatus capable of automatically measuring an image of a displacement amount measurement mark using an alignment mechanism of the TTL method that does not pass through a reticle will be described with reference to FIG. Since the first step to the third step can be executed by the same idea as the above-mentioned embodiment, the description thereof will be omitted. However, for the measurement of the alignment mark in the second step, the TTL described below shown in FIG. 10 is used.
You may use the measurement mechanism of. In this case, exposure is performed by global alignment.

The alignment scope SC that measures the displacement amount measurement mark in the fourth step is always in a fixed position. The mirror MY that irradiates the reduction projection lens LN with the illumination light of the alignment mark is set at a position that does not block the exposure light when the circuit pattern drawn on the reticle RT is exposed on the wafer WF.

The method of capturing the image of the displacement measurement mark using the alignment scope SC is described. Since the alignment mechanism is fixed, the displacement amount measurement mark is observed only by controlling the position of the XY stage XYS on which the inspection wafer is mounted.
For example, in order to observe the displacement amount measurement marks WML and WMR in the same shot shown in FIG. 10, the stage XYS is moved by the mark interval and the movement of the motor is controlled so as to be under the scope. The mark irradiating laser light emitted from the laser light source LS passes through the optical elements BS, HMY, MY, and is irradiated onto the projection lens LN to illuminate the deviation amount measurement mark WMR formed on the wafer WF. The image of the illuminated mark passes through the projection lens LN and the mirror MY, and the alignment optical system SC
Enters and forms an image on the CCD camera CMY. The image of the displacement measurement mark captured by the CCD camera CMY is processed by the control device, and the measurement value is accumulated. The movement of the stage, the capturing of the image, and the processing of the captured image are performed for all the measurement marks by step-and-repeat, and when the last mark is measured, the wafer is taken out of the stage by the collecting hand. After that, the wafer is processed in the same manner as the above-mentioned embodiment. Further, the processing of the deviation amount accumulated in the control device is similarly performed, and the process offset, the magnification in the global alignment, and the calibration value of the rotation component are automatically input to the stepper control device.

Next, a semiconductor manufacturing apparatus that does not pass through the reduction projection lens and is capable of automatic measurement using an off-axis type alignment mechanism will be described with reference to FIG. This method is also the first
Since the steps from the third step to the third step can be executed by the same idea as the above-mentioned embodiment, the description thereof will be omitted. However, a measurement mechanism using an off-axis scope may be used for measuring the alignment mark in the second step. In this case, exposure is performed by global alignment.

The off-axis alignment scope OE for measuring the deviation amount measurement mark in the fourth step is always in a fixed position. A method of capturing an image of the displacement amount measurement mark using this alignment scope OE will be described. Since the alignment mechanism (scope OE) is fixed, the measurement marks are observed only by controlling the position of the XY stage XYS on which the inspection wafer is placed. The scope OE is composed of a light source for mark observation, a microscope and a CCD camera. An image of the mark on the inspection wafer illuminated by the light emitted from the light source is magnified by a microscope and is formed on a CCD camera. This image data is captured by a CCD camera and processed by the control unit CU to obtain the amount of deviation. All measured values are stored in the control unit CU. The movement of the stage, the capturing of the image, and the processing of the captured image are performed on the measurement marks of all the shots by step-and-repeat, and when the last mark is measured, the wafer is taken out of the stage by the collecting hand HAR. After that, the wafer is processed in the same manner as the above-mentioned embodiment. Further, the processing of the deviation amount accumulated in the control unit CU is similarly performed, and the step offset, the magnification in the global alignment, and the calibration value of the rotation component are automatically input to the stepper.

In the description so far, the alignment between the reticle and the wafer is performed in the second step. In particular, the TT shown in Fig. 10
In the alignment method using the L-type scope or the off-axis scope, the stage movement amount is corrected by global alignment. However, as described above, the offset or
These are not essential for the purpose of obtaining the calibration values of the magnification and the rotation component. It is also possible to store the measured deviation amount, perform exposure without performing position adjustment or correction of the stage movement amount, and compare it with the automatic measurement value after development later. In addition, when the alignment is performed, an error may exist in the driving amount. Also in this case, when the deviation amount is stored and later compared with the automatic measurement value after development, the correction error of the calibration values of the offset, the magnification, and the rotation component becomes small. Furthermore, the baseline of the off-axis scope can also be measured by this automatic measurement. In the case of using the TTL alignment mechanism that does not pass the reticle and the case of using the off-axis alignment mechanism, there is no need to provide a window for mark observation on the reticle, and automatic measurement is not required. The required area of the reticle pattern can be reduced.

[Effects of the Invention] As described above, according to the present invention, in the semiconductor manufacturing apparatus, the automatic measuring system of the wafer position deviation is constituted by the stepper which is the exposure apparatus and the peripheral device which includes the coater and the developer. , Compared to the conventional wafer inspection work performed by people, the measurement accuracy is improved,
Moreover, the inspection time can be shortened and the stability of the inspection conditions and accuracy can be maintained. That is, the efficiency of semiconductor manufacturing is improved. Further, since the accuracy of measurement of the process offset is improved, highly accurate alignment can be realized in semiconductor manufacturing using a stepper. Therefore, it is effective in improving the yield of semiconductor manufacturing.

[Brief description of drawings]

FIG. 1 is a perspective view showing the whole of a semiconductor manufacturing apparatus including a step-and-repeat type semiconductor exposure apparatus, a coater and a developer according to the present invention, and FIGS. 2 and 3 are automatic views in the apparatus of FIG. FIG. 4 is a flow chart showing the procedure of measurement, and FIG. 4 is a schematic diagram showing the positional relationship between the reticle and the wafer when the deviation amount measurement mark is exposed in the apparatus of FIG. 1, and FIG. 5 is the apparatus of FIG. FIG. 6 is a schematic diagram showing the positional relationship between the reticle and the wafer when measuring the deviation amount mark in FIG. 6, FIG. 6 is a schematic diagram showing the step structure of the measurement mark in the apparatus of FIG. 1, the mark image and the signal waveform, FIG. 7 is a schematic diagram showing an image of an alignment mark in the apparatus of FIG. 1, and FIG. 8 is a flowchart showing a procedure for performing automatic measurement in the global alignment mode in the apparatus of FIG. Fig. 9 is a schematic diagram showing the positional relationship between the reticle and the wafer when carrying out calibration of measured values in the apparatus of Fig. 1, and Fig. 10 is a diagram showing another embodiment of the present invention. FIG. 1 is a perspective view showing an overall view of a stepper that performs automatic measurement by a TTL type scope that does not pass a reticle. XYS: XY stage, HAS: Wafer supply hand, WF: Wafer, H
AR: Wafer collection hand, LN: Reduction projection lens, OE: Off-axis scope, RT: Reticle, WST: Wafer set table, IL: Exposure light source, WEN: Wafer receiving table, CU: Control unit, RP: Reticle side shift amount Pattern, CS:
Console, WP: Wafer side deviation amount pattern, LS: Laser light source, WIL: Deviation amount mark observation window (left), CM: CCD camera,
WIR: Deviation amount mark observation section (right), CO: Coater (resist coating device), WPA: Deviation amount mark, DE: Developer (developing device), WPS: Calibration mark, CMY: CCD camera.

Claims (4)

[Claims] 1. A step of applying a resist to a test wafer by a resist coating apparatus, a step of automatically carrying the resist-coated test wafer to an exposure apparatus, and an alignment of the test wafer in the exposure apparatus. After doing
Exposing the resist on the inspection wafer through a reticle set in the exposure device to transfer the reticle-side mark formed on the reticle to the resist on the inspection wafer; and Exposing the resist on the inspection wafer by an apparatus, then automatically transporting the inspection wafer to a resist developing apparatus, and developing the exposed resist on the inspection wafer by the resist developing apparatus, A step of automatically transporting the inspection wafer whose resist has been developed by the resist developing device to the exposure device again without applying the resist again by the resist coating device; and a step of forming in the developed resist on the inspection wafer. The reticle side mark is picked up by the image pickup means for detecting the alignment mark of the exposure apparatus. A step of causing the control device to calculate an alignment offset of the exposure device based on an image signal of the reticle side mark in the developed resist imaged by the imaging means, and applying a resist by the resist application device. A method of manufacturing a semiconductor, comprising the step of controlling a wafer alignment operation of the exposure apparatus by using the alignment offset calculated by the control apparatus when the next wafer is exposed by the exposure apparatus. 2. The semiconductor manufacturing method according to claim 1, wherein the control device calculates the alignment accuracy of the exposure device based on the image signal. 3. The semiconductor manufacturing method according to claim 1, wherein the image pickup means simultaneously picks up a wafer side mark previously formed on the inspection wafer and the reticle side mark in the developed resist. 4. The exposure apparatus transfers a plurality of the reticle-side marks to a resist on the inspection wafer, and the imaging unit forms a plurality of the reticle-side marks formed in a developed resist on the inspection wafer. The semiconductor manufacturing method according to claim 1, wherein the control device calculates the alignment offset using a plurality of the image signals.