JPH0563051A - Device and method for manufacture of semiconductor - Google Patents

Abstract

PURPOSE:To detect a process offset value in an exposure device rapidly and highly accurately and to prevent lowering of quality of a trial wafer used for an inspection by making an exposure device control an exposure region. CONSTITUTION:Measurement of exposure and deviation amount of a trial wafer WF and measurement and setting of a process offset are carried out in one system including a stepper ST. When an inspection mark is exposed to the trial wafer, exposure is performed by limiting an exposure region of the stepper ST to an inspection mark region and deviation is measured by latent image without developing the exposed wafer. Furthermore, after deviation is measured, an actual element pattern is further exposed to the trial wafer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus and a semiconductor manufacturing method used for manufacturing integrated circuits and the like,
Particularly, the present invention relates to a semiconductor manufacturing apparatus and method for automatically measuring overlay accuracy of the semiconductor exposure apparatus in a manufacturing line including the semiconductor exposure apparatus.

[0002]

2. Description of the Related Art A semiconductor manufacturing line for manufacturing integrated circuits comprises a resist coating device, a semiconductor exposure device, and a developing device.

In such a semiconductor manufacturing line, in the semiconductor manufacturing process, particularly in the pattern exposure process, the etched wafer and the reticle pattern are aligned and then superimposed and exposed. In order to measure the overlay accuracy and the offset error, conventionally, a pattern (vernier) for measuring a positional deviation is drawn on a wafer, and an inspector visually inspects the vernier using a microscope or the like.

For inspection, several tens to several tens per lot
Of the 00 wafers, 1 or 2 called the preceding wafer
It is normal to use one. In the inspection using the preceding wafer, the operator performed all of resist coating, exposure, development, and visual inspection, and after checking the inspection result, the result was input to the exposure device and the remaining wafers were sent to the manufacturing process line. In addition, the exposure process for inspection is performed over the entire exposureable area.

[0005]

However, in such a visual inspection, since the inspection time is long, the production line is stopped for a long time and the production efficiency is lowered. Moreover, when the inspection amount increases, a measurement error occurs due to the fatigue of the worker. Furthermore, if the inspection operator changes, there is a large difference in the results of the visual inspection. In today's LSI manufacturing technology, for example, even if a difference of 0.05 μm occurs in the inspection result, if an incorrect value based on the difference of 0.05 μm is input to the exposure apparatus as a process offset, the yield is deteriorated. .. That is, the current inspection method causes deterioration of inspection efficiency and inspection accuracy in terms of managing alignment accuracy and process offset for each wafer process in semiconductor manufacturing. Therefore, a high-speed inspection device with stable measurement accuracy is required.

In order to eliminate the drawbacks of the visual inspection, a dedicated inspection device that can automatically measure the deviation amount may be introduced. These apparatuses are currently placed offline and separately from the semiconductor exposure apparatus, and the wafer exposed by the semiconductor exposure apparatus is subjected to automatic inspection equipment after development. Further, in order to manage the value of the process offset at a value of, for example, 0.05 μm or less, the adjustment state of each exposure apparatus also poses a problem. An example of this is the correction of the baseline in off-axis alignment. In order to correct the temporal fluctuation of the baseline, it is necessary to measure the offset promptly. Furthermore, 0.05
In order to achieve a high accuracy of μm or less, the measurement value itself in the exposure device when the preceding wafer is printed is also a problem.

While the offset input value is actually measured and fed back to the exposure apparatus, the exposure apparatus itself is often in a waiting state. However, the exposure apparatus is equipped with a highly accurate measurement mechanism for alignment. Such waste is extremely bad in terms of system efficiency.

Further, since the exposure process for inspection is performed on the entire surface of the exposure area, it is impossible to prevent the damage of the actual pattern. That is, in order to expose a dedicated mark that is inserted to measure the amount of deviation,
If the reticle for manufacturing a product is used to expose the entire area of the reticle, even if the resist on the preceding wafer is completely removed, the product value of the preceding wafer is reduced due to the damage of the pattern. This is also a waste of semiconductor manufacturing efficiency. In the current inspection, not only the work procedure is complicated as described above, but also the wafer management becomes complicated.

The present invention has been made in consideration of the above points, and a first object thereof is to detect the offset value in the exposure apparatus at high speed and with high accuracy. A second object is to cause the exposure apparatus to control the exposure area and prevent the quality of the preceding wafer from being deteriorated.

[0010]

In order to achieve the first object, according to the present invention, exposure of an inspection wafer, measurement of a deviation amount, and measurement and setting of a process offset are performed in one system including an exposure apparatus. I am trying to do it. In order to achieve the second object, according to the present invention, when an inspection mark is exposed on a wafer for inspection (preceding wafer), the exposure area of the exposure apparatus is limited to the inspection mark area and the exposure is performed. Without developing the wafer, the deviation measurement was performed by the image of the inspection mark formed in the photoresist layer coated on the wafer (hereinafter referred to as a latent image), and the deviation measurement was performed. After that, an actual element pattern is exposed on the inspection wafer. Preferably, the detection mechanism of the exposure apparatus itself is used as the detection mechanism.

A preferred embodiment of the present invention is characterized in that the exposure apparatus and the peripheral device are configured as one system, and the speed of measurement of the process offset and the accuracy thereof are improved. That is, a coater for applying a resist on the wafer,
It consists of a semiconductor manufacturing line consisting of a stepper with an exposure and inspection mechanism that can control the area, and a preceding wafer that is a wafer for inspection is sent from the coater to the stepper, exposed, and again as a latent image in the stepper. It is characterized by automating consistent and consistent measurement work. The measured value is compared with the state of the stepper at the time of exposure and is automatically set in the stepper as an offset at any time. Further, it is characterized in that a deviation amount measuring method by image processing which can minimize a measurement error is adopted.

[0012]

According to the present invention, since the inspection wafer is exposed, the amount of deviation is measured, and the process offset is measured and set in one system including the exposure apparatus, the process offset can be measured and set at high speed. And high accuracy can be achieved.

Further, the exposure of the inspection mark to the preceding wafer is limited to the inspection mark area, so that the deterioration of the quality of the preceding wafer due to the inspection mark exposure is prevented.

The present invention will be described in more detail based on the following examples.

[0015]

First Embodiment FIG. 1 shows the configuration of a semiconductor manufacturing apparatus (semiconductor manufacturing line) according to an embodiment of the present invention. 2 and 3 are flowcharts showing the flow of the automatic inspection process in the apparatus of FIG. FIG. 4 is a perspective view showing the relationship between a reticle and a wafer used in the apparatus of FIG. 1, and FIG. 5 shows a method of forming and detecting marks used for inspection.

The apparatus shown in FIG. 1 is one in which the present invention is applied to a semiconductor manufacturing apparatus in which three mechanisms of a coater (resist coating apparatus), a stepper (reduction projection exposure apparatus) and a developer (developing apparatus) are connected in series. The present invention realizes semiconductor manufacturing in which inspection of alignment accuracy and offset error during wafer exposure is automated.

First, the function and role of each mechanism will be described. The coater CO has a function of applying a resist to the wafer WF.

The stepper ST has a function of superposing and exposing the pattern of the reticle RT onto the pattern formed on the wafer WF. Further, it has a function of performing this overlay exposure independently for the area of the inspection mark such as the deviation amount measurement mark or the calibration mark and the actual element pattern area. Further, it has a function of measuring an inspection mark formed on the wafer.

The developer DE is used for removing the resist in the pattern (actual element pattern) area exposed as a product after the inspection mark deviation amount inspection result is automatically reflected in the exposure apparatus.

In the automatic inspection, the inspection wafer WST placed at the entrance of the coater CO is instructed by the control unit CU.
Is automatically processed while moving between each mechanism. Then, the alignment accuracy and the process offset value are calculated from the deviation amount measured from the mark (latent image) formed at the time of exposure. The value is input to the stepper ST and used as an alignment correction value for the product manufacturing wafer. The inspection wafer (preceding wafer) is a wafer that has undergone the same process as the product manufacturing wafer. In the present embodiment, one wafer is selected as an inspection wafer from one lot of product manufacturing wafers, and this wafer is processed prior to other product manufacturing wafers.

Next, the automatic inspection process in the apparatus of FIG. 1 will be described with reference to FIGS.

First Step (S001 to S003) The wafer to be inspected is placed at the WST position in FIG. 1 (S001). The wafer is coated with the resist while passing through the transfer path R1 and the resist coating apparatus CO (S00
2) is sent to the stepper ST through the transport path R2 (S
003). The wafer sent to the stepper ST is first placed on the wafer chuck WS on the XY stage XYS by the auto hand HAS, and is vacuum-sucked.

Second Step (S004 to S007) The second step is a step of exposing the resist applied on the wafer with the pattern drawn on the reticle. A pattern area exposed at one time is called a shot. The reticle RT mounted on the reticle stage RS and placed above the reduction projection lens LN includes set marks RSMR and RSML attached to the upper surface of the reduction projection lens LN and reticle alignment marks RAMR and RA engraved on the reticle.
Aligned by ML. XY stage XY
S is a laser interferometer IFX and a mirror MRX in the X-axis direction, and a laser interferometer IPHY and a mirror M in the Y-axis direction.
The position is precisely measured by RY, and an arbitrary position of the wafer WF can be moved below the reduction projection lens LN while controlling the rotations of the motors MX and MY.

The wafer W placed on the wafer chuck WS
F is an off-axis optical system OE, and marks WAML, W
The position of the AMR is measured, and the position of the wafer WF on the XY stage XYS is aligned (S004). Next, the XY stage XYS moves so that the first shot is below the reduction projection lens, and aligns the wafer with respect to the reticle RT, that is, the set marks RSMR and RSML.

The mark observation for wafer alignment is performed using non-exposure light in order to minimize damage to the inspection wafer. Here, the mark is observed by the TTL off-axis method. The wafer alignment is performed by the global alignment method. The global alignment is a method of measuring the mark position of a predetermined shot on the wafer to measure the array state of all shots, sending the XY stage XYS to the position with the smallest deviation, and exposing. In this alignment method, mainly the rotation component and the magnification component of the shot arrangement state in the wafer are measured, and the step movement amount of the XY stage is corrected using these values. The advantage of this alignment method is that it is possible to remove measured values that are apparently outliers in the measurement shots, and the averaging effect of multiple measured values makes the measured values of rotation and magnification components highly reliable. There is a point. If the rotation, the magnification component, etc. are precisely measured by this alignment method and the step movement amount of the stage is correctly corrected, the alignment error at the time of exposure becomes almost zero. Conversely, if an error occurs in the measurement of the stage movement amount, the alignment accuracy deteriorates. However, in this case, the accuracy deterioration appears as a rotation or magnification component.

Light emitted from the non-exposure light source SLY, such as a HeNe laser, passes through the half mirror HM and is irradiated onto the projection lens LN by the mirror MRA to illuminate the alignment mark WML on the wafer. The non-exposure light reflected by the wafer WF passes through the projection lens LN and the mirror M.
The optical path is bent by RA and passes through the half mirror HM to C
Reach the CD camera CMY. As a result, the image of the alignment mark WML is formed on the CCD camera CMY.
The mark WMR on the opposite side is also moved by moving the stage XYS to form an image on the CCD camera CMY in the same manner as above.

The image signal from the CCD camera CMY is processed by the stepper control unit CU, and the marks WML and WMR are processed.
Position is measured, and the position measurement of the wafer in the shot is completed. The stage step movement correction amount is measured using the measurement values of all the measurement shots set for global alignment. The correction amount is Rotx (X-axis rotation), Roty (Y-axis rotation), Magx (X-axis magnification).
And Magy (Y-axis magnification) and the like. These correction amounts are accumulated in the CU (S005). Further, exposure is performed while the XY stage XYS is stepwise moved by the amount calculated according to the correction amount.

At the time of exposure, in order to eliminate the damage due to exposure, the actual element pattern area of the preceding wafer used for inspection, as shown in FIG.
That is, the actual element area is covered with the masking blade MB,
Light is prevented from hitting the actual element region (S006).
As shown in FIG. 5, the masking blade MB includes four movable plates having strong light shielding characteristics, such as metal plates (BL, BL,
BR, BU, BD). The positions of the four plates can be controlled by the control unit CU to determine the exposure area within the maximum exposure area MS.

Next, the exposure shutter SHT is opened in order to expose the deviation amount measurement mark on the reticle. The light of the exposure light source IL applied to the reticle pattern RT passes through the masking blade MB and the reduction projection lens LN to
The resist applied on the wafer WF is exposed by being reduced to / 5. At this time, only the reticle side displacement amount measurement mark (RP in FIG. 4) used in the third step described later is superimposed and exposed on the wafer side mark (WP in FIG. 4) (S007). When the exposure is completed, the XY stage moves to the next exposure position and exposes all shots.

Third Step (S008 to S009) In the third step, the alignment accuracy of the second step is inspected by using the deviation amount inspection mark on the wafer. The reticle-side mark exposed in the second step can be observed with non-exposure light as a latent image (an image formed in the resist by a portion whose optical characteristics have changed with respect to the surrounding portion due to exposure). Therefore, it is not necessary to develop.

A TTL off-axis type scope (LS) used for alignment as a mark observation scope.
Y, HM, MRA, CMY) is used. The mark shape observed with the scope is as shown in FIG. FIG. 6D shows a mark in the X direction,
The Y direction is not shown. The shape and size of the mark are similar to those for alignment, and the image processing only adds an algorithm for measuring the inspection mark. Moreover, it is not necessary to add a special optical system. The method of measuring the inspection mark will be described later.

FIG. 7 shows the inspection mark formed in each shot of the wafer. In the measurement of the inspection mark, as shown in the flowchart of FIG. 3, the stage is sequentially moved from the first shot to the final shot (SB001), and the displacement amount measurement mark WPA (FIG.
The image of (A)) is captured by the CCD camera CMY, autofocus is performed by image processing, and the distance between the projection lens and the wafer is set to an optimum distance (SB002). Next, the deviation amount measurement mark is measured by image processing (SB003), and the measured value is stored in the control unit CU (S014).

The wafer for which measurement has been completed remains in the stepper until the following offset calculation is completed. The control from the first step to the third step is performed by the stepper control unit CU. Each device and the control unit CU are connected by a communication cable.

The control unit CU calculates and outputs an offset, which is the average value of the deviation measurement values and the triple value 3σ of the variance σ which is the auto alignment accuracy, from the deviation amount measurement values accumulated in the apparatus. .. Here, when the 3σ value greatly exceeds the allowable range, the wafer is collected (S01).
7). Here, if necessary, the operation terminal CS
A warning may be issued to inform the inspection worker. If the 3σ value is within the allowable range, it means that the process offset of the inspected wafer has been normally detected (S09).

Fourth Step (S010 to S015) In the fourth step, the actual element pattern is exposed on the preceding wafer used for the inspection by using the measured process offset and the like. The present invention intends to effectively utilize the preceding wafer as a product by this exposure.

When the wafer process offset is normally detected in S009, the process offset and rotation obtained as the alignment error as a result of the measurement, and the magnification component are the calibration values of the global alignment as the control unit CU.
Is set to (S010, S011). The calibration values set in the control unit CU are M (process offset), Rotx
c (calibration value of X-axis rotation), Rotyc (calibration value of Y-axis rotation), Magxc (calibration value of X-axis magnification), Magyc
(Y axis magnification calibration value).

The alignment exposure of the actual element region as the product wafer is a value obtained by subtracting the calibration value input to the control unit CU from the stage movement correction amount obtained by the position measurement of the wafer displacement amount measurement shot. Then, it is performed while correcting the step movement amount of the stage. By using this method, extremely high alignment accuracy can be obtained.

If there is no problem in the inspection result and the correct correction value is set for the preceding wafer whose measurement has been completed first, the area of the masking blade is reset to the size for actual element exposure (S012), Started manufacturing products using wafers. The actual element pattern exposure for all shots is performed by correcting the previously determined stage step movement amount with an automatically measured value (S013). After exposure of all shots,
The wafer is sent to the developing device DE by the collecting hand HAR (S014). After the development, the wafer is collected at the wafer take-out position WEN through the transfer path R4 (S015).

The second and subsequent wafers are sequentially exposed and developed with the alignment measurement values corrected with the already set alignment correction amount (S016).

If there is a problem in the result of the deviation amount inspection (S009), the preceding wafer is recovered from the stepper ST by the hand HAR. This wafer has a transfer path R
3 and R4, and is taken out at the wafer take-out position WEN without being developed by the developer DE (S0
17). In this case, the second and subsequent wafers are not processed.

A method of forming the deviation amount measurement mark will be described with reference to FIG. The wafer to be inspected is a wafer-side measurement mark W on the wafer substrate in the previous process in semiconductor manufacturing.
P is formed as shown in FIG. This mark forming method is the same as the alignment mark forming method. In this embodiment, the state where the resist RE is applied in the first step is as shown in FIG. In the second step, while the wafer is being aligned, the pattern drawn on the reticle is exposed on the resist layer.

The reticle RT is already accurately aligned with the lens LN, and the baselines of the lens LN and the TTL off-axis scope are accurately measured and corrected. In the exposed area, the characteristics of the resist change, and the refractive index changes from that of the unexposed area. Therefore, when observed with non-exposing light, the contrast changes and the unexposed area and the exposed area can be distinguished. The cross-sectional shape at that time is shown in FIG. 6C, and the pattern on the reticle side is formed like RP1 and RP2.

The image captured by the CCD camera in the third step of measuring the amount of deviation is shown in FIG.
At the time of processing in U, the signal becomes a signal compressed in the long axis direction of the mark as shown in FIG.

The detection of the mark position and the calculation of the shift amount will be described. FIG. 6E shows a signal compressed in the long axis direction of the mark. For the mark detection, the centers of the three marks are independently obtained one by one. The mark center RC from the wafer side mark center WC and the two reticle side mark centers R1 and R2

[0045]

## EQU1 ## RC = (R1 + R2) / 2

[0046]

## EQU2 ## E = RC-WC.

The above-mentioned process offset and alignment accuracy are determined by the following equation.

[0048]

[Equation 3]

In Equation 3, N is the total number of shots, E is the measured shift amount, M is the offset, and σ is the dispersion of alignment accuracy. The alignment evaluation of the inspected wafer is determined by 3σ. The value M is automatically input to the stepper as an alignment offset.

In the above description, the case where the reticle and the wafer are aligned with each other in the second step has been described, but this is not always necessary for the purpose of offsetting. It is also possible to store the measured deviation amount, perform exposure without performing alignment, and compare it with the automatic measurement value later. Further, when the alignment is performed, there may be an error in the driving amount. Also in this case, when the deviation amount is stored and later compared with the automatic measurement value, the offset correction error becomes small.

Autofocus (AF) by image processing
Will be described. The mark used for AF is a shift amount measurement mark, and is not a special mark devised for AF. Therefore, in order to obtain the most appropriate stage height, that is, the best focus, an evaluation function that quantifies the degree of blurring of an image by image processing using, for example, contrast is used. The best focus is determined by displacing the XY stage in the height direction, capturing an image, plotting the evaluation value of the evaluation function at that time in the control unit CU, and setting it as the height of the stage with the highest evaluation value. There is. By adding the AF mechanism, the measurement accuracy of the displacement amount measurement mark is improved, and the stability of the process offset measurement is increased.

By using this inspection process, the self-inspection of the reduction projection exposure apparatus is also possible. XY stage inspection, which was conventionally performed by vernier evaluation by inspection workers,
In the evaluation of the reduction projection lens and the inspection of the reticle rotation, all the steps of resist coating, exposure and inspection are replaced by the automatic inspection process shown in the present invention.

A method of calibrating the deviation amount measurement mark measurement value itself will be described with reference to FIG. In the automatic measurement, the measurement value itself of the displacement amount measurement mark can be calibrated by measuring a mark which is designed in advance so that the displacement amount becomes 0, that is, the calibration mark WPS. The calibration mark WPS is used for measuring the deviation amount measurement mark WPA when the deviation amount measurement mark is exposed on the inspection wafer.
It is desirable to expose at a position adjacent to. because,
This is because the conditions such as the resist coating state, shot elongation, and shrinkage are the most similar. The measurement of the calibration mark WPS is the same as the method of the displacement amount measurement mark described above. The measurement result is processed by the control unit CU, and the average value MC is obtained.

[0054]

[Equation 4]

Here, DC is the measurement value, N is the number of measurement shots, and this value MC is the calibration value. Therefore, the stroke offset in the deviation amount measurement is calibrated by the following equation.

[0056]

[Formula 5] Mof = M-MC

In this embodiment, the TTL off-axis method is used as the alignment scope for the non-exposure light, but the off-axis scope OE may be used. Further, although the mark shape is similar to the alignment mark, the shape is not limited as long as it can detect the deviation amount as an image. Further, in some cases, such as when the wafer alignment marks WMR, WMR and the reticle alignment marks RMR, RMR are not used in the subsequent steps, these alignment marks can be used as the inspection marks.

[0058]

[Embodiment 2] A method of exposing a displacement amount measurement mark without using a masking blade will be described with reference to FIGS. In the second embodiment, the exposure process is performed by using the exposure light alignment scope. Therefore, as shown in the flowchart of FIG. 8, the second step (S004 to S007) is different from the first embodiment. Processing of S10
4 to 107, and the process of masking blade resetting (S012) in the fourth step is removed. The exposure light alignment does not require correction of chromatic aberration in the lens, and since the wafer can be observed through the reticle, it is easy to measure the relative displacement between the wafer and the reticle.

In the second step of alignment, alignment light is drawn from the illumination system IL into the scope by the optical fiber OFB. The scope is the shutter SHC,
Diffuser DP, beam splitter BS, roof prism DA
P and mirrors AMR, AML, etc. The light drawn into the scope is first opened / closed by the shutter SHC. This shutter SHC opens during alignment. The light passing through the shutter SHC is diffused by the diffusion plate DP to remove speckles, and the beam splitter BS
It is divided into left and right by the Dach prism DAP. The light on the right side is reflected by the mirror AMR and illuminates the projection lens LN. The light passing through the projection lens LN reaches the wafer WF and illuminates the wafer mark WMR. The light reflected by the wafer WF traces the same optical path in the opposite direction to illuminate the reticle mark RMR, reaches the CCD camera CM through the roof prism DAP and the beam splitter BS. As a result, the images of the wafer mark WMR and the reticle mark RMR are formed on the CCD camera CM. The images of the wafer mark WML and the reticle mark RML on the left side are similarly formed on the CCD camera CM. The alignment image at that time is shown in FIG. The wafer alignment is performed by measuring a plurality of shots in the wafer and performing global alignment (S105).

The light of the exposure light alignment can expose the resist. In this embodiment, the scope is used to expose only a very small area. Mirror AML, AM
R position is the reticle side deviation amount mark (RPR, RPL)
To the top (S106). The situation is shown in FIG. Since the mirror AMR is on the deviation amount measurement mark RPR on the reticle side, the exposure light illuminates the mark RPR by opening the shutter SHC, and the deviation amount mark WPR on the wafer.
Is overlaid and exposed. The stage step movement corrected by the global alignment is performed, and the exposure by the scope is sequentially performed for all shots (S10).
7).

The measurement of the amount of shift due to the latent image is performed according to the same idea as in the first embodiment. When exposed with a scope, marks are formed at two places on the left and right within the shot. Therefore, in the measurement by the TTL off-axis scope, the left and right marks are measured by combining the stage movement. Left and right 2 in the shot
The ability to measure locations has the advantage of being able to measure shot rotation errors and shot magnification errors.

Handling as a preceding wafer, the handling of the second and subsequent wafers is the same as in the first embodiment. An off-axis scope OE may be used for measurement.

[0063]

Third Embodiment In contrast to the second embodiment, a method of performing mark measurement with non-exposure light will be described. In this case, when measuring the mark,
The non-exposure light source LSN is used for the exposure light scope of the second embodiment. As the light source LSN, for example, a HeNe laser can be used. Further, since it is necessary to correct chromatic aberration, a correction optical system OHO is inserted. Further, a second shutter SHN is arranged, and the light source is switched by opening / closing the shutters SHC and SHN. For the measurement, the camera CM is used to measure the displacement amount mark. A window for observing the exposed and developed mark WPA is prepared on the reticle. The image processing algorithm, the image autofocus, and the like are performed according to the same idea as in the first embodiment, and the measurement results are reflected in the exposure apparatus according to the same idea as in the first embodiment.

[0064]

[Fourth Embodiment] In the first, second and third embodiments, the case where the alignment method is the global alignment has been described, but in the fourth embodiment, the exposure is performed by aligning the wafer and the reticle for each shot. It can also be applied to the measurement of the deviation amount.

In the case of die-by-die alignment, exposure light alignment of a TTL on-axis scope is used for alignment. After the amount of displacement between the reticle and the wafer is measured, the reticle is finely moved for exposure. At this time, if the exposure area is limited to the displacement amount measurement mark by the masking blade, the actual element pattern area is not exposed. In this case, the correction value reflected in the exposure apparatus is the alignment offset M. Regarding the measurement, the method of Example 1 and Example 3 is used.

[0066]

As described above, according to the present invention,
Since the automatic measurement system is incorporated in one system, the measurement accuracy is improved and the inspection time is shortened as compared with the wafer inspection work which is conventionally performed by a person. Further, since the exposure area of the preceding wafer is limited and the actual element pattern area is shielded and the latent image measurement is adopted, the development for the inspection becomes unnecessary, so that the damage of the preceding wafer can be eliminated. It was Moreover,
Inspection conditions and accuracy stability can be maintained. That is, the present invention is effective in improving the efficiency of semiconductor manufacturing. Further, since the accuracy of measurement of the process offset is improved, highly accurate alignment can be realized in the semiconductor manufacturing with the stepper, which is effective in improving the yield of semiconductor manufacturing.

[Brief description of drawings]

FIG. 1 is a diagram showing an overall configuration of a semiconductor manufacturing apparatus according to an embodiment of the present invention.

2 and 3 are flowcharts showing the procedure of an automatic inspection process in the apparatus of FIG.

FIG. 4 is a diagram showing a positional relationship between a masking blade, a reticle, and a wafer when exposing a deviation amount measurement mark.

FIG. 5 is an explanatory diagram of a masking blade.

6A and 6B are diagrams showing a method of creating a measurement mark, an image of the mark, and a signal waveform.

FIG. 7 is a diagram showing measurement marks and calibration marks in a shot.

FIG. 8 is a flowchart showing the procedure of the second embodiment.

FIG. 9 is a diagram showing an alignment image.

FIG. 10 is a diagram showing exposure of a deviation amount mark using an exposure light alignment scope.

[Explanation of symbols]

XYS: XY stage, HAS: Wafer supply hand,
WF: Wafer, HAR: Wafer collection hand, LN:
Reduction projection lens, OE: Off-axis scope, R
T: reticle, WST: wafer set table, I
L: exposure light source, WEN: wafer receiving table, CU:
Control unit (control device), RP: Reticle side displacement amount measurement mark, CS: Console, WP: Wafer side displacement amount measurement mark, OFB: Optical fiber, M
B: Masking blade, CM: CCD camera, C
MY: CCD camera, CO: coater (resist coating device), WPA: deviation amount mark, DE: developer (developing device), WPS: calibration mark.

Claims (13)

[Claims] 1. A semiconductor manufacturing apparatus, which sequentially exposes a reticle pattern to each shot on the wafer while stepwise moving the wafer coated with the resist, wherein the wafer and the reticle are aligned with each other. Means, an exposure means capable of exposing by limiting the exposure area of each shot to the area of the inspection mark formed on the reticle, the mark on the wafer, and the exposure means formed in the resist layer by exposing the wafer Mark detection means for detecting the inspection mark image on the reticle side, and when processing a resist-coated inspection wafer, first align the inspection wafer and limit the exposure area of each shot to the area of the inspection mark. And sequentially expose, and then the mark detection means performs registration with the inspection mark previously formed on the inspection wafer by the exposure. The inspection mark image formed in the printed layer is measured, the process offset is detected and set based on the measured value, the exposure area is set to the actual element area, and then the actual element of the reticle is set on the inspection wafer. A semiconductor manufacturing apparatus, comprising: a control unit that controls the semiconductor manufacturing apparatus so as to sequentially expose a pattern, and automatically measures and sets the process offset. 2. The apparatus according to claim 1, wherein the mark detecting means shares the alignment mark detecting means of the alignment means. 3. An apparatus according to claim 2, wherein the semiconductor manufacturing line is arranged in series with a coater for coating a resist on a wafer and a developer for developing the wafer after the exposure of the actual element pattern. 4. The apparatus according to claim 1, wherein the alignment means uses an off-axis alignment scope. 5. The apparatus according to claim 1, wherein the alignment means performs global alignment. 6. The apparatus according to claim 1, wherein the inspection wafer is selected from product manufacturing wafers of the same lot, and is processed prior to other product manufacturing wafers. 7. A semiconductor manufacturing line in which a coater, a stepper, and a developer are arranged in series, and a first step of applying a resist to a wafer for inspection by a coater, and aligning the wafer with the stepper to expose an exposure region with a reticle. A second step of sequentially exposing only the area of the first inspection mark formed above, and an image of the first inspection mark formed on the resist on the wafer by the exposure and previously formed on the wafer A third step of measuring the amount of deviation from the second inspection mark that has been made, and a fourth step of detecting a process offset based on the amount of deviation measurement and setting it in the stepper, and setting the exposure area to the actual element area. And a fifth step of exposing a reticle pattern onto the inspection wafer to automatically measure and set the process offset for a product manufacturing wafer. A method for manufacturing a semiconductor, comprising: 8. The stepper has an alignment mechanism capable of performing alignment by measuring an alignment mark formed by a pattern on a wafer by using an image processing method, and performing the deviation amount measurement in the third step. , The second
A deviation amount formed by a resist pattern image, which is a pattern of the first inspection mark printed on the wafer while aligning the wafer in step, and a pattern of the second inspection mark previously formed on the wafer The method according to claim 7, which is performed by measuring a measurement pattern by the alignment mechanism. 9. The stepper has an alignment mechanism capable of measuring and aligning an alignment mark formed by a pattern on a wafer and a pattern on a reticle by using an image processing method, and the stepper has an alignment mechanism. The amount of deviation is measured by aligning the wafer in the second step, and a resist pattern image which is a pattern of the first inspection mark printed on the wafer and the second inspection mark previously formed on the wafer. 8. The method according to claim 7, which is performed by measuring a displacement amount measurement pattern constituted by the pattern of 1. 10. The stepper is provided with a mechanism capable of varying an exposure area, and when exposing the first inspection mark pattern, the exposure is limited to a portion of the inspection mark by the mechanism capable of varying the exposure area, and other than the inspection mark. 10. The method according to claim 8 or 9, wherein the area is not exposed. 11. The stepper is provided with an exposure light alignment scope, and when exposing the first inspection mark pattern, the exposure light alignment scope is used to limit the exposure to only the portion of the inspection mark and to provide an area other than the inspection mark. 10. The method according to claim 8 or 9, wherein is not exposed. 12. The stepper, when measuring the deviation amount using the image processing method, obtains the blur condition of the deviation amount measurement pattern of the measurement shot by image processing and adjusts the height of the wafer to a position where the blur is smallest. The method according to claim 8 or 9, comprising an autofocus mechanism. 13. The method according to claim 9, wherein the illumination light of the alignment mechanism can be switched between exposure light and non-exposure light.