JPH0563052A - Device and method for manufacture of semiconductor - Google Patents

Abstract

PURPOSE:To detect a process offset value in an exposure device rapidly and highly precisely and to prevent lowering of quality of trial wafer used for an inspection by making the exposure device control an exposure region. CONSTITUTION:An exposure device (stepper ST) and a peripheral device (a developer DE, for example) are constituted as one system. When an inspection mark is exposed to a trial wafer WF, exposure is carried out by limiting an exposure region of a stepper to an inspection mark region and a trail wafer is developed and deviation is measured. Then, when an actual element pattern is exposed to use the trial wafer as a product, an exposure parameter is set separately from a product manufacturing wafer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus and method used for manufacturing integrated circuits and the like, and particularly to automatically measuring overlay accuracy of the semiconductor exposure apparatus in a manufacturing line including the semiconductor exposure apparatus. Semiconductor manufacturing apparatus and method.

[0002]

2. Description of the Related Art A semiconductor manufacturing line for manufacturing integrated circuits comprises a resist coating device, a semiconductor exposure device, and a developing device.

In such a semiconductor manufacturing line, in the semiconductor manufacturing process, particularly in the pattern exposure process, the etched wafer and the reticle pattern are aligned and then superimposed and exposed. In order to measure the overlay accuracy and the offset error, a pattern (vernier) for measuring the positional deviation is drawn on the wafer, and the inspection operator uses the microscope or the like to visually inspect the vernier.

For inspection, several tens to several tens per lot
Of the 00 wafers, 1 or 2 called the preceding wafer
It is normal to use one. In the inspection using the preceding wafer, the operator performed all of resist coating, exposure, development, and visual inspection, and after checking the inspection result, the result was input to the exposure device and the remaining wafers were sent to the manufacturing process line. In addition, the exposure process for inspection is performed over the entire exposureable area.

[0005]

However, in such a visual inspection, since the inspection time is long, the production line is stopped for a long time and the production efficiency is lowered. Moreover, when the inspection amount increases, a measurement error occurs due to the fatigue of the worker. Furthermore, if the inspection operator changes, there is a large difference in the results of the visual inspection. In today's LSI manufacturing technology, for example, even if a difference of 0.05 μm occurs in the inspection result, if an incorrect value based on the difference of 0.05 μm is input to the exposure apparatus as a process offset, the yield is deteriorated. .. That is, the current inspection method causes deterioration of inspection efficiency and inspection accuracy in terms of managing alignment accuracy and process offset for each wafer process in semiconductor manufacturing. Therefore, a high-speed inspection device with stable measurement accuracy is required.

In order to eliminate the drawbacks of the visual inspection, a dedicated inspection device that can automatically measure the deviation amount may be introduced. These apparatuses are currently placed offline and separately from the semiconductor exposure apparatus, and the wafer exposed by the semiconductor exposure apparatus is subjected to automatic inspection equipment after development. Further, in order to manage the value of the process offset at a value of, for example, 0.05 μm or less, the adjustment state of each exposure apparatus also poses a problem. An example of this is the correction of the baseline in off-axis alignment. In order to correct the temporal fluctuation of the baseline, it is necessary to measure the offset promptly. Furthermore, 0.05
In order to achieve a high accuracy of μm or less, the measurement value itself in the exposure device when the preceding wafer is printed is also a problem.

While the offset input value is actually measured and fed back to the exposure apparatus, the exposure apparatus itself is often in a waiting state. However, the exposure apparatus is equipped with a highly accurate measurement mechanism for alignment. Such waste is extremely bad in terms of system efficiency.

Further, since the exposure process for inspection is performed on the entire surface of the exposure area, it is impossible to prevent the damage of the actual pattern. That is, in order to expose a dedicated mark that is inserted to measure the amount of deviation,
If the reticle for manufacturing a product is used to expose the entire area of the reticle, even if the resist on the preceding wafer is completely removed, the product value of the preceding wafer is reduced due to the damage of the pattern. This is also a waste of semiconductor manufacturing efficiency. In the current inspection, not only the work procedure is complicated as described above, but also the wafer management becomes complicated.

The present invention has been made in consideration of the above points, and a first object thereof is to detect the offset value in the exposure apparatus at high speed and with high accuracy. A second object is to cause the exposure apparatus to control the exposure area and prevent the quality of the preceding wafer from being deteriorated.

[0010]

In order to achieve the first object, the present invention is characterized in that an exposure device (stepper) and a peripheral device (for example, a developer) are configured as one system. In order to achieve the second object, according to the present invention, when exposing an inspection mark on an inspection wafer (preceding wafer), the exposure region of the stepper is limited to the inspection mark region and exposed, and After developing the wafer and measuring the deviation, when the actual element pattern is exposed in order to utilize the inspection wafer as a product, exposure parameters are set separately from the product manufacturing wafer. Preferably, the detection mechanism of the exposure apparatus itself is used as the detection mechanism.

According to a preferred embodiment of the present invention, in a semiconductor manufacturing line comprising a coater for coating a resist on a wafer, a stepper having an exposure and inspection mechanism capable of controlling a region, and a developer for developing the exposed wafer, The preceding wafer, which is a wafer for inspection, is sent from the coater to the stepper, the exposure area of the stepper is limited to the inspection mark area, exposed, and developed, and after the development, a consistent inspection operation is performed again in the stepper. It features automation. The measured value is compared with the state of the stepper at the time of exposure, and is automatically set to the stepper as an offset at any time, and parameters such as exposure time and focus are set according to the resist characteristics of the inspected wafer changed by the developing solution. It is characterized in that the wafer is exposed after resetting and returning the exposure region to the size of product manufacturing. Further, it is characterized in that a deviation amount measuring method by image processing which can minimize a measurement error is adopted.

[0012]

According to the present invention, the exposure device and the peripheral device are configured as one system, and the inspection marks such as the deviation amount measurement mark and the calibration mark are exposed in the system.
Since development and mark measurement are performed, the process offset and alignment accuracy are automatically measured, and the process offset is automatically set, the process offset measurement and setting can be speeded up and highly accurate.

By limiting the exposure of the inspection mark to the preceding wafer to the inspection mark area, it is possible to prevent damage to the actual element area due to the inspection mark exposure. Furthermore, the resist thickness of the preceding wafer has changed due to the development process of the inspection mark, but the exposure parameters during the actual element pattern exposure for the preceding wafer are set to the optimum exposure parameters separately from those for the product manufacturing wafer. By setting the exposure thickness, it is possible to prevent the exposure failure due to the exposure with an inappropriate exposure parameter due to the change in the resist thickness, and also from this aspect, the deterioration of the quality of the preceding wafer is prevented.

The present invention will be described in more detail based on the following examples.

[0015]

First Embodiment FIG. 1 shows the configuration of a semiconductor manufacturing apparatus (semiconductor manufacturing line) according to an embodiment of the present invention. 2 and 3 are flowcharts showing the flow of the automatic inspection process in the apparatus of FIG. FIG. 4 is a perspective view showing the relationship between a reticle and a wafer used in the apparatus of FIG. 1, and FIG. 5 shows a method of forming and detecting marks used for inspection.

The apparatus shown in FIG. 1 is one in which the present invention is applied to a semiconductor manufacturing apparatus in which three mechanisms of a coater (resist coating apparatus), a stepper (reduction projection exposure apparatus) and a developer (developing apparatus) are connected in series. The present invention realizes semiconductor manufacturing in which inspection of alignment accuracy and offset error during wafer exposure is automated.

First, the function and role of each mechanism will be described. The coater CO has a function of applying a resist to the wafer WF.

The stepper ST has a function of superposing and exposing the pattern of the reticle RT onto the pattern formed on the wafer WF. Further, it has a function of performing this overlay exposure independently for the area of the inspection mark such as the deviation amount measurement mark or the calibration mark and the actual element pattern area. Further, it has a function of measuring an inspection mark formed on the wafer.

The developer DE has a function of removing the resist in the exposed portion on the wafer WF. Particularly, for the inspection wafer, in order to develop the inspection mark after exposure of the inspection mark and after the inspection result of the inspection mark formed on the wafer is automatically reflected in the exposure apparatus,
Development processing is performed twice to remove the resist in the pattern (actual element pattern) area exposed as a product.

In the automatic inspection, the inspection wafer WST placed at the entrance of the coater CO is instructed by the control unit CU.
Is automatically processed while moving between each mechanism. Then, the alignment accuracy and the process offset value are calculated from the deviation amount measured from the mark formed at the time of exposure. The value is input to the stepper ST and used as an alignment correction value for the product manufacturing wafer. The inspection wafer (preceding wafer) is a wafer that has undergone the same process as the product manufacturing wafer. In this embodiment, one wafer is selected as an inspection wafer from one lot of product manufacturing wafers,
This is processed prior to other product manufacturing wafers.

Next, the automatic inspection process in the apparatus of FIG. 1 will be described with reference to FIGS.

First Step (S001 to S003) The wafer to be inspected is placed at the WST position in FIG. 1 (S001). The wafer is coated with the resist while passing through the transfer path R1 and the resist coating apparatus CO (S00
2) is sent to the stepper ST through the transport path R2 (S
003). The wafer sent to the stepper ST is first placed on the wafer chuck WS on the XY stage XYS by the auto hand HAS, and is vacuum-sucked.

Second Step (S004 to S008) The second step is a step of exposing the resist applied on the wafer with the pattern drawn on the reticle. A pattern area exposed at one time is called a shot. The reticle RT mounted on the reticle stage RS and placed above the reduction projection lens LN includes set marks RSMR and RSML attached to the upper surface of the reduction projection lens LN and reticle alignment marks RAMR and RA engraved on the reticle.
Aligned by ML. XY stage XY
S is a laser interferometer IFX and a mirror MRX in the X-axis direction, and a laser interferometer IPHY and a mirror M in the Y-axis direction.
The position is precisely measured by RY, and an arbitrary position of the wafer WF can be moved below the reduction projection lens LN while controlling the rotations of the motors MX and MY.

The wafer W placed on the wafer chuck WS
F is an off-axis optical system OE, and marks WAML, W
The position of the AMR is measured, and the position of the wafer WF on the XY stage XYS is aligned (S004). Next, the XY stage XYS moves so that the first shot is below the reduction projection lens, and aligns the wafer with respect to the reticle RT, that is, the set marks RSMR and RSML.

The mark observation for wafer alignment is performed using non-exposure light in order to minimize damage to the inspection wafer. Here, the mark is observed by the TTL off-axis method. The wafer alignment is performed by the global alignment method. The global alignment is a method of measuring the mark position of a predetermined shot on the wafer to measure the array state of all shots, sending the XY stage XYS to the position with the smallest deviation, and exposing. In this alignment method, mainly the rotation component and the magnification component of the shot arrangement state in the wafer are measured, and the step movement amount of the XY stage is corrected using these values. The advantage of this alignment method is that it is possible to remove measured values that are apparently outliers in the measurement shots, and the averaging effect of multiple measured values makes the measured values of rotation and magnification components highly reliable. There is a point. If the rotation, the magnification component, etc. are precisely measured by this alignment method and the step movement amount of the stage is correctly corrected, the alignment error at the time of exposure becomes almost zero. Conversely, if an error occurs in the measurement of the stage movement amount, the alignment accuracy deteriorates. However, in this case, the accuracy deterioration appears as a rotation or magnification component.

Light emitted from the non-exposure light source SLY, such as a HeNe laser, passes through the half mirror HM and is irradiated onto the projection lens LN by the mirror MRA to illuminate the alignment mark WML on the wafer. The non-exposure light reflected by the wafer WF passes through the projection lens LN and the mirror M.
The optical path is bent by RA and passes through the half mirror HM to C
Reach the CD camera CMY. As a result, the image of the alignment mark WML is formed on the CCD camera CMY.
The mark WMR on the opposite side is also moved by moving the stage XYS to form an image on the CCD camera CMY in the same manner as above.

The image signal from the CCD camera CMY is processed by the stepper control unit CU, and the marks WML and WMR are processed.
Position is measured, and the position measurement of the wafer in the shot is completed. The stage step movement correction amount is measured using the measurement values of all the measurement shots set for global alignment. The correction amount is Rotx (X-axis rotation), Roty (Y-axis rotation), Magx (X-axis magnification).
And Magy (Y-axis magnification) and the like. These correction amounts are accumulated in the CU (S005). After the alignment is completed,
Move to exposure.

At the time of exposure, in order to eliminate damage due to exposure of the preceding wafer used for inspection, as shown in FIG. 4, a masking blade MB covers the area other than the deviation amount inspection mark, that is, the actual element area and the actual element area is exposed to light. Are not hit (S006). The masking blade MB is shown in FIG.
As shown in, four movable plates with strong light-shielding characteristics,
For example, it is made of a metal plate (BL, BR, BU, BD). The position of the four plates is controlled by the control unit CU,
The exposure area can be determined within the maximum exposure area MS.

Next, the exposure time and the exposure focus for exposing the area of the inspection mark are set (S007). The exposure time controls the opening / closing time of the shutter SHT, and the focus controls the interval between the wafer WF and the lens LN.

The exposure shutter SHT is opened to expose the displacement amount measurement mark on the reticle. The light of the exposure light source IL applied to the reticle pattern RT passes through the masking blade MB, is reduced to 1/5 through the reduction projection lens LN, and exposes the resist coated on the wafer WF. At this time, only the reticle side displacement amount measurement mark (RP in FIG. 4) used in the third step described later is superimposed and exposed with the wafer side mark (WP in FIG. 4) (S0).
08). When the exposure is completed, the XY stage moves to the next exposure position and exposes all shots.

Third Step (S009 to S011) In the third step, the inspection mark exposed in the second step is developed. First, the wafer WF is unloaded from the stepper ST by the hand HAR (S009) and sent to the developer DE. The wafer passes the transfer path R3 and is developed by the developer DE. After that, the wafer passes R3 again and the hand HA
It is carried into the stepper by R (S011). In addition, the wafer after the development is transferred from the developer DE to the transfer paths R4 and R4.
5, R1 and R2, hand HAS stepper S
It does not matter if they are carried in to T. However, in this case, the coater CO does not apply the resist.

Fourth Step (S012 to S011) In the fourth step, the alignment accuracy of the second step is used, and the deviation amount inspection mark formed on the wafer by being exposed in the second step and developed in the third step is used. And inspect.

A TTL off-axis type scope (LS) used for alignment as a mark observation scope.
Y, HM, MRA, CMY) is used. In order to send the inspection mark directly under the scope, the wafer WF is pre-aligned as in the second step (S0
12) and perform global alignment to accurately measure the position of the wafer with respect to the reticle (S01).
3). The measurement is performed by the step-and-repeat method from the first shot to the final shot (S014). The mark shape observed by the scope is as shown in FIG. FIG. 6 (E) shows the mark in the X direction, and Y
Directions are not shown. The shape and size of the mark are similar to those for alignment, and the image processing only adds an algorithm for measuring the inspection mark. Also,
No special optical system is required. The method of measuring the inspection mark will be described later.

FIG. 7 shows inspection marks formed in each shot of the wafer. As shown in the flow chart of FIG. 3, the inspection mark is measured by moving the stage in sequence from the first shot to the final shot (SB001), and at the beginning of each shot, the displacement amount measurement mark WPA (FIG.
The image of (A)) is captured by the CCD camera CMY, autofocus is performed by image processing, and the distance between the projection lens and the wafer is set to an optimum distance (SB002). Next, the deviation amount measurement mark is measured by image processing (SB003), and the measured value is stored in the control unit CU (S014).

The wafer for which measurement has been completed remains in the stepper until the following offset calculation is completed. The control from the first step to the fourth step is performed by the stepper control unit CU. Each device and the control unit CU are connected by a communication cable.

The control unit CU calculates and outputs, from the displacement amount measurement value accumulated in the device, the triple value 3σ of the variance σ which is the auto alignment accuracy and the offset which is the average value of the displacement measurement values. .. Here, if the 3σ value greatly exceeds the allowable range, a warning is issued to the operation terminal CS to notify the inspection worker (S02).
6). If the 3σ value is within the allowable range, it means that the process offset of the inspected wafer is normally detected (S
015).

Fifth Step (S016 to S023) In the fifth step, the actual element pattern is exposed on the preceding wafer used for the inspection by using the measured process offset and the like. The present invention intends to effectively utilize the preceding wafer as a product by this exposure.

When the process offset of the wafer is normally detected in S015, the process offset and rotation determined as the alignment error as a result of the measurement, and the magnification component are the calibration values of the global alignment as the control unit CU.
Is set to (S016, S017). The calibration values set in the control unit CU are M (process offset), Rotx
c (calibration value of X-axis rotation), Rotyc (calibration value of Y-axis rotation), Magxc (calibration value of X-axis magnification), Magyc
(Y axis magnification calibration value).

The alignment exposure of the actual element region is a value obtained by subtracting the calibration value input to the control unit CU from the stage movement correction amount obtained by the position measurement of the wafer displacement amount measurement shot. It is performed while correcting the step movement amount. By using this method, extremely high alignment accuracy can be obtained.

If there is no problem in the inspection result and the correct correction value is set for the preceding wafer whose measurement is completed first, the area of the masking blade is reset to the size of the actual element pattern area (S018), and the preceding wafer is set. The exposure of the actual element area of the wafer is started. At this time, the exposure time and the exposure focus are reset as the exposure parameters for the actual element area (S01).
9). This is because the inspected wafer is already immersed once in the developing solution, and therefore there is a change in the resist thickness called film reduction. The exposure time (exposure amount) is determined by the thickness of the resist. Then, there is a periodical relationship between the exposure amount and the resist thickness as shown by the curve E1 in FIG. Further, the refractive index (index) of the resist slightly changes due to the ingress of a developing solution or the like. Therefore, the exposure amount characteristic becomes, for example, a curve E2 in which the phase of the curve E1 is shifted. The best position of the exposure focus also changes with the change of the resist.

The exposure of all the shots to the actual element region is performed by correcting the previously determined stage step movement amount by the automatically measured value (S020). After the exposure of all shots is completed, the wafer is sent to the developing device DE by the collecting hand HAR (S021). Then, the wafer is collected at the wafer take-out position WEN through the transfer path R4 (S023). The second and subsequent wafers are sequentially exposed and developed by correcting the alignment measurement value with the already set alignment correction amount (S024).

If automatic measurement is not required for the second and subsequent wafers, S006 to S019, S025 and S in FIG.
The processing of 026 is unnecessary. However, S024 includes setting of exposure parameters for the actual element area (exposure time, exposure focus). This parameter is different from the exposure parameter that takes the film slip into consideration. Therefore, resetting is necessary.

When a problem occurs in the inspection (S015), the preceding wafer is retrieved from the stepper ST by the hand HAR. This wafer passes through the transfer paths R3 and R4 and is taken out at the wafer take-out position WEN without being developed by the developer DE. In this case, the second and subsequent wafers are not processed (S025). Moreover, the operator is notified by an alarm that the inspection has failed (S02
6).

A method of forming the deviation amount measurement mark will be described with reference to FIG. The wafer to be inspected is a wafer-side measurement mark W on the wafer substrate in the previous process in semiconductor manufacturing.
P is formed as shown in FIG. This mark forming method is the same as the alignment mark forming method. In this embodiment, the state where the resist RE is applied in the first step is as shown in FIG. In the second step, while the reticle and the wafer are aligned, the pattern drawn on the reticle is exposed on the resist layer. By being developed in the third step, the cross-sectional shape of the wafer becomes as shown in FIG. 6C or 6D, and the pattern on the reticle side is RP1, RP2 or RP3, RP4 on the wafer.
Is formed.

The image captured by the CCD camera in the fourth step of measuring the displacement amount is shown in FIG.
At the time of processing in U, the signal becomes a signal compressed in the long axis direction of the mark as shown in FIG.

The detection of the mark position and the calculation of the shift amount will be described. FIG. 6 (F) shows a signal compressed in the long axis direction of the mark. For the mark detection, the centers of the three marks are independently obtained one by one. The mark center RC from the wafer side mark center WC and the two reticle side mark centers R1 and R2

[0047]

## EQU1 ## RC = (R1 + R2) / 2

[0048]

## EQU2 ## E = RC-WC.

The sectional shape of the detection mark on the wafer is shown in FIG.
There are two possibilities, (C) and FIG. 6 (D). In the case where the resist is applied on the mark (FIG. 6D), an error is likely to occur in the determination of the mark center WC due to the influence of the resist interference or the asymmetry of the resist applying state. As the NA of the projection lens becomes higher, the depth of focus becomes shallower and the focus margin cannot be obtained.For the above reasons, it is desirable to use the type shown in FIG. ..

The above-mentioned process offset and alignment accuracy are determined by the following equation.

[0051]

[Equation 3]

In Equation 3, N is the total number of shots, E is the measured shift amount, M is the offset, and σ is the dispersion of alignment accuracy. The alignment evaluation of the inspected wafer is determined by 3σ. The value M is automatically input to the stepper as an alignment offset.

In the above description, the case where the reticle and the wafer are aligned with each other in the second step has been described, but this is not essential for the purpose of offsetting. It is also possible to store the measured deviation amount, perform exposure without performing alignment, and compare it with the automatic measurement value later. Further, when the alignment is performed, there may be an error in the driving amount. Also in this case, when the deviation amount is stored and later compared with the automatic measurement value, the offset correction error becomes small.

Autofocus (AF) by image processing
Will be described. The mark used for AF is a shift amount measurement mark, and is not a special mark devised for AF. Therefore, in order to obtain the most appropriate stage height, that is, the best focus, an evaluation function that quantifies the degree of blurring of an image by image processing using, for example, contrast is used. The best focus is determined by displacing the XY stage in the height direction, capturing an image, plotting the evaluation value of the evaluation function at that time in the control unit CU, and determining the height of the stage with the highest evaluation value. There is. By adding the AF mechanism, the measurement accuracy of the displacement amount measurement mark is improved, and the stability of the process offset measurement is increased.

By using this inspection process, the self-inspection of the reduction projection exposure apparatus is also possible. XY stage inspection, which was conventionally performed by vernier evaluation by inspection workers,
In the evaluation of the reduction projection lens and the inspection of the reticle rotation, all the steps of resist coating, exposure and inspection are replaced by the automatic inspection process shown in the present invention.

A method of calibrating the deviation amount measurement mark measurement value itself will be described with reference to FIG. In the automatic measurement, the measurement value itself of the displacement amount measurement mark can be calibrated by measuring a mark which is designed in advance so that the displacement amount becomes 0, that is, the calibration mark WPS. The calibration mark WPS is used for measuring the deviation amount measurement mark WPA when the deviation amount measurement mark is exposed on the inspection wafer.
It is desirable to expose at a position adjacent to. because,
This is because the conditions such as the resist coating state, shot elongation, and shrinkage are the most similar. The measurement of the calibration mark WPS is the same as the method of the displacement amount measurement mark described above. The measurement result is processed by the control unit CU, and the average value MC is obtained.

[0057]

[Equation 4]

Here, DC is the measurement value, N is the number of measurement shots, and this value MC is the calibration value. Therefore, the stroke offset in the deviation amount measurement is calibrated by the following equation.

[0059]

[Formula 5] Mof = M-MC

In this embodiment, the TTL off-axis method is used as the alignment scope for the non-exposure light, but the off-axis scope OE may be used. Further, although the mark shape is similar to the alignment mark, the shape is not limited as long as it can be used as an image to test the deviation amount. Further, the wafer alignment marks WMR, WMR and the reticle alignment mark RM
In some cases, such as when R and RMR are not used in the subsequent steps, these alignment marks can be used as the inspection marks.

[0061]

[Embodiment 2] A method of exposing a displacement amount measurement mark without using a masking blade will be described with reference to FIGS. In the second embodiment, the exposure process is performed by using the exposure light alignment scope. Therefore, as shown in the flowchart of FIG. 9, the second step is different from the first step (S005 to S008). Processing of S10
The process is changed to the processes of 5 to 108, and the process of masking blade resetting (S018) in the fifth step is removed. The exposure light alignment does not require correction of chromatic aberration in the lens, and since the wafer can be observed through the reticle, it is easy to measure the relative displacement between the wafer and the reticle.

In the second step of alignment, alignment light is drawn from the illumination system IL into the scope by the optical fiber OFB. The scope is the shutter SHC,
Diffuser DP, beam splitter BS, roof prism DA
P and mirrors AMR, AML, etc. The light drawn into the scope is first opened / closed by the shutter SHC. This shutter SHC opens during alignment. The light passing through the shutter SHC is diffused by the diffusion plate DP to remove speckles, and the beam splitter BS
It is divided into left and right by the Dach prism DAP. The light on the right side is reflected by the mirror AMR and illuminates the projection lens LN. The light passing through the projection lens LN reaches the wafer WF and illuminates the wafer mark WMR. The light reflected by the wafer WF follows the same optical path in the opposite direction to illuminate the reticle mark RMR, and the roof prism DAP and the beam splitter BS.
It passes through and reaches the CCD camera CM. As a result, the images of the wafer mark WMR and the reticle mark RMR are formed on the CCD camera CM. The images of the wafer mark WML and the reticle mark RML on the left side are similarly formed on the CCD camera CM. The alignment image at that time is shown in FIG. Wafer alignment measures multiple shots within the wafer,
This is performed by global alignment (S105).

The exposure light alignment light can expose the resist. In this embodiment, the scope is used to expose only a very small area. Mirror AML, AM
R position is the reticle side deviation amount mark (RPR, RPL)
To the top (S106). The situation is shown in FIG. Since the mirror AMR is on the deviation amount measurement mark RPR on the reticle side, the exposure light illuminates the mark RPR by opening the shutter SHC, and the deviation amount mark WPR on the wafer.
Is overlaid and exposed. At this time, the shutter SH
Exposure parameters such as time for opening C and exposure focus are set (S107). The stage step movement corrected by the global alignment is performed, and the exposure by the scope is sequentially performed for all shots (S10).
8).

The development and the measurement of the shift amount are performed in the same idea as in the first embodiment. Left and right within the shot when exposed with a scope
Marks are formed at the places. Therefore, in the measurement by the TTL off-axis scope, the left and right marks are measured by combining the stage movement. If two right and left positions can be measured within a shot, there is an advantage that a shot rotation error and a shot magnification error can also be measured.

The handling as the preceding wafer is the same as the handling of the second and subsequent wafers. An off-axis scope OE may be used for measurement.

[0066]

Third Embodiment In contrast to the second embodiment, a method of performing mark measurement with non-exposure light will be described. In this case, when measuring the mark,
The non-exposure light source LSN is used for the exposure light scope of the second embodiment. As the light source LSN, for example, a HeNe laser can be used. Further, since it is necessary to correct chromatic aberration, a correction optical system OHO is inserted. Further, a second shutter SHN is arranged, and the light source is switched by opening / closing the shutters SHC and SHN. For the measurement, the camera CM is used to measure the displacement amount mark. A window for observing the exposed and developed mark WPA is prepared on the reticle. The image processing algorithm, the image autofocus, and the like are performed according to the same idea as in the first embodiment, and the measurement results are reflected in the exposure apparatus according to the same idea as in the first embodiment.

[0067]

Fourth Embodiment Although the alignment method of the first, second, and third embodiments has been described using global alignment, it can also be used to measure the amount of deviation of die-by-die alignment in which exposure is performed while aligning the wafer and reticle for each shot.

In the case of die-by-die alignment, exposure light alignment of a TTL on-axis scope is used for alignment. After the amount of displacement between the reticle and the wafer is measured, the reticle is finely moved for exposure. At this time, if the exposure area is limited to the displacement amount measurement mark by the masking blade, the actual element pattern area is not exposed. In this case, the correction value reflected in the exposure apparatus is the alignment offset M. Regarding the measurement, the method of Example 1 and Example 3 is used.

[0069]

As described above, according to the present invention,
Since the semiconductor manufacturing line including the automatic measurement system was composed of a stepper that is an exposure device and peripheral devices such as a coater and a developer, the measurement accuracy is improved compared to the wafer inspection work that is conventionally performed by humans. , Effective in shortening the inspection time. As a result, the inspection conditions and the stability of accuracy can be maintained. Further, by limiting the exposure area of the preceding wafer and shielding the actual element area from light, damage to the preceding wafer due to the inspection can be eliminated. In addition, the exposure parameters for inspection and the exposure parameters for actual element exposure in consideration of resist film slip etc. are provided in order to cope with the change in the resist due to one-time development. 2 to respond
Since the mechanism for resetting the exposure parameters of the actual element regions on and after the first wafer was used, wafer production including inspection could be realized in one operation.

Therefore, the present invention is effective in improving the efficiency of semiconductor manufacturing. Further, since the accuracy of measurement of the process offset is improved, highly accurate alignment can be realized in the semiconductor manufacturing with the stepper, which is effective in improving the yield of semiconductor manufacturing.

[Brief description of drawings]

FIG. 1 is a diagram showing an overall configuration of a semiconductor manufacturing apparatus according to an embodiment of the present invention.

2 and 3 are flowcharts showing the procedure of an automatic inspection process in the apparatus of FIG.

FIG. 4 is a diagram showing a positional relationship between a masking blade, a reticle, and a wafer when exposing a deviation amount measurement mark.

FIG. 5 is an explanatory diagram of a masking blade.

6A and 6B are diagrams showing a method of creating a measurement mark, an image of the mark, and a signal waveform.

FIG. 7 is a diagram showing measurement marks and calibration marks in a shot.

FIG. 8 is a diagram showing a relationship between a resist thickness and an optimum exposure amount (exposure time).

FIG. 9 is a flowchart showing the procedure of the second embodiment.

FIG. 10 is a diagram showing an alignment image.

FIG. 11 is a diagram showing exposure of a deviation amount mark using an exposure light alignment scope.

[Explanation of symbols]

XYS: XY stage, HAS: Wafer supply hand,
WF: Wafer, HAR: Wafer collection hand, LN:
Reduction projection lens, OE: Off-axis scope, R
T: reticle, WST: wafer set table, I
L: exposure light source, WEN: wafer receiving table, CU:
Control unit (control device), RP: Reticle side displacement amount measurement mark, CS: Console, WP: Wafer side displacement amount measurement mark, OFB: Optical fiber, M
B: Masking blade, CM: CCD camera, C
MY: CCD camera, CO: coater (resist coating device), WPA: deviation amount mark, DE: developer (developing device), WPS: calibration mark.

Claims (13)

[Claims] 1. A stepper, which is supplied with a resist-coated wafer and sequentially exposes a pattern of a reticle to each shot on the wafer while step-moving the wafer, wherein the wafer and the reticle are positionally positioned. An alignment means for aligning, an exposure means capable of exposing by limiting the exposure area of each shot to the area of the first inspection mark formed on the reticle, and a developer for developing the exposed wafer, Mark detection means for detecting marks formed on the wafer, and when processing the inspection wafer coated with the resist, first align the inspection wafer with the stepper,
The exposure area of each shot is limited to the area of the first inspection mark and sequentially exposed, and then developed by the developer, and further, the mark detection means forms a first area formed on the inspection wafer in advance. The amount of deviation between the second inspection mark and the developed first inspection mark is measured, and the process offset is detected based on the measured value and set in the stepper,
The exposure region of the stepper is set to the actual element region, and then the exposure parameter is changed to the parameter for the inspection wafer, and the actual element pattern of the reticle is sequentially exposed on the inspection wafer to expose the inspection wafer. A semiconductor manufacturing apparatus comprising: a control unit for returning the exposure parameter of the stepper to a parameter for a wafer for manufacturing a product after completion, and automatically measuring and setting a process offset of the stepper. 2. The apparatus according to claim 1, wherein the mark detecting means shares the alignment mark detecting means of the alignment means in the stepper. 3. The apparatus according to claim 2, wherein the stepper and the developer are arranged in series with a coater for applying a resist on a wafer to form a semiconductor manufacturing line. 4. The apparatus according to claim 1, wherein the alignment means uses an off-axis alignment scope. 5. The apparatus according to claim 1, wherein the alignment means performs global alignment. 6. The apparatus according to claim 1, wherein the inspection wafer is selected from product manufacturing wafers of the same lot, and is processed prior to other product manufacturing wafers. 7. A semiconductor manufacturing line in which a coater, a stepper, and a developer are arranged in series, and a first step of applying a resist to a wafer for inspection by a coater, and aligning the wafer with the stepper to expose an exposure region with a reticle. A second step of sequentially exposing only the areas of the inspection marks formed on the wafer, a third step of developing the inspection marks exposed on the wafer by the developer, and returning the wafer to the stepper. A fourth step of measuring a deviation amount between the inspection mark formed in advance and the developed inspection mark, and a process offset is detected based on the deviation amount measurement value and set in the stepper to set an exposure area. The fifth step of setting in the actual element region, and changing the exposure parameters to the parameters for the inspection wafer and reticking the inspection wafer 6 step of returning the exposure parameter of the stepper to the parameter for the product manufacturing wafer after the exposure of the inspection wafer is completed, and the step offset is automatically measured. A semiconductor manufacturing method characterized by setting. 8. The stepper has an alignment mechanism capable of measuring and aligning an alignment mark composed of a pattern on a wafer by using an image processing method, and performing the displacement amount measurement in the fourth step, A deviation formed by a resist pattern which is a pattern of the first inspection mark printed on the wafer while aligning the wafer in the second step, and a pattern of the second inspection mark which is previously formed on the wafer. The method according to claim 7, which is performed by measuring a quantity measurement pattern by the alignment mechanism. 9. The stepper has an alignment mechanism capable of measuring and aligning an alignment mark composed of a pattern on a wafer and a pattern on a reticle by using an image processing method, and the stepper has an alignment mechanism. The amount of deviation is measured by aligning the wafer in the second step with the resist pattern, which is the pattern of the first inspection mark printed on the wafer, and the second inspection mark previously formed on the wafer. The method according to claim 7, which is performed by measuring a displacement amount measurement pattern constituted by a pattern by the alignment mechanism. 10. The stepper is provided with a mechanism capable of varying an exposure area, and when exposing the first inspection mark pattern, the exposure is limited to a portion of the inspection mark by the mechanism capable of varying the exposure area, and other than the inspection mark. 10. The method according to claim 8 or 9, wherein the area is not exposed. 11. The stepper is provided with an exposure light alignment scope, and when exposing the first inspection mark pattern, the exposure light alignment scope is used to limit the exposure to only the portion of the inspection mark and to provide an area other than the inspection mark. 10. The method according to claim 8 or 9, wherein is not exposed. 12. The stepper, when measuring the deviation amount using the image processing method, obtains the blur condition of the deviation amount measurement pattern of the measurement shot by image processing and adjusts the height of the wafer to a position where the blur is smallest. The method according to claim 8 or 9, comprising an autofocus mechanism. 13. The method according to claim 9, wherein the illumination light of the alignment mechanism can be switched between exposure light and non-exposure light.