JPH066335A - Pseudo synchronization prevention method for high efficiency voice transmission - Google Patents

Abstract

PURPOSE:To keep the transmission quality of high efficiency voice transmission without detection of a pseudo synchronizing signal by correcting a coded signal at a phase of a detection synchronizing signal when a detection synchronizing signal from a coding signal and an inserted synchronizing signal are dissident. CONSTITUTION:A synchronization detection section 31 detects a synchronizing signal from a coding signal and outputs a synchronization phase signal. The synchronization phase signal is compared with a correct synchronization phase signal inserted by a coding means 1 at a phase comparator section 32. When the phase of the synchronization phase signal detected by the detection section 31 has the same phase as the correct synchronization phase signal, no code is outputted from the comparator section 32. If the phase of the detected synchronization phase signal is different from the phase of the correct synchronization phase signal, the comparator section 32 outputs the code at the phase of the detected synchronization phase signal. The coded signal is inputted to a code correction section 33 and subject to code correction with the phase of the synchronizing signal detected by the detection section 31 by referencing the synchronization phase signal outputted from the detection section 31 and the output signal of the comparator section 32 and the result is sent to a transmission line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pseudo-synchronization preventing method for preventing decoding on the receiving side of high-efficiency voice transmission in synchronization with an erroneous synchronization signal, that is, a pseudo-synchronization signal. The present invention relates to a method for preventing pseudo synchronization, in which pseudo synchronization does not occur at the receiving side.

In high-efficiency voice transmission, the transmitting side encodes the voice feature by extracting it, for example, at regular intervals and sends it out. At the receiving side, the reception signal is encoded at regular intervals, which is the reverse of the encoding. After processing, decoding is performed and an audio signal is reproduced.
Therefore, it is necessary to match the start and end of a fixed cycle for decoding, that is, to perform decoding in synchronization.

Further, in encoding in high-efficiency voice transmission, the code in a frame does not simply have voice amplitude information, but the voice envelope information and the voice frequency component in predetermined bit units. Have information Therefore, if the decoding is performed using the pseudo sync signal, the voice is reproduced due to an incorrect combination of information, and the reproduced voice is completely different from the input voice of the transmitting side, and accurate voice information cannot be transmitted. However, there is a problem in that the recipient hears what is called noise, which is very uncomfortable.

Therefore, there is a demand for the development of a technique capable of maintaining the transmission quality of high-efficiency voice transmission without synchronizing any pattern of the voice signal with the pseudo synchronization signal.

[0005]

2. Description of the Related Art There are several methods for transmitting a synchronizing signal. The first is a method of transmitting a synchronization signal through a line different from the line for transmitting the encoded voice signal. This method is further classified into a method of transmitting by a physically different line and a method of transmitting by a physically same line but separately from an audio signal. Either way,
The sync signal is not disturbed by the encoded voice signal, but since different lines are required, the utilization efficiency of the lines is reduced, which defeats the original purpose of high-efficiency voice transmission. The second is a method in which a synchronization signal is inserted into an encoded audio signal and transmitted, and the reception side detects the synchronization signal. With this method, the line utilization efficiency can be increased, but if the same pattern as the sync signal occurs in the encoded voice signal, there is a risk of mistakenly detecting this as the sync signal and decoding. There is a nature.

FIG. 12 is a diagram showing a conventional method of preventing pseudo sync when inserting a sync signal into an audio signal and transmitting the same. In FIG. 12, 1 is an encoding means, 2 is a synchronizing signal generating means, and 1 and 2 constitute a transmitting side of a high-efficiency voice transmitting apparatus.

Conventionally, a pattern which is considered to have a low probability of occurrence in an encoded voice signal is selected as a synchronization signal, outputted from the synchronization signal generating means 2 and inserted into the voice signal encoded in the encoding means 1. In this way, pseudo synchronization is prevented on the receiving side.

However, since a voice having an arbitrary waveform is input to the encoding means 1, an arbitrary pattern is generated in the output signal of the encoding means. On the other hand, the synchronization signal to be inserted into the encoded voice signal has a fixed pattern that is unlikely to occur in the voice signal. Therefore, there is a possibility that the same pattern as the sync signal will occur in the encoded audio signal, and it is impossible to completely avoid decoding in synchronization with this pseudo sync signal. .

[0009]

If the decoding is performed in synchronization with the pseudo sync signal, as described above, accurate voice information transmission becomes impossible and the receiver receives a large amount of noise. There is a problem in that the transmission quality is deteriorated, for example, by listening to.

It is an object of the present invention to provide a pseudo sync prevention method capable of maintaining the transmission quality of high-efficiency voice transmission without detecting a pseudo sync signal for any pattern of a voice signal. To do.

[0011]

FIG. 1 is a diagram showing the principle of the present invention. In FIG. 1, 1 is an encoding means, 2 is a synchronizing signal generating means, 3 is a code correcting means, and 1 to 3 constitute a transmitting side.

The input voice is encoded by the encoding means 1 with the output of the synchronizing signal generating means 2 as a phase reference,
At the same time, a synchronization signal is inserted (the encoded signal into which the synchronization signal is inserted is abbreviated as an encoded signal). This coded signal is input to the code correction means 3, and the synchronization signal is detected in the code correction means. The detected synchronizing signal and the synchronizing signal inserted by the encoding means 1 are phase-compared,
If they do not match, the code of the encoded signal is corrected with the detected phase of the synchronization signal, and the encoded signal is sent to the transmission path.

[0013]

The correct sync signal is always supplied from the sync signal generating means 2 to the coding means 1 as a reference for coding and is inserted into the audio signal. Therefore, whether or not the synchronization signal detected by the code correction means 3 is a correct synchronization signal can be determined by comparing the phase of the synchronization signal inserted by the encoding means 1 with the detected synchronization signal. As a result, when the phase of the detected synchronization signal is different from the phase of the inserted synchronization signal, the code of the encoded signal is corrected and transmitted at the phase of the detected synchronization signal. Does not include a pattern that can be a pseudo sync signal.

Therefore, there is no possibility of degrading the transmission quality of high-efficiency voice transmission, such as decoding on the receiving side in synchronization with the pseudo-synchronization signal and generating large noise in the reproduced voice.

[0015]

FIG. 2 is a diagram showing an embodiment of the present invention. In FIG. 2, reference numeral 1 is an encoding means and 2 is a synchronizing signal generating means, which are the same as those in FIG.

Reference numeral 31 is a synchronization detector, 32 is a phase comparator, and 3 is a phase detector.
Reference numeral 3 is a code correction unit, and the code correction means 3 is constituted by 31 to 33. The synchronization detector 31 detects the synchronization signal from the encoded signal and outputs a synchronization phase signal indicating the phase of the synchronization signal. . The detected synchronization phase signal is input to the phase comparison unit 32 and compared with the correct synchronization phase signal indicating the phase of the synchronization signal inserted by the encoding means 1.

If the sync phase signal detected by the sync detector 31 has the same phase as the correct sync phase signal, no code is output from the phase comparator 32. If the detected synchronization phase signal is out of phase with the correct synchronization phase signal, the phase comparison unit 32 outputs a code at the phase of the detected synchronization phase signal.

The coded signal is also input to the code correction section 33, and the sync phase detected by the sync detection section 31 is referred to with reference to the output signal of the phase comparison section 32 and the sync phase signal output from the sync detection section 31. The phase of the signal undergoes code modification and is sent to the transmission line.

As described above, when the transmitting side detects the same pattern as the synchronizing signal in the voice signal, it is corrected to a pattern different from the synchronizing pattern and is sent out. Therefore, on the receiving side, the synchronization inserted by the transmitting side is synchronized. No signal other than the signal is detected as the synchronization signal.

FIG. 3 is an example of a circuit configuration for realizing the embodiment of the present invention. In FIG. 3, reference numeral 1 is an encoding unit, 2 is a synchronization signal generating unit, and 31 is a synchronization detection unit, which are the same as those in FIG.

Reference numerals 321 and 322 denote first and second differentiating circuits,
Reference numeral 323 denotes a reset-priority set / reset flip-flop circuit, and the phase comparison unit 32 is constituted by 321 to 323.

331 is a first AND circuit, 332 is a code correction circuit, and 331 and 332 constitute the code correction section 33. 4 and 5 are time charts of the circuit configuration of FIG. 3, FIG. 4 shows an operation when there is no pattern detected as a pseudo sync signal, and FIG. 5 shows an operation when a pseudo sync signal is detected. The operation of the circuit configuration shown in FIG. 3 will be described below with reference to FIGS.

In FIG. 4, a coded signal is formed by inserting a predetermined number of frame signals F into a code of a predetermined number of audio signals. The frame signal F has the same phase as the synchronization signal generated by the synchronization signal generating means 2 and also has the same phase as the synchronization phase signal output by the synchronization signal generating means 2.

In the case of FIG. 4, since there is no pattern detected as a pseudo sync signal in the audio signal portion of the encoded signal, the output signal of the sync detector 31 has the same phase as the correct sync phase signal. is there.

The first differentiating circuit 321 outputs a narrow pulse whose phase coincides with the falling edge of the correct synchronization phase signal, and the pulse is set / reset by this pulse.
The flip-flop circuit 323 is set. The second differentiating circuit 322 generates a narrow pulse whose phase coincides with the falling edge of the detected synchronous phase signal, and the set / reset flip-flop circuit 32 is generated by this pulse.
Reset 3. In this case, since the correct sync phase signal and the detected sync phase signal have the same phase, the phases of the set pulse and the reset pulse match, and reset priority is given, so the set / reset flip-flop circuit No code is generated in the mismatch signal of the output of 323.

Therefore, the correction signal determined by the logical product signal of the output of the set / reset flip-flop circuit 323 and the output of the synchronization detection unit 31 which is output from the first logical product circuit 331 does not generate any sign, and the sign is corrected. The circuit 332 outputs the encoded signal as it is without modifying the code.

Next, in the voice signal portion of the encoded signal,
The operation when a signal having the same pattern as the pattern of the frame signal F shown in A and B is generated and the synchronization phase signal is detected as a result of the synchronization detection will be described with reference to FIG.

In the case of FIG. 5, since the detected synchronous phase signal and the correct synchronous phase signal have different phases, the phases of the output codes of the two differentiating circuits 321 and 322 are different and set only for the time corresponding to the phase difference. The mismatch signal, which is the output signal of the reset flip-flop circuit 323, outputs a sign.

When this non-coincidence signal and the detected synchronous phase signal are input to the logical product circuit 331, a correction signal having a sign in the same phase as the detected synchronous phase signal is obtained at the output of the logical product circuit 331. . This correction signal is input to the code correction circuit 332, the codes A and B of the coded signal are corrected to A ′ and B ′ at the detected phase of the synchronization phase signal, and the coded signal is transmitted.

The reason why the detected sync phase signal is not directly used as the correction signal is that the code correction is not performed when the correct sync phase signal is detected by the sync signal detecting section 31. is there.

The code correction circuit 332 can be composed of an exclusive OR circuit, an OR circuit, and an AND circuit. The first example of realizing the code correction circuit is an exclusive OR circuit.

The exclusive OR circuit outputs "0" when two input signals are "1" and outputs "1" when one input signal is "1". Therefore, when the exclusive OR circuit is applied to the code correction circuit, the code of the correction signal is always "1" in the phase of the code of the synchronization detection signal, so if the coded signal to be corrected is "1", Invert to "0", and to "1" if it is "0".

A second example of realizing the code correction circuit is an OR circuit. One input code of the OR circuit is "1"
In that case, the output code is always "1". Therefore, if the OR circuit is applied to the code correction circuit, the code to be corrected of the encoded signal is always corrected to "1".

FIG. 6 shows a third example of the code correction circuit in which the exclusive OR circuit and the AND circuit are combined. In FIG. 6, 3321 is an exclusive OR circuit, and 3322 is an AND circuit. In FIG. 6, the encoded signal is input to the exclusive OR circuit 3321 and the logical product circuit 3322, and the correction signal is input to the exclusive OR circuit 3321. The logical product signal of the output signal of the exclusive OR circuit 3321 and the encoded signal is transmitted.

The exclusive logic circuit 3321 inverts the sign as described above. Therefore, in the phase of the code to be corrected, the output signal of the exclusive OR circuit 3321 and the coded signal are in an inverse relationship with each other, and in the output of the AND circuit 3322, that is, the output of the code correction circuit 332, The code to be corrected is always "0".

FIG. 7 is a fourth example of the code correction circuit having the same function as the circuit configuration of FIG. In FIG. 7, 3
322 is a logical product circuit, and 3323 is a logical inversion circuit.
In FIG. 7, the modified signal is inverted by the logical inversion circuit 3323 and input to the logical product circuit 3322, and the logical product operation with the encoded signal is performed.

In the normal phase, the sign of the correction signal is "0".
Therefore, the encoded signal is output as it is from the output of the AND circuit 3322. On the other hand, in the phase of the sign of the synchronization detection signal, the sign of the correction signal is “1”, and the logic is inverted and “0” is applied to the AND circuit 3322.
The encoded signal of the corresponding phase is always corrected to "0".

The codes A and B in FIG. 5 cause pseudo-synchronization on the receiving side and make it impossible to reproduce voice.
Since it is a code obtained by encoding voice originally, it is desirable to correct and transmit this code as little as possible from the viewpoint of accurate transmission of voice signals.

"1" in the encoded voice signal,
Since the probability of occurrence of "0" is about 50% each, pseudo-synchronization is prevented by applying a logical sum circuit to the code correction circuit or the circuits of FIGS. Therefore, there is an advantage that the number of codes to be corrected can be halved.

FIG. 8 shows a second example of the circuit configuration for realizing the embodiment of the present invention. In this example, the chance of code correction is reduced and pseudo synchronization is prevented. Figure 8
, 1 is encoding means, 2 is synchronization signal generating means, 3
Reference numeral 1 denotes a synchronization detector, which is the same as that shown in FIG. Also, 321,
322 is a differentiating circuit, 323 is a set / reset flip-flop circuit, 331 is a first logical product circuit, and 332 is a code correction circuit, which is the same as in FIG.

Further, 324 is a frequency dividing circuit and 325 is a second AND circuit. Then, the phase comparison unit 32 is configured by 321 to 325. FIG. 9 is a time chart of the circuit configuration of FIG. The operation of the circuit configuration of FIG. 8 will be described below with reference to FIG.

The coded signal is a voice signal and a frame signal F.
The audio signal includes patterns A, B, C, and D that are detected as synchronization signals. The correct sync phase signal, the detected sync phase signal, the two differential outputs, and the disagreement signal which is the output signal of the set / reset flip-flop circuit are the same as those in FIG.

The frequency division output is obtained by inputting the correct synchronization phase signal to the frequency division circuit 324. FIG. 9 exemplifies a case where the frequency is divided into 1/2. In the logical product signal of the output signal of the frequency dividing circuit 324 and the mismatch signal output from the set / reset flip-flop circuit 323, which is obtained by the second logical product circuit 325, the frequency dividing signal is one cycle of the correct synchronization phase signal. Since it occurs every other period, a code is generated every other period of the disagreement signal. Therefore, the correction signal indicating the phase to be code-corrected, which is determined by the logical product of the output signal of the second AND circuit 325 and the detected synchronous phase signal, also takes the sign of the detected synchronous phase signal every other cycle. Will be things. With this correction signal, a code A that becomes a pseudo synchronization signal in the encoded signal
When D to D are modified, in the case of FIG. 9, A and C are modified to A ′ and C ′, and B and D are sent without modification. Therefore, the opportunity for correction is halved, and the error code as a voice signal due to code correction is halved. In this configuration, if the OR circuit or the circuit of FIG. 6 is applied as the code correction circuit, the error code as the voice signal by the code correction becomes 1/4.

In high-efficiency voice transmission, one frame of voice signal is often composed of 256 bits, and 1 to 2 bits are assigned to the frame signal. Here, assuming the 2-bit allocation, the error rate of the speech signal due to code modification will be examined.

First, when all the signs of the pseudo sync signal are corrected, 2 ÷ (2
56-2), that is, an error rate of about 7.8 × 10 ⁻³ .
If the fixed code of “1” or “0” is substituted, the probability of occurrence of “1” and “0” in the voice signal is about 50%, so it is improved to about 3.9 × 10 ⁻³ , and further 1 If the fixed code is replaced every frame, it is halved, about 2
It becomes × 10 ^-3 .

In high-efficiency voice transmission, the envelope information and frequency information of encoded voice are decoded on the receiving side by integration processing, so that a 1-bit error is immediately decoded as a voice amplitude error. Therefore, the deterioration of the transmission quality due to the bit error is not significant. In fact, if the error rate is in the order of 10 ^-3 , it is unlikely to be perceived as sound quality deterioration, and particularly if it is about 2 × 10 ^-3 or less, there is no problem in practical use.

On the other hand, when decoding is performed in synchronization with the pseudo sync signal, the reproduced voice becomes completely different from the input voice,
Since the voice transmission itself becomes impossible, the effect of the pseudo synchronization prevention method according to the present invention is great.

Further, it is possible to set the frequency division ratio to 3 or more, and in this case, the number of codes for code correction is still reduced.
In the embodiment of FIG. 8, the correct sync phase signal is divided, but the same function can be realized by dividing the detected sync phase signal.

FIG. 10 shows a third example of the circuit configuration for realizing the embodiment of the present invention. The third example also reduces the chances of code modification and reduces the number of codes modified to prevent false synchronization.

In FIG. 10, reference numeral 1 is an encoding means, 2 is a synchronizing signal generating means, and 31 is a synchronization detecting section, which are the same as those in FIG. Also, 321, 322 are first and second differentiating circuits, 3
23 is a set / reset flip-flop circuit, 33
1 is a first AND circuit, 332 is a code correction circuit, and FIG.
Is the same as

Reference numeral 333 denotes a frequency dividing circuit, which is the same as the frequency dividing circuit 324 in FIG. 8 in terms of circuit configuration. And 331 to 33
3, the code correction unit 33 is configured. The frequency division ratio is exemplified as 2.

FIG. 11 is a time chart of the circuit configuration of FIG. The process from the correct sync phase signal to the output signal of the set / reset flip-flop circuit is the same as in FIG.

In the circuit configuration of FIG. 10, the frequency difference circuit 333 frequency-divides the mismatch signal which is the output signal of the set / reset flip-flop circuit 323. Therefore, the logical product signal of the divided signal, the mismatch signal, and the synchronization detection signal is
A code is generated every other cycle of the synchronization detection signal, and the chance of code correction is halved.

In the above description, as a code correction method,
Although the simplest method of sign inversion and replacement with a fixed code has been described, for example, a method of replacing with a pseudo-random signal can be easily implemented. Further, although the above-mentioned method is a correction method independent of the voice signal, it is possible to retransmit the code preceding the code to be corrected, replace the result of the operation of a plurality of the preceding codes with the code, etc. Code-dependent correction methods may also be implemented.

[0055]

As described above, according to the present invention, in the high-efficiency voice transmission, no matter what pattern the coded voice signal occurs, the pattern detected as the synchronization signal at the transmitting side and the receiving side is generated. As a result of the correction and transmission, the receiving side always detects and synchronizes the synchronizing signal inserted at the transmitting side, so that it is possible to realize stable and high-efficiency voice transmission without noise generation due to pseudo synchronization.

[Brief description of drawings]

FIG. 1 is a diagram showing the principle of the present invention.

FIG. 2 is a diagram showing an embodiment of the present invention.

FIG. 3 is an example of a circuit configuration that realizes an embodiment of the present invention.

4 is a time chart of the circuit configuration of FIG. 3 (without pseudo sync signal)

5 is a time chart of the circuit configuration of FIG. 3 (detecting a pseudo sync signal)

FIG. 6 is a third example of the code correction circuit.

FIG. 7 is a fourth example of the code correction circuit.

FIG. 8 is a second example of a circuit configuration that realizes an embodiment of the present invention.

9 is a time chart of the circuit configuration of FIG.

FIG. 10 is a third example of the circuit configuration for realizing the embodiment of the present invention.

11 is a time chart of the circuit configuration of FIG.

FIG. 12 is a diagram showing a conventional synchronization method.

[Explanation of symbols]

 1 Encoding Means 2 Synchronous Signal Generating Means 3 Code Correcting Means 31 Synchronization Detection Units 32 Phase Comparing Units 33 Code Correcting Units

Claims (6)

[Claims] 1. On the transmitting side, by means of an encoding means (1),
Pseudo-synchronization prevention method for high-efficiency voice transmission in which voice is encoded, and a code pattern having a low occurrence probability as a voice signal is inserted as a synchronization signal into the encoded voice signal by the synchronization signal generation means (2) and transmitted. In the above, the code correction means (3) detects a signal indicating a synchronization phase from the encoded signal in which the synchronization signal is inserted in the encoded voice signal, and outputs a signal indicating the detected synchronization phase and a signal indicating the correct synchronization phase. Phase comparison is performed, and if the phase of the signal indicating the detected synchronization phase differs from the phase of the signal indicating the correct synchronization phase, the code of the encoded signal is corrected and sent with the phase of the signal indicating the detected synchronization phase. A method for preventing pseudo-synchronization in high-efficiency voice transmission, characterized by: 2. The high-efficiency voice transmission pseudo-synchronization preventing method according to claim 1, wherein the code of the encoded signal is inverted at the phase of the signal indicating the detected synchronization phase and is transmitted. Pseudo-synchronization prevention method for voice transmission. 3. The method for preventing pseudo-synchronization of high-efficiency voice transmission according to claim 1, wherein the code of the encoded signal is replaced with a fixed code at the detected phase of the signal, and the signal is transmitted. A method for preventing pseudo sync in high-efficiency voice transmission. 4. The method for preventing pseudo-synchronization of high-efficiency voice transmission according to claim 1, wherein when the signal indicating the detected synchronization phase is continuously generated over a plurality of frames, A method for preventing pseudo-synchronization in high-efficiency voice transmission, characterized in that the code of a coded signal is corrected every other frame in phase and transmitted. 5. The pseudo-synchronization preventing method for high-efficiency voice transmission according to claim 2, wherein the sign inversion at the phase of the detected synchronization phase signal is performed every other frame. How to prevent synchronization. 6. The method for preventing pseudo-synchronization of high-efficiency voice transmission according to claim 3, wherein the phase of the detected sync phase signal is replaced with a fixed code.
A method for preventing pseudo-synchronization of high-efficiency voice transmission, which is performed every other frame.