JPH066331Y2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a liquid crystal display device including liquid crystal cells arranged in a matrix.

[Conventional technology]

In general, a liquid crystal display device including liquid crystal cells arranged in a matrix has Y electrode lines as a plurality of signal electrode lines and a plurality of scanning electrode lines provided orthogonally so as not to contact each Y electrode line. Of the X electrode line and the intersections of the Y electrode lines and the X electrode lines, and the drains and gates are connected to the Y electrode lines and the X electrode lines forming the intersections, respectively, and arranged in a matrix. Common to the lower electrode substrate which is one substrate provided with a plurality of thin film transistors (hereinafter referred to as TFTs), the upper electrode substrate which is the other substrate provided with the transparent common electrode of each TFT, and the source of each TFT It is composed of a plurality of liquid crystal cells provided between the electrodes and arranged in a matrix and held between both substrates.

Then, the video signal is sampled and held by a predetermined sampling clock, and the video signal for one continuous horizontal scan is converted into a parallel video signal of the number of each Y electrode line and output in synchronization with the horizontal synchronizing signal. With a drive circuit including a sample hold unit and a shift register that outputs scanning pulses to each X electrode line in sequence in synchronization with a horizontal synchronizing signal to turn on each TFT whose gate is connected to each X electrode line. The liquid crystal display device described above is driven, and each T for each X electrode line in the ON state is
The parallel video signal from the sample and hold unit is input to each liquid crystal cell via the FT, and each liquid crystal cell is driven.

That is, as shown in FIG. 5, the gate of the TFT (Tr)
A scanning pulse is input to the (G) from the shift register through the connection terminal (1) connected to the X electrode line, and the TFT
(Tr) is turned on, and the parallel video signal from the sample hold unit is input to the liquid crystal cell (LC) via the connection terminal (2) connected to the Y electrode line, the drain (D), and the source (S). The voltage of the parallel video signal is held in the liquid crystal cell (LC) and the liquid crystal cell (LC) is driven until the TFT (Tr) is turned off and then turned on again.

By the way, a normal TFT, especially a MOSFET which is an insulated gate type TFT is characteristically divided into a depletion type and an enhancement type, and the V _GS -R _DS characteristics of the depletion type and the enhancement type TFT are shown in FIGS. 6 and 7, respectively.
As shown in the figure. Here, V _GS is the gate-source voltage, R _DS is the drain-source resistance, R _ON is the on-resistance, the value of R _DS at V _GS = 0, V _P is the pinch-off voltage, It becomes a negative voltage.

When a depletion type TFT having the characteristics shown in FIG. 6 is turned on, as shown in FIG. 8 (a), the gate potential of the gate (G) of the TFT (Tr) is the same as that of FIG. With V _C as the one-dot chain line in (a) as the reference voltage, the voltage level changes in the range of the maximum voltage V _V to the minimum voltage V _V ′ (= 2V _C −V _V ). If such a voltage, that is, a voltage V _H equal to or higher than the maximum voltage V _{V of the} video signal is applied, the TFT (Tr) is turned on, and the parallel video signal obtained by sampling the video signal is the liquid crystal cell (LC ) And turn it off in the opposite direction, (a) in the figure.
As shown in, the gate-source voltage V _GS of the TFT (Tr)
The TFT (T voltage V _L as but equal to or less than the pinch-off voltage V _P
When added to the gate (G) of r), the TFT (Tr) is turned off.

At this time, the TFT (Tr) structurally has a gate (G) and a source (S).
There is always a parasitic capacitance between them. For example, the equivalent circuit when the depletion type TFT (Tr) is on is as shown in Fig. 8 (b). In Fig. 8 (b), C _GS is the TFT.
Gates of (Tr) (G), the parasitic capacitance between the source (S), C _L is an equivalent capacitance of the liquid crystal cell (LC).

On the other hand, when the enhancement type TFT having the characteristics shown in FIG. 7 is turned on, as shown in FIG. 9 (a), as in the case of FIG. 8 (a), in FIG. The maximum voltage V _V to the minimum voltage V _V ′ with V _C as the one-dot chain line of
Change the voltage level in the range of (= 2V _C −V _V ). Apply the voltage V _H ′ of the maximum voltage V _V or more of the video signal to the gate (G) of the TFT (Tr)
In addition to the above, when the TFT (Tr) is turned on and, conversely, when it is turned off, the gate (G) of the TFT (Tr) is
The TFT (Tr) is turned off by applying a voltage such that the gate potential of the TFT (Tr) becomes equal to or lower than the source potential of the video signal, that is, a voltage _VL 'that is lower than the minimum voltage _VV ' of the video signal.

At this time, the enhancement type TFT as described above
The equivalent circuit when (Tr) is off is as shown in Fig. 9 (b), and C _GS and C _L in Fig. 9 (b) are between the gate and source as in Fig. 8 (b). Shows the parasitic capacitance of and the equivalent capacitance of the liquid crystal cell (LC).

[Problems to be solved by the invention]

However, as described above, the depletion type TFT (T
When r) is turned on, a voltage higher than the video signal voltage is applied to the TFT.
Since the voltage is applied to the gate of (Tr), when the TFT (Tr) is turned on, the TFT (T
The potential difference between the gate (G) and source (S) of r) causes parasitic capacitance.
As shown in Fig. 8 (b), the parasitic current ig from C _GS
r) flows through the gate (G) and source (S) to the capacitor C _L ,
Liquid crystal cell (LC) via drain (D) and source (S) of T (Tr)
There is a problem in that the video signal input to is disturbed by the parasitic current ig, and the display quality of the liquid crystal cell (LC) is disturbed.

On the other hand, as described above, enhancement type TFT (Tr)
To turn off the TFT (T
Since it is applied to the gate of r), when the TFT (Tr) is turned off,
A potential difference from the source (S) to the gate (G) is generated between the gate (G) and the source (S) of the TFT (Tr) with the change of the charge level of the video signal, and the TFT (Tr) is turned on during the ON period. Part of the charge due to the video signal charged in the capacitance C _L of the liquid crystal cell (LC) is discharged, and as shown in FIG. 9 (b), the parasitic current i due to the discharge is generated.
g flows to the parasitic capacitance C _GS via the source (S) and gate (G) of the TFT (Tr), and the capacitance C is kept until the TFT (Tr) turns on next time.
There is a problem that the voltage to be held at _L is lowered, and the display image quality of the liquid crystal cell (LC) is lowered.

[Means for solving problems]

The present invention has been made in consideration of the above points, and is intended to stabilize the display image quality of each liquid crystal by blocking the parasitic current between the gate and the source of each thin film transistor. A plurality of scan electrode lines orthogonal to the signal electrode lines and drains and gates provided at intersections of the signal electrode lines and the scan electrode lines are connected to the signal electrode lines and the scan electrode lines, respectively, to form a matrix. One substrate provided with a plurality of arranged thin film transistors, the other substrate provided with a common electrode of each transistor, and the drain of each transistor sandwiched between the two substrates arranged in a matrix. , A liquid crystal display device comprising a plurality of liquid crystal cells to which a video signal is inputted via a source, Gate stage, a liquid crystal display device provided with a diode in a direction to block parasitic current between the source.

[Action]

Therefore, in this invention, a diode is provided in front of the gate of each thin film transistor that constitutes the liquid crystal display device,
According to the characteristics of each thin film transistor, the parasitic capacitance between the gate and the source of each thin film transistor causes a parasitic current to flow in each liquid crystal cell through the gate and the source, and the source and the gate of each transistor through the liquid crystal cell to the gate and the source. Therefore, the parasitic current flowing in the parasitic capacitance is blocked, and the fluctuation of the voltage due to the video signal to be applied to each liquid crystal cell is suppressed.

〔Example〕

Next, the present invention will be described in detail with reference to FIGS. 1 to 4 showing an embodiment thereof.

First, FIG. 1 showing a part of one embodiment when the thin film transistor is a depletion type will be described.

In the figure, the same symbols as those in FIG.
5 is different from FIG. 5 in that the connection terminal (1) and the gate (G) of the depletion type TFT (Tr) are connected to the cathode and anode of the diode (3), and the gate (G) of the TFT (Tr) is connected to the front stage. The diode (3) from the gate (G) of the TFT (Tr) to the source
The point is that a resistance (4) for voltage feedback is provided between the gate (G) and the source (S) of the TFT (Tr), provided in the direction of blocking the parasitic current to (S).

At this time, when the depletion type TFT (Tr) is turned on, a voltage higher than the source voltage, that is, higher than the maximum voltage V _{V of the} video signal as shown in FIG. 8 (a) is applied to the connection terminal (1),
Even if a potential difference is generated between the gate (G) and the source (S) of the TFT (Tr) by applying the voltage to the gate (G) of the TFT (Tr) through the diode (3), the above-mentioned FIG. ) Gate shown in
(G) and source (S) parasitic capacitance C _GS from the parasitic current ig through the gate (G) and source (S) to the capacitance C _L is blocked by the diode (3) and the TFT (Tr The video signal input to the liquid crystal cell (LC) via the drain (D) and the source (S) of) is not disturbed by the parasitic current ig, and the display quality of the liquid crystal cell (LC) is prevented from being disturbed. .

Next, FIG. 2 showing a part of one embodiment when the thin film transistor is an enhancement type will be described.

In the figure, the same symbols as those in FIG. 1 indicate the same or corresponding ones, and the difference from FIG.
The point is that the connection direction of (3) is reversed and the anode and cathode of the diode (3) are connected to the connection terminal (1) and the gate (G) of the enhancement type TFT (Tr) '.

At this time, when the enhancement type TFT (Tr) 'is turned off, a voltage below the source voltage, that is, below the minimum voltage _VV ' of the video signal as shown in FIG.
Gate (G) of TFT (Tr) 'through (1) and diode (3)
By applying the, TFT (Tr) 'source (S) of, even if a potential difference between the gate (G), the capacitance C _L of the FIG. 9 (b) to indicate such a liquid crystal cell (LC) The flow of the parasitic current ig due to the discharge of the charging charge to the parasitic capacitance C _GS via the source (S) and the gate (G) of the TFT (Tr) ′ is blocked, and until the TFT (Tr) ′ is turned on next. The voltage to be held in the inter-capacitance C _L does not decrease, and the display quality of the liquid crystal cell (LC) is prevented from decreasing.

As shown in FIG. 3 and FIG. 4, respectively, the first
In the TFTs (Tr) and (Tr) 'shown in FIG. 2 and FIG. 2, respectively,
When the depletion type TFT (Tr) and the enhancement type TFT (Tr) 'are respectively connected in cascade, one of the TFTs (T
r), (Tr) ′ gate (G) before the gate (G), source (S)
Even if the diode (3) is provided in the direction in which the flow of the parasitic current therebetween is provided, the present invention can be implemented in the same manner.

[Effect of device]

As described above, according to the liquid crystal display device of the present invention, the TF
Gate of TFT (Tr), (Tr) 'in front of T (Tr), (Tr)'
Depletion type TFT (Tr) because diode (3) is installed in the direction to prevent the parasitic current between (G) and source (S).
When turning on, the parasitic capacitance between the gate (G) and the source (S) of the TFT (Tr) causes the liquid crystal cell (L) passing through the gate (G) and the source (S).
It is possible to prevent the flow of the parasitic current to C) to prevent the display quality of the liquid crystal cell (LC) from being disturbed, and to turn off the liquid crystal cell (LC) when the enhancement type TFT (Tr) 'is turned off.
Of the TFT (T) through the source (S) and gate (G)
It is possible to prevent the deterioration of the display quality of the liquid crystal cell (LC) by blocking the flow of the parasitic current to the parasitic capacitance between the gate (G) and the source (S) of r) ′. Can be stabilized and improved, and the effect is remarkable.

[Brief description of drawings]

1 to 4 are partial connection diagrams of an embodiment of the liquid crystal display device of the present invention, FIG. 5 is a partial connection diagram of a conventional liquid crystal display device, and FIGS. 6 and 7 are respectively. Gates of depletion type and enhancement type thin film transistors, relationship diagrams between source-source voltage and drain, source-source resistance, and FIGS. 8 (a) and 8 (b) are gates when the thin film transistor of FIG. 5 is a depletion type, respectively. The applied voltage waveform diagram and the equivalent circuit diagram when the transistor is on, and FIGS. 9 (a) and 9 (b) are the voltage waveform diagram applied to the gate and the transistor turned off when the thin film transistor of FIG. 5 is the enhancement type, respectively. It is an equivalent circuit diagram at the time. (Tr), (Tr) '... thin film transistor, (LC) ... liquid crystal cell, (3) ... diode.

Claims (1)

[Scope of utility model registration request] 1. A plurality of signal electrode lines, a plurality of scanning electrode lines orthogonal to each of the signal electrode lines, and a drain and a gate which are provided at intersections of the signal electrode lines and the scanning electrode lines, respectively. Signal electrode line,
One substrate provided with a plurality of thin film transistors connected to each scan electrode line and arranged in a matrix, the other substrate provided with a common electrode of each transistor, and both substrates arranged in a matrix. In a liquid crystal display device having a plurality of liquid crystal cells sandwiched between substrates and receiving a video signal via the drain and source of each transistor, a parasitic current between the gate and the source is provided in front of the gate of each transistor. A liquid crystal display device in which a diode is provided in a direction that blocks the light.