JPH0661957B2 - Printer controller - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a control device for a printer terminal.

(Prior Art) FIG. 4 is a block diagram showing an example of a printer control device according to the prior art. In FIG. 4, 201 is a microprocessor, 202 is a memory, 203 is an output port, 2
04 is a printer, 211 is a system bus signal line, 212
Is a printer interface signal line.

With such a configuration, and in the printer control device that employs the dot matrix system, the dot matrix printing head is vertically arranged. Therefore, when the printer is made to print the image pattern, for example, the data of the image pattern configured as shown in FIG. 5 is stored in the memory in the format as shown in FIG. 6, and as shown in FIG. It has been converted to a different format and output to the printer 204. Therefore, the microprocessor 201 reads the data as shown in FIG. 6 from the memory 202, creates the data as shown in FIG. 7 according to the read data, and stores it in the memory 202. After the conversion is completed, the data converted by the microprocessor 201 is read from the memory 202 and transferred to the output port 203.

Therefore, it is necessary to access the memory 202 a plurality of times when converting the data format from horizontal data to vertical data.

(Problems to be Solved by the Invention) The above-described conventional printer control device needs to perform format conversion processing of horizontal data into vertical data, and the microprocessor does not use a memory for processing. It had to be accessed again and again, and during that period, the microprocessor could not execute other processing.

An object of the present invention is to eliminate the above-mentioned drawbacks by providing a horizontal / vertical conversion circuit in front of an output port for sending image data to a printer, and using this to reduce the number of accesses to a memory by a microprocessor. It is an object of the present invention to provide a printer control device configured to allow a microprocessor to execute other processing.

(Means for Solving Problems) A printer control device according to the present invention comprises a memory, a horizontal / vertical conversion circuit, an output port, and a microprocessor.

The memory is for storing the image pattern to be printed.

The horizontal / vertical conversion circuit is for horizontal / vertical conversion of the image pattern read from the memory.

The output port is connected to the output of the horizontal / vertical conversion circuit, and is for outputting the data obtained from the output of the horizontal / vertical conversion circuit to the printer.

The microprocessor reads out the image pattern from the memory, sends it to the horizontal / vertical conversion circuit, and controls the horizontal / vertical conversion data to be sent to the printer through the output port for printing.

(Example) Next, this invention is demonstrated with reference to drawings.

FIG. 1 is a block diagram showing an embodiment of a printer control device according to the present invention. In FIG. 1, 101 is a microprocessor, 102 is a memory, 103 is a horizontal / vertical conversion circuit, 104 is an output port, 105 is a printer, 111 is a system bus signal line, and 112 is a signal for transmitting a data signal after horizontal / vertical conversion. A line 113 is a signal line for transmitting a printer interface signal.

In FIG. 1, the horizontal data of the image pattern of FIG. 5 is stored in the memory 102 in the form of FIG.
This data is read by the microprocessor 101,
It is output to the horizontal / vertical conversion circuit 103. Horizontal-to-vertical conversion circuit 103
When the data corresponding to the number of bits to be obtained after the conversion is received, the data shown in FIG. 7 is output to the output port 104 via the signal line 112.

For example, a case where the number of dots in the printer head is 8 and the data in the memory 102 is in bytes will be described as a specific example of the data.

FIG. 2 is a block diagram showing details of the horizontal / vertical conversion circuit 103 of FIG. In FIG. 2, reference numerals 601 and 602 are buffers, 6030 to 6037 are 8-bit serial-in / parallel-out shift registers, and 60, respectively.
4 is a horizontal / vertical conversion data buffer, 605 is a synchronizing signal generator, 612 is a system bus signal line passing through the buffer 601, and 613 is an output port 10 after being converted into vertical data.
4 is a data signal line in the state of being output to No. 4.

1 and 2, when the bit configuration pattern shown in FIG. 5 is stored in the memory 102 in the format shown in FIG. 4, the microprocessor 101 first reads the address M, and the horizontal / vertical conversion circuit 103. Output this to. Data is input to the horizontal / vertical conversion circuit 103 from the system bus signal line 111 via the buffer 601. Data b
₀ is input to the 8-bit serial-in / parallel-out shift register 6030, data b ₁ is input to the 8-bit serial-in / parallel-out shift register 6031, and data b ₂ is input to the 8-bit serial-in / parallel-out shift register 6032. is similarly inputted to the data _b 3 ~b _6, followed data _{b 7} to the 8-bit serial-in / parallel-out shift register 6037
Is input to.

Next, the microprocessor 101 is referred to as b _{0 in} FIG.
The data of _b p _{+ b} p _{+ 7} one line below the ~b _7, and sends the address M + Q shown in FIG. 6 in the memory 102 reads, in the aspect conversion circuit 103.

Thereafter, similarly, the microprocessor 101 has the address M + 2.
Q, M + 3Q, ... M + 7Q are read from the memory 102 and output to the horizontal / vertical conversion circuit 103.

The internal state of the horizontal / vertical conversion circuit 103 will be described with reference to FIG. FIG. 3 shows the state of data in the 8-bit serial-in / parallel-out shift register 6030, where the MSB at the address M is 8-bit serial / parallel.
The data is input to the parallel out shift register 6030, and sequentially the MSB of the address M + Q, the MSB of M + 2Q, ...
・ Continue to M + 7Q MSB. Data is similarly shifted in the other 8-bit serial-in / parallel-out shift registers. In the eight data sets, the data at the address N in FIG. 7 is first created, and the 8-bit serial-in / parallel-out shift register 603 is created.
0, then the 8-bit serial-in / parallel-out register 6031 receives the data at address N + 1, and then the 8-bit serial-in / parallel-out shift register 6032 receives the data at address N + 2. Finally, the 8-bit serial-in / parallel-out shift register 6037 has the address N +.
7 data is input.

When the data is set in the 8-bit serial-in / parallel-out shift registers 6030 to 6037, the sync signal generator 605 starts from the 8-bit serial-in / parallel-out shift register 6030 to the 8-bit serial-in / parallel-out shift register 6037. Is
Timing for transferring data is given to the horizontal / vertical conversion data buffer 604.

The horizontal / vertical conversion data buffer 604 outputs data sequentially while interfacing with the output port 104.

As the horizontal / vertical conversion data buffer 604, a buffer of a format other than the first-in / first-out (FIFO) can be used.

(Effects of the Invention) As described above, according to the present invention, by providing the horizontal / vertical conversion circuit between the output port and the system bus signal line, the memory storing the image pattern data is accessed once. , Data can be output to the printer,
In addition, since it is not necessary to create the converted data by the microprocessor and the memory area for storing the converted data is not required, there is an effect that the system efficiency can be improved.

In addition, the memory area and time required for the horizontal / vertical conversion processing can be omitted, and the processing speed can be increased.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a printer control device according to the present invention. FIG. 2 is a block diagram showing a detailed example of the horizontal / vertical conversion circuit of FIG. FIG. 3 shows the MSB of the buffer 601 of FIG. 2 and the 8-bit serial-in / parallel-out shift register 6030.
It is explanatory drawing which shows the data generation process in. FIG. 4 is a block diagram showing an example of a conventional printer control device. FIG. 5 is an explanatory diagram showing an actual example of the image pattern. FIG. 6 is an explanatory diagram showing an example of data of an image pattern developed on the memory. FIG. 7 is an explanatory diagram showing an example of data transmitted to the output port. 101 ... Microprocessor 102 ... Memory 103 ... Horizontal / vertical conversion circuit 104 ... Output port 105 ... Printer 601, 602 ... Buffer 6030-6032, 6036, 6037 ... 8 bit serial in / parallel out shift register 604 ...... Horizontal-vertical conversion data buffer 605 ...... Synchronous signal generator 111-113, 612, 613 ...... Signal line

Claims (1)

[Claims] 1. A memory for storing an image pattern to be printed, a horizontal / vertical conversion circuit for horizontal / vertical conversion of the image pattern read from the memory, and a connection to an output of the horizontal / vertical conversion circuit. An output port for outputting the data obtained from the output of the horizontal / vertical conversion circuit to the printer, and reading the image pattern from the memory and sending the image pattern to the horizontal / vertical conversion circuit. A printer control device comprising: a microprocessor that controls the vertically converted data to be sent to the printer through the output port to be printed out.