JPH0661747A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To provide a semiconductor integrated circuit device whose operating range is not made narrow even when a power supply voltage is fluctuated. CONSTITUTION:A current source 80 whose current depends on fluctuation of a power supply voltage and extracting its current from an output stage of a pre-stage circuit 202 is employed for a pre-stage differential amplifier circuit 81 in a circuit comprising a pre-stage differential amplifier circuit 31, an emitter follower circuit 82 and a post-stage differential amplifier circuit 83 to introduce a voltage drop corresponding to the power supply voltage to relax the power supply voltage dependency, resulting in that it is prevented that the operating range of the post-stage circuit 201 is made narrower.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device in which its operating range is not narrowed even if its power supply voltage is changed.

[0002]

2. Description of the Related Art FIG. 4 shows a differential amplifier circuit which is an example of a conventional semiconductor integrated circuit device. In FIG. 4, 1 and 2 are input terminals (first and second input terminals) of the first-stage differential amplifier circuit, and 30 and 31 are differential signals to which input signals from the input terminals 1 and 2 are input to the base. Transistors (fourth and fifth transistors), 22 and 23 are resistors (seventh and eighth resistors) connected in series between the emitters of the differential transistors 30 and 31, and 40 is this resistor 22 ,. A first constant current source connected between the connection point of 23 and the ground, 2
Reference numerals 0 and 21 are fifth and sixth resistances respectively connected between the collectors of the differential transistors 30 and 31 and the power supply 10 having the power supply voltage Vcc, and 81 is a differential formed by the above circuit elements. It is an amplifier circuit.

Further, 32 and 33 are emitter follower transistors (32 and 33) whose bases are connected to nodes 61 and 62 for confirming the operation, that is, terminals of the resistors 20 and 21 on the side opposite to the power source, and whose collectors are directly connected to the power source 10. Sixth and seventh transistors), 41 and 42 are second and third constant current sources respectively connected between the emitters of the emitter follower transistors 32 and 33 and the ground, and the emitter follower circuit is constituted by the above circuit elements. 82, and further, the emitter follower circuit 82 and the differential amplifier circuit 81 constitute a front stage circuit 200.

Further, 11 is a constant voltage source having an arbitrary voltage value, 34 and 35 are bases 63, 6 for confirming the operation.
4, that is, the differential transistors (8th and 9th transistors) connected to the emitters of the emitter follower transistors 32 and 33, and 24 and 25 are the differential transistors 3
First connected in series with each other between 4,35 emitters
1, 12th resistor, 43 is a fourth constant current source connected between the connection point of these resistors 24 and 25 and the ground, 26, 27
Is a collector of the differential transistors 34 and 35 and a constant voltage source 1
9th and 10th resistors connected between 1 and 50, 51
Are first and second output terminals connected to the collectors of the differential transistors 34 and 35, and the latter circuit 201, that is, the differential amplifier circuit 83 is constituted by the above circuit elements. The resistors 22 and 23 are the differential transistors 30 and 3.
The emitter resistance of 1 is also included in this.

Next, the operation of the circuit of FIG. 4 will be described. The portion 200 in FIG. 4, that is, the first-stage differential amplifier circuit 8
1 and the emitter follower circuit 82 thereof, the voltage value of the power source 10 is Vcc, and the resistors 20 to 23.
The resistance value of R20 to R23, and the current value of the constant current source 40 is I
40.

When the difference between the voltage values of the input signals of the input terminals 1 and 2 is 0, the current of the constant current source 40 is the transistors 30 and 3.
Since the voltage is divided into the same magnitude (I40 / 2) at 1 and flows through the transistors 30 and 31, the voltage V61 at the node 61 is
Is

V61 = Vcc- (R20) * (I40 / 2) ... (1)

[0008]

Therefore, the voltage value V63 of the node 63 is

V63 = V61-VBE (2)

[0011] However, VBE is a base-emitter voltage of the emitter follower transistor 32.

A voltage lower than the above input voltage by X [V] is applied to the input terminal 1 and a voltage higher by X [V] is applied to the input terminal 2 (where X is an arbitrary voltage value smaller than several hundred mV). Since this condition will be referred to as condition A hereinafter), the voltage X having a small difference is amplified by the amplification factor (R20 / R22) of the first stage differential amplifier circuit determined by the resistance values R20 and R22. The voltage value V61 of

V61 = Vcc- (R20) * (I40 / 2)-(R20 / R22) * X ... (3)

Therefore, the voltage value V63 of the node 63 is

V63 = V61-VBE (4)

[0016]

When the power supply potential Vcc does not change, the node 6
The voltages V61 and V63 of 1 and 63 have unique values. However, when the power supply voltage Vcc shows a fluctuation of ± several percent,
The voltage value corresponding to the fluctuation of Vcc directly affects V61 and V63 according to the equations (1) to (4). Therefore, since the fluctuation difference of the power supply voltage also appears in the latter stage (region 201 in FIG. 4),
Distortion occurs when driving in the same operating range as compared to when there is no power supply fluctuation. Therefore, if the operating range is set so as not to cause distortion, the operating range will be narrowed.

[0018]

Since the differential amplifier circuit, which is an example of the conventional semiconductor integrated circuit device, is configured as described above, the operating range becomes narrow due to the distortion caused by the fluctuation of the power supply voltage. There was a problem.

The present invention has been made to solve the above problems, and an object of the present invention is to obtain a semiconductor integrated circuit device whose operating range is not narrowed even if the power supply voltage fluctuates.

[0020]

The semiconductor integrated circuit device according to the present invention is provided with a current source for supplying a current depending on the power supply voltage in the preceding stage, and by drawing the current from the output side of the circuit in the first stage, The voltage drop is caused according to the fluctuation.

In the semiconductor integrated circuit device according to the present invention, the first stage differential amplifier circuit, the emitter follower circuit receiving the output of the first stage differential amplifier circuit, and the next stage receiving the output of the emitter follower circuit are provided. A current source is provided at the first stage of a circuit including a differential amplifier circuit, and the current source is configured by a current mirror circuit. It was done like this.

Further, in the semiconductor integrated circuit device according to the present invention, a base current compensating transistor is provided in the current source constituted by the current mirror.

Further, in the semiconductor integrated circuit device according to the present invention, a diode for suppressing fluctuations in power supply voltage is provided in the current source composed of a current mirror.

[0024]

In the present invention, the current source depending on the power supply voltage is provided in the first stage, and the current is used to draw the current from the output stage of the circuit in the first stage. However, the current corresponds to the fluctuation of the power supply voltage. Since it changes, the operation range of the subsequent stages is prevented from being narrowed.

Further, in the present invention, the first stage differential amplifier circuit, the emitter follower circuit receiving the output of the first stage differential amplifier circuit, and the next stage differential amplifier circuit receiving the output of the emitter follower circuit. Since the current source is provided in the circuit consisting of, the effect of the differential amplifier circuit, in which the output is affected even if the power supply voltage fluctuates by a few percent, can be eliminated, and the current source is replaced by a current mirror circuit. With this configuration, the current according to the fluctuation of the power supply voltage can be faithfully drawn from the output side of the preceding circuit, and the influence of the fluctuation of the power supply voltage can be suppressed with a simple configuration.

Further, in the present invention, the current source constituted by the current mirror is provided with the transistor for compensating the base current, so that the error of the current of the current mirror circuit can be suppressed and the fluctuation of the power supply voltage. The effect of can be eliminated more effectively.

Further, in the present invention, since the current source composed of the current mirror is provided with the diode for compensating the fluctuation of the power supply voltage, the current error of the current mirror circuit can be suppressed and the power supply can be suppressed. It is possible to more effectively eliminate the influence of voltage fluctuation.

[0028]

Embodiment 1 An embodiment of the present invention will be described below with reference to the drawings. Figure 1
Shows a differential amplifier circuit as an example of a semiconductor integrated circuit device according to an embodiment of the present invention.

In FIG. 1, 1 and 2 are input terminals (first and second input terminals) of the differential amplifier circuit in the first stage, and 30, 3
Reference numeral 1 is a differential transistor (fourth and fifth transistors) whose input signals from the input terminals 1 and 2 are input to the base, and 22 and 23 are serially connected between the emitters of the differential transistors 30 and 31. Connected resistors (7th, 8th)
, 40 is a first constant current source connected between the connection point of the resistors 22 and 23 and the ground, 20 and 21 are collectors of the differential transistors 30 and 31 and the power source 10 having the power source voltage Vcc. The fifth and sixth resistors are respectively connected between them, and the differential amplifier circuit 81 is configured by the above circuit elements.

The emitters of the followers 32 and 33, whose bases are connected to the nodes 61 and 62 for confirming the operation, that is, the terminals of the resistors 20 and 21 on the side opposite to the power source, and the collectors of which are directly connected to the power source 10 ( Sixth and seventh transistors), 41 and 42 are second and third constant current sources respectively connected between the emitters of the emitter follower transistors 32 and 33 and the ground, and the emitter follower circuit is constituted by the above circuit elements. 82 is configured.

Further, 11 is a constant voltage source having an arbitrary voltage value, and 34 and 35 are bases 63 and 6 for confirming the operation.
4, that is, the differential transistors (8th and 9th transistors) connected to the emitters of the emitter follower transistors 32 and 33, and 24 and 25 are the differential transistors 3
First connected in series with each other between 4,35 emitters
1, 12th resistor, 43 is a fourth constant current source connected between the connection point of these resistors 24 and 25 and the ground, 26, 27
Is a collector of the differential transistors 34 and 35 and a constant voltage source 1
9th and 10th resistors connected between 1 and 50, 51
Are first and second output terminals connected to the collectors of the differential transistors 34 and 35, and by the above circuit elements,
The post-stage circuit 201, that is, the differential amplifier circuit 83 is configured. The resistors 22 and 23 are the differential transistors 30 and 3.
The emitter resistance of 1 is also included in this.

The above circuit elements are the same as those of the conventional circuit shown in FIG. Reference numerals 101 to 103 and 111 to 114 are components newly added in the present embodiment, and the base and collector of the first transistor 101 are the first.
Is connected to the power supply 10 via the resistor 114, and the emitter is connected to the ground via the second resistor 111.
Reference numerals 102 and 103 denote second and third transistors whose bases are commonly connected to the first transistor 101, collectors thereof are respectively connected to collectors of transistors 30 and 31, and emitters thereof are respectively third and fourth resistors. 1
It is connected to the ground via 12, 113.

The current source 80 is formed by the above circuit elements.
The current source 80, the differential amplifier circuit 81, and the emitter follower circuit 82 form a pre-stage circuit 202.
Is configured.

Next, the operation will be described. Input terminal 1,
When the input voltage difference from 2 is 0, and the current flowing through the resistor 111 is I111,

Vcc = R114 · I111 + VBE + R111 · I111 (9)

It becomes

By modifying the equation (9), the following equation is obtained.

I111 = (Vcc-VBE) / (R111 + R114) (10)

This equation (10) is the current value drawn from the output side of the first stage differential amplifier circuit.

When the input voltage difference from the input terminals 1 and 2 is 0, the voltage V61 at the node 61 is

V61 = Vcc-R20 * (I40 / 2 + I111) (11)

It becomes Therefore, the voltage V63 at the node 63 is

V63 = V61-VBE (12)

It is Then, when the above-mentioned condition A is satisfied, V61 becomes

V61 = Vcc-R20 * (I40 / 2 + I111)-(R20 / R22) * X ... (13)

Therefore, V63 is given by the following equation.

V63 = V61-VBE (14)

Here, description will be made by substituting specific numerical values into the expressions (10) to (14).

An example of one numerical value is shown below. Vcc = 5
V, R114 = 30 KΩ, R111 = R112 = R11
3 = 13 KΩ, R20 = R21 = 10 KΩ, R22 = R
23 = 1 KΩ (value including emitter resistance), I40 = 1
00 μA, VBE = 0.7V, X = 50 mV.

From equation (10), I111 is

I111 = (5-0.7) / (30K + 13K) = 100 μA ... (15)

It becomes When the input voltage difference from the input terminals 1 and 2 is 0, the voltage V61 at the node 61 is calculated from the equation (11),

V61 = 5-10K * (100μ / 2 + 100μ) = 3.5V (16)

It is Therefore, the voltage V63 at the node 63 is

V63 = V61−0.7 = 2.8V (17)

When the above-mentioned condition A is satisfied, V6
1 is from equation (13),

V61 = 5-10K * (100μ / 2 + 100μ)-(10K / 1K) * 50 m = 3.0V ... (18)

Therefore, V63 is given by the following equation.

V63 = V71−0.7 = 2.3 V (19)

As an example, the power supply voltage is ± 1
Think of a 0% change.

From equation (10), I111 is

I111 = ([4.5 to 5.5] −0.7) / 43 (KΩ) = [88 to 112] μA ... (20)

It becomes

When the difference between the input voltages from the input terminals 1 and 2 is 0, the voltages V61 and V63 at the nodes 61 and 63 are (11),
From equation (12),

V61 = [4.5 to 5.5] −10K * (50 μ + [88 to 112] μ) = [3.17 to 3.88] V ... (21)

V62 = [3.17-3.88] -0.7 = [2.47-3.17] V ... (22)

When the above condition A is satisfied, V6
1, V63 is calculated from the equations (13) and (14).

V61 = [4.5 to 5.5] −10K * (50 μ + [88 to 112] μ) −500 m = [2.67 to 3.38] V ... (23)

V63 = [2.67-3.38] -0.7 = [1.97-2.68] V ... (24)

Therefore, the fluctuation of the node 63 can be suppressed with respect to the fluctuation of the power supply voltage of ± 10%, and as a result, it is possible to prevent the operating range of the area A in FIG. 1 from being narrowed.

As described above, according to the first embodiment, by providing the current source for generating the current depending on the power supply voltage, even if the power supply voltage fluctuates, the current corresponding to the fluctuation is output to the output of the preceding circuit. Can be pulled out from the side,
The dependency on the power supply voltage can be relaxed, and it is possible to obtain a circuit in which the operation range of the subsequent circuit is not narrowed even if the power supply voltage changes.

Further, a differential amplifier circuit in the preceding stage, an emitter follower circuit receiving the output of the differential amplifier circuit in the preceding stage,
Since it is applied to the circuit consisting of the differential amplifier circuit in the subsequent stage that receives the output of this emitter follower circuit, the effect of the differential amplifier circuit whose output appears only when the power supply voltage changes by a few percent Since it can be solved, and the current circuit is configured using the current mirror circuit,
A current according to the fluctuation of the power supply voltage can be faithfully drawn from the output side of the preceding circuit, and the influence of the fluctuation of the power supply voltage can be suppressed with a simple configuration.

Example 2. In the first embodiment described above, the 2-transistor type current mirror circuit was used as an example of the current circuit. However, by using the base current compensation type current mirror circuit as shown in FIG. It is possible to increase the pairing accuracy of the extraction currents of both the circuits and obtain the target circuit with higher accuracy.

In FIG. 2, 104 is the transistor 10.
A tenth transistor for compensating the base current of the current mirror circuit composed of 1 to 103;
The base is connected to the collector of the transistor 101, the emitter is connected to the bases of the transistors 101 to 103, and the collector is connected to the power supply 10.

Example 3. By providing a diode between the transistor 101 and the resistor 114 of the first embodiment described above, the dependency on the power supply voltage can be further improved.

In FIG. 3, 121 and 122 are resistors 11.
4 is a diode connected in series with each other between the terminal on the side opposite to the power supply and the collector of the transistor 101 and the base directly connected thereto.

In this embodiment, the diode 12
1, 122 are provided to suppress fluctuations in the voltage difference between the collector of the transistor 101 having a constant voltage and the power supply 10 by the diodes 121 and 122, thereby suppressing an error in the current of the current mirror circuit. As a result, the target circuit can be obtained with higher accuracy.

It should be noted that one diode or a plurality of diodes may be arranged according to the power supply voltage value, and the same effect as in the above embodiment can be obtained.

Needless to say, the transistor 104 shown in FIG. 2 may be combined.

Further, in the above embodiment, the differential amplifier is used as the amplifier of the front stage circuit and the rear stage circuit, but this may be an operational amplifier or the like, and the same effect as each of the above embodiments can be obtained.

[0081]

As described above, according to the semiconductor integrated circuit device of the present invention, a current circuit for supplying a current depending on the power supply voltage is provided at the front stage of the circuit, and the current is supplied to the circuit at the rear stage. Therefore, there is an effect that the dependency on the fluctuation of the power supply voltage can be suppressed and a circuit that does not narrow the operation range can be obtained.

Further, according to the semiconductor integrated circuit device of the present invention, the first stage differential amplifier circuit, the emitter follower circuit for receiving the output of the first stage differential amplifier circuit, and the next stage for receiving the output of the emitter follower circuit are provided. Since the current circuit is provided in the circuit including the differential amplifier circuit of the stages, in the differential amplifier circuit that is easily affected by the fluctuation of the power supply voltage,
It has the effect of eliminating the influence of fluctuations in the power supply voltage.
Since the current circuit is configured by the current mirror circuit, it is possible to suppress the influence of the fluctuation of the power supply voltage with a simple configuration.

Further, according to the semiconductor integrated circuit device of the present invention, the current circuit constituted by the current mirror is provided with the transistor for compensating the base current, so that the current error of the current mirror circuit can be suppressed. Therefore, the effect of fluctuations in the power supply voltage can be further eliminated.

Further, according to the semiconductor integrated circuit device of the present invention, the current circuit formed by the current mirror is
Since the diode for compensating the fluctuation of the power supply voltage is provided, there is an effect that the error of the current of the current mirror circuit can be suppressed and the influence of the fluctuation of the power supply voltage can be eliminated.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a semiconductor integrated circuit device according to another embodiment of the present invention.

FIG. 3 is a circuit diagram showing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 4 is a circuit diagram showing a conventional semiconductor integrated circuit device.

[Explanation of symbols]

 1, 2 Input terminal 10 Power supply 11 Constant voltage source 20-27, 111-114 Resistance 30-35, 101-104 Transistor 40-43 Constant current source 50, 51 Output terminal 61-63 Potential observation node 80, 84, 85 Current source 81 Pre-stage differential amplifier circuit 82 Emitter-follower circuit 83 Post-stage differential amplifier circuit 121, 122 Diode 202 Pre-stage circuit 201 Post-stage circuit

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] December 2, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

In the semiconductor integrated circuit device according to the present invention, the first stage differential amplifier circuit, the emitter follower circuit receiving the output of the first stage differential amplifier circuit, and the next stage receiving the output of the emitter follower circuit are provided. the first stage of the circuit consisting of a differential amplifier circuit, a current source is provided, Ru der those that current source so as to constitute a current mirror circuit.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0023

[Correction method] Change

[Correction content]

Further, in the semiconductor integrated circuit device according to the present invention, the current is supplied to the current source composed of the current mirror.
A diode is provided to cancel the temperature coefficient of the resistance created .

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0030

[Correction method] Change

[Correction content]

The bases 32 and 33 are connected to the nodes 61 and 62 for confirming the operation, that is, the terminals of the resistors 20 and 21 on the side opposite to the power source, and the collectors are directly connected to the power source 10. Transistors (sixth and seventh transistors), 41 and 42 are second and third constant current sources connected between the emitters of the emitter follower transistors 32 and 33 and the ground, respectively. The follower circuit 82 is configured.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0031

[Correction method] Change

[Correction content]

Further, 11 is a constant voltage source having an arbitrary voltage value, 34 and 35 are bases 63, which are nodes for operation confirmation, and
The node 64, that is, the emitter follower transistor 32,
33 is connected to the emitter of the differential transistor (8th,
Ninth transistor), 24 and 25 are eleventh and twelfth resistors connected in series between the emitters of the differential transistors 34 and 35, and 43 is between the connection point of the resistors 24 and 25 and the ground. Connected fourth constant current source, 26,
27 is the ninth and tenth resistors connected between the collectors of the differential transistors 34 and 35 and the constant voltage source 11, 50,
Reference numeral 51 denotes first and second output terminals connected to the collectors of the differential transistors 34 and 35, and the circuit elements described above constitute the post-stage circuit 201, that is, the differential amplifier circuit 83. The resistors 22 and 23 are the differential transistor 3
The emitter resistances of 0 and 31 are also included in this.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0060

[Correction method] Change

[Correction content]

As an example of fluctuation , the power supply voltage is ±
Think about a 10% change.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] 0077

[Correction method] Change

[Correction content]

In this embodiment, the diode 12
By providing 1,122, the resistance with a positive temperature coefficient
The electric current generated by the anti-20 is transferred to the negative temperature coefficient
The temperature dependence of the resistor 20 is canceled by the ions 121 and 122.
However, a current independent of temperature can be obtained. That conclusion
Result, the error of the current of the current mirror circuit is suppressed, which makes it possible to obtain a circuit of more accurately purposes.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0078

[Correction method] Change

[Correction content]

The diode has a power supply voltage value and a current.
One or a plurality of resistors may be arranged depending on the balance between the temperature coefficient of the resistor and the temperature coefficient of the diode, and the same effect as in the above embodiment can be obtained.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0084

[Correction method] Change

[Correction content]

Further, according to the semiconductor integrated circuit device of the present invention, the current circuit formed by the current mirror is
Since the diode for canceling the temperature coefficient of the resistance that produces the current is provided, the current error of the current mirror circuit can be suppressed, and the effect of the fluctuation of the power supply voltage can be eliminated.

[Procedure Amendment 10]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 1

[Correction method] Change

[Correction content]

[Figure 1]

Claims (4)

[Claims] 1. A current according to a fluctuation of a power supply voltage is drawn from an output stage of the preceding circuit to a preceding circuit of a required circuit,
A semiconductor integrated circuit device comprising a current source for relaxing the power supply voltage dependence of the preceding circuit. 2. The required circuit comprises a differential amplifier circuit, and the preceding stage circuit comprises a differential amplifier circuit and an emitter follower circuit for receiving the output of the differential amplifier circuit. The dynamic amplifier circuit is connected between the fourth and fifth transistors whose collectors are connected to each other and the collectors of the second and third transistors and the first power supply node. The fifth and sixth resistors, the seventh and eighth resistors connected in series with each other between the emitters of the fourth and fifth transistors, the connection point of the seventh and eighth resistors, and the second resistor. A first constant current source connected to the power supply node, and first and second current sources connected to the bases of the fourth and fifth transistors,
A second input terminal, wherein the emitter follower circuit has sixth and seventh bases whose bases are connected to the collectors of the fourth and fifth transistors and whose collectors are connected to the first power supply node.
And the second and third constant current sources connected between the emitters of the sixth and seventh transistors and the second power supply node, the differential amplification of the preceding circuit. The circuit consists of eighth and ninth transistors whose bases are connected to the emitters of the sixth and seventh transistors, and ninth and tenth resistors whose one ends are connected to the collectors of the eighth and ninth transistors. , The eleventh and twelfth resistors connected in series between the emitters of the eighth and ninth transistors, and the connection point between the other ends of the ninth and tenth resistors and the second power supply node. A voltage source connected between them, a fourth constant current source connected between the connection point of the eleventh and twelfth resistors and the second power supply node, and collectors of the eighth and ninth transistors, A first and a second output terminals connected to each other, A first resistor whose one end is connected to the first power supply node, a first transistor whose base and collector are connected to the other end of the first resistor, and an emitter of the first transistor and a second resistor. A second resistor connected between the power supply node, a second transistor, a third transistor in which the first transistor and the bases are connected to each other, an emitter of the second and third transistors, and a second power supply node 2. The semiconductor integrated circuit device according to claim 1, further comprising a third resistor and a fourth resistor connected between and. 3. The semiconductor device according to claim 2, further comprising a tenth transistor having a base and a collector connected to the emitter and the base, respectively, and a collector connected to the first power supply node. Integrated circuit device. 4. One diode or a plurality of diodes connected in series to each other is provided between the other end of the first resistor and the collector of the first transistor. The semiconductor integrated circuit device according to claim 2.