JP3688478B2 - Optical receiver circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique for receiving an optical signal transmitted through an optical fiber, space, or the like and converting it into an electrical signal.
[0002]
[Prior art]
FIG. 5 is a circuit diagram of a conventional optical receiver circuit that performs photoelectric conversion. 5 includes an NPN transistor Q1 having a common emitter, a photodiode 1 connected between the base and emitter of the transistor Q1, an NPN transistor Q2 having an emitter follower configuration, a base terminal of the transistor Q1, and a transistor Q2. A feedback resistor Rf connected between the emitter terminals of the transistors Q2, a resistor R1 connected between the base and collector terminals of the transistor Q2, and a resistor R2 connected between the emitter terminals of the transistors Q1 and Q2.
[0003]
The base terminal of the transistor Q2 is connected to the collector terminal of the transistor Q1, the collector terminal of the transistor Q2 is connected to the first power supply line Vdd, and the emitter terminal of the transistor Q1 is connected to the second power supply line Vss.
[0004]
The photodiode 1 outputs a signal current corresponding to the intensity of the received optical signal, and a voltage signal of this signal current × feedback resistance value is output from the emitter terminal of the transistor Q2.
[0005]
[Problems to be solved by the invention]
In the conventional optical receiver circuit shown in FIG. 5, there is no particular circuit design in which the sum of the signal current flowing through the feedback resistor Rf, the signal current flowing through the resistor R1, and the signal current flowing through the resistor R2 has a specific relationship. It was. For example, the resistance value of the feedback resistor Rf is determined by the necessary bandwidth and sensitivity, the resistance value of the resistor R1 is determined by the necessary amplifier bandwidth and noise characteristics, and the resistance value of the resistor R2 is the circuit connected to the next stage. In general, it was determined in consideration of matching.
[0006]
However, in such a conventional determination method, the current consumption of the optical receiver circuit itself of FIG. 5 varies depending on the signal current, and these power supply lines Vdd are caused by the inductor components L1 and L2 of the first and second power supply lines Vdd and Vss. , Vss generates noise, the optical receiver circuit itself becomes unstable, and reception sensitivity is deteriorated.
[0007]
For example, as an example, when the feedback resistor Rf is 10 kΩ, the resistor R1 is 10 kΩ, the resistor R2 is 1 kΩ, and the signal current output from the photodiode 1 is 1 μA, the signal current flowing through the first power supply line Vdd will be considered. In this case, the current i2 flowing through the feedback resistor Rf is also 1 μA, and the variation Δv of the emitter voltage of the transistor Q2 is Δv = 10 kΩ × 1 μA = 100 mV. The voltage at the first voltage terminal also varies by almost the same amount as this voltage variation Δv. Therefore, the signal current i1 flowing through the resistor R1 is i1 = 100 mV / 10 kΩ = 1 μA. Similarly, the signal current i3 flowing through the resistor R2 is i3 = 100 mV / 1 kΩ = 10 μA.
[0008]
Here, taking into account the direction of current flow, the signal current flowing through the first power supply line Vdd is −i 1 + i 2 + i 3 = (− 1) + 1 + 10 = 10 μA.
[0009]
Further, at this time, assuming that the time change of the signal current is 1 ns and the wiring inductance L of the first and second power supply lines Vdd and Vss is L = 10 nH, the noise voltage v generated in the first power supply line Vdd. V = L · di / dt = 10 nH × 10 μA / 1 ns = 0.1 mV.
[0010]
Further, since the voltage amplification factor of the transistor Q1 is usually about 100 times, the signal voltage fluctuation Δv between the base and the emitter of the transistor Q1 becomes Δv = 10 k × 1 μA / 100 = 0.1 mV, and the noise obtained previously is The value is equivalent to the minute, and greatly affects the stability and sensitivity of the circuit.
[0011]
The present invention has been made in view of the above points, and an object of the present invention is to provide an optical receiver circuit that suppresses fluctuations in current consumption and prevents noise from being generated in a power supply line.
[0012]
[Means for Solving the Problems]
According to one embodiment of the present invention, a light receiving element, a first transistor into which a photoelectric conversion signal output from the light receiving element is input to a base (gate) terminal, and a base (gate) terminal serving as the first transistor A second transistor having the same conductivity type as the first transistor, a base (gate) terminal of the first transistor, and an emitter (source) terminal of the second transistor, which are connected to a collector (drain) terminal of the first transistor A feedback resistor connected between the first transistor, a first load connected between a base (gate) and a collector (drain) of the second transistor, and emitters (sources) of the first and second transistors. ) A second load connected between the terminals; a first power line connected to the collector (drain) terminal of the second transistor; and the first transistor. A second power line connected to the emitter terminal of the first power source, and a total value of currents flowing through the first load, the second load, and the feedback resistor is substantially zero. The present invention provides an optical receiver circuit that adjusts impedances of the first load, the second load, and the feedback resistor.
[0013]
The invention of claim 1 will be described with reference to FIG. 1, for example. The “light receiving element” is the photodiode 1, the “first transistor” is the NPN transistor Q1, and the “second transistor” is the NPN transistor Q2. , “Feedback resistor” is the feedback resistor Rf, “first load” is the resistor R1, “second load” is the resistor R2, “first power supply line” is the first power supply line Vdd, The “second power supply line” corresponds to the second power supply line Vss.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an optical receiver circuit according to the present invention will be specifically described with reference to the drawings.
[0015]
(First embodiment)
FIG. 1 is a circuit diagram of a first embodiment of an optical receiver circuit. The optical receiver circuit of FIG. 1 has the same circuit configuration as that of the conventional optical receiver circuit shown in FIG. 5, but the resistance values of the resistors Rf, R1, and R2 are set so as to satisfy the relationship of the expression (1). This is different from the optical receiver circuit of FIG.
[0016]
1 / R1 = (1 / Rf) + (1 / R2) (1)
Hereinafter, the reason why the resistance values of the resistors Rf, R1, and R2 are set so as to satisfy the relationship of the expression (1) will be described. The signal current output from the photodiode 1 changes according to the intensity of the optical signal. However, even if the signal current changes, the signal current does not flow through the first and second power supply lines Vdd and Vss in FIG. To achieve this, the sum of the currents i1, i2, i3 flowing through the resistors Rf, R1, R2 in FIG.
[0017]
If the signal current output from the photodiode 1 is Δi, the current i2 flowing through the feedback resistor Rf is equal to Δi. At this time, the voltage Δv across the feedback resistor Rf is expressed by the following equation (2).
Δv = Δi × Rf = i2 × Rf (2)
Here, Rf is the resistance value of the feedback resistor Rf. When this equation (2) is modified, equation (3) is obtained.
i2 = Δv / Rf (3)
Further, the current i3 flowing through the resistor R2 is expressed by the equation (4).
i3 = Δv / R2 (4)
Since the base terminal of the transistor Q2 is applied with substantially the same signal voltage ΔV as that of the emitter terminal, the current i1 flowing through the resistor R1 is expressed by equation (5).
i1 =-[Delta] v / R1 (5)
The reason why the negative sign is attached to the right side of the equation (5) is because the direction of the signal current in the resistor R1 is different from the direction of the signal current in the resistor R2 with respect to the power supply lines Vdd and Vss.
[0018]
As described above, since the signal current does not flow through the first and second power supply lines Vdd and Vss when the sum of the currents i1, i2, and i3 becomes zero, the sum of the expressions (3) to (5) is zero. Then, equation (6) is obtained.
Δv / Rf + Δv / R2 + (− Δv / R1) = 0 (6)
When the equation (6) is modified, the relationship of the above equation (1) is obtained.
[0019]
Thus, in the first embodiment, since the resistance values of the resistors Rf, R1, and R2 are set so as to satisfy the relationship of the expression (1) without changing the conventional circuit configuration at all, the signal current is reduced. Even if it changes, the consumption current does not fluctuate. Therefore, even if the first and second power supply lines Vdd and Vss have inductor components, noise is not generated in these power supply lines, and stable operation without sensitivity deterioration is possible.
[0020]
(Second Embodiment)
In the second embodiment, a higher bandwidth is achieved than in the first embodiment.
FIG. 2 is a circuit diagram of a second embodiment of the optical receiver circuit. In FIG. 2, the same reference numerals are given to components common to FIG. 1, and the differences will be mainly described below. The optical receiver circuit of FIG. 2 includes an NPN transistor Q3 with a common base in addition to the configuration of the optical receiver circuit of FIG. The transistor Q3 is connected between the collector terminal of the transistor Q1 and the base terminal of the transistor Q2. The voltage source 2 is connected to the base terminal of the transistor Q3, the collector terminal of the transistor Q1 is connected to the emitter terminal, and the base terminal of the transistor Q2 is connected to the collector terminal.
[0021]
If the base-grounded transistor Q3 as shown in FIG. 2 is provided, the emitter voltage of the transistor Q3 can be fixed and the mirror effect is eliminated, so that the high-frequency characteristics are improved and the bandwidth can be increased.
[0022]
In the circuit shown in FIG. 2, the resistance values of the resistors Rf, R1, and R2 are set so as to satisfy the relationship of the expression (1) as in the first embodiment. Even if there is inductance due to wiring in Vdd and Vss, noise is not generated in these power supply lines Vdd and Vss, and stable operation without sensitivity deterioration is possible.
[0023]
(Third embodiment)
The resistance values of the resistors Rf, R1, and R2 shown in FIG. 1 cannot always be set so as to satisfy the relationship of the expression (1) due to various circumstances. For example, in order to operate stably, it is necessary to pass a certain amount of current through the resistor R1, and the resistance value cannot be reduced too much. As described above, the resistance values of the resistors Rf, R1, and R2 in FIG. 1 must be determined according to the sensitivity of the circuit, the use band, the noise condition, and the like. There is.
[0024]
Therefore, in the third embodiment, a current source is connected in parallel to each of the resistors R1 and R2, and the current flowing through the resistors R1 and R2 can be adjusted.
[0025]
FIG. 3 is a circuit diagram of a third embodiment of the optical receiver circuit. In FIG. 3, the same reference numerals are given to components common to FIG. 1, and different points will be mainly described below. The optical receiver circuit of FIG. 3 includes a current source 3 connected in parallel to the resistor R1 and a current source 4 connected in parallel to the resistor R2 in addition to the configuration of the optical receiver circuit of FIG.
[0026]
The current source 3 includes a grounded PNP transistor Q4 and a voltage source 5 connected to the base terminal of the transistor Q4. The current source 4 is connected to a grounded PNP transistor Q5 and a base terminal of the transistor Q5. And a connected voltage source 6.
[0027]
With the configuration as shown in FIG. 3, it is not necessary to supply a sufficient current to the resistors R 1 and R 2, and the insufficient current can be supplied from the current sources 3 and 4. That is, since it is not necessary to set the resistance values of the resistors R1 and R2 in consideration of the currents flowing through the resistors R1 and R2, the resistance values of the resistors Rf, R1, and R2 are set so as to satisfy the relationship of the expression (1). It becomes easy to set and the degree of freedom of design is expanded.
[0028]
(Other embodiments)
In the first to third embodiments described above, the example in which the optical receiver circuit is configured by using the NPN transistor having the common emitter has been described. However, the optical receiver circuit can also be configured by using the PNP transistor.
[0029]
For example, FIG. 4 is a circuit diagram showing an example in which an optical receiver circuit is configured using PNP transistors Q1 ′ and Q2 ′, and corresponds to the circuit of the first embodiment shown in FIG. In the case of the circuit of FIG. 4 as well, if the resistance value of each resistor is set so as to satisfy the relationship of equation (1), the consumption current will not fluctuate even if the signal current changes, as in the circuit of FIG. Even if there is an inductor component in the power supply lines Vdd and Vss, there is no possibility that noise is generated in the power supply lines Vdd and Vss.
[0030]
In each of the above-described embodiments, an example using a bipolar transistor has been described. However, a MOS transistor may be used. When a MOS transistor is used, the voltage amplification factor as high as that of a bipolar transistor cannot be obtained, but the operation itself is possible. Similarly, a circuit may be formed using a Bi-CMOS transistor.
[0031]
In FIG. 1 and the like, an example in which resistance elements are used as the resistors R1, R2, and Rf has been described. However, in general, any impedance element may be used, and for example, a transistor may be used.
[0032]
【The invention's effect】
As described above in detail, according to the present invention, in an optical receiver circuit having a so-called parallel feedback amplifier circuit configuration, which includes a light receiving element and first and second transistors of the same conductivity type, the first and second Since the total value of the current flowing through the load and the feedback resistor becomes substantially zero, the signal current does not flow in the first and second power supply lines, and various noises caused by the wiring inductance of these power supply lines, For example, problems such as oscillation and unstable operation can be solved.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a first embodiment of an optical receiver circuit.
FIG. 2 is a circuit diagram of a second embodiment of an optical receiving circuit.
FIG. 3 is a circuit diagram of a third embodiment of an optical receiver circuit.
FIG. 4 is a circuit diagram showing an example in which an optical receiver circuit is configured using PNP transistors.
FIG. 5 is a circuit diagram of a conventional optical receiving circuit.
[Explanation of symbols]
1 Photodiode 2, 5, 6 Voltage source 3, 4 Current source

Claims (5)

A light receiving element;
A first transistor in which a photoelectric conversion signal output from the light receiving element is input to a base (gate) terminal;
A second transistor of the same conductivity type as the first transistor, wherein a base (gate) terminal is connected to a collector (drain) terminal of the first transistor;
A feedback resistor connected between a base (gate) terminal of the first transistor and an emitter (source) terminal of the second transistor;
A first load connected between a base (gate) and a collector (drain) of the second transistor;
A second load connected between the emitter terminals of the first and second transistors;
A first power supply line connected to a collector (drain) terminal of the second transistor;
A second power supply line connected to an emitter (source) terminal of the first transistor,
Impedances of the first load, the second load, and the feedback resistor are set so that a total value of signal currents flowing through the first load, the second load, and the feedback resistor becomes substantially zero. An optical receiver circuit characterized by adjusting.   Impedances of the first load, the second load, and the feedback resistor so that the reciprocal of the first load is approximately equal to the sum of the reciprocal of the second load and the reciprocal of the feedback resistor. The optical receiver circuit according to claim 1, wherein the optical receiver circuit is adjusted.   3. The base (gate) grounded transistor is inserted between the collector (drain) terminal of the first transistor and the base (gate) terminal of the second transistor. Optical receiver circuit.   The optical receiver circuit according to claim 1, wherein at least one of the first and second loads is a resistance element.   5. The optical receiver circuit according to claim 1, wherein at least one of the first and second loads is configured by connecting a resistance element and a current source in parallel.

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