JPH0661648A - Multilayer wiring board - Google Patents

Abstract

PURPOSE:To obtain a multilayer ceramic wiring board in which warp of the board produced at the time of sintering is removed, exposed surface is flattened, patterning accuracy is enhanced, wiring density is increased, irregularities on the surface caused by granular material and recesses caused by residual voids are removed, and fine patterning of a thin film wiring is achieved. CONSTITUTION:A through hole pattern 2 comprising a conductor pattern 3 having thickness sufficient enough to sustain wiring function even upon grinding is formed on the surface of a ceramic board 1, at least on the side where a thin film is formed, having an inner wiring connecting the surface and the rear of the board and on which a thin film wiring pattern 10 is formed. The through hole pattern 2 is then subjected to surface grinding to expose a conductor pattern 3, a coating layer 7 of such metal as not oxidized at the time of formation of a glass layer 8 is provided on the exposed conductor pattern 2, the glass layer 8 is eventually provided thereon, and then the metal coating layer 7 is exposed through grinding.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board, and more particularly to a multilayer wiring board suitable for improving the mounting density of semiconductor devices. In particular, it is used in electronic devices such as electronic calculators, where the packaging density of electronic devices greatly affects the superiority of the product.

[0002]

2. Description of the Related Art In an electronic device such as a conventional large-scale computer which is strongly required to have an improved processing speed, the speeding up of active elements such as LSI and the shortening of the connection distance between elements are major problems for improving the performance of the device. Met. From such a background, as for the technology of the LSI mounting board having high-density wiring, introduction of a method relating to a multilayer wiring board capable of forming fine high-density wiring suitable for higher-speed signal transmission was considered.

For example, there has been proposed a substrate in which thin film multilayer wiring mainly composed of an organic material as an insulating layer is formed on a ceramic multilayer substrate. As a technique related to this, for example, the technique described in JP-A-59-117197 is known. In addition, a thick-film thin-film hybrid multilayer wiring board in which a metal pad is formed for connection between both films has been proposed. As a technique related to this, for example, the technique described in JP-A-60-148191 is known. In these multilayer wiring boards, it is attempted to achieve high wiring density by combining ceramic multilayer board technology by the green sheet method, which facilitates multilayer wiring, and thin film technology, which facilitates fine wiring. To do.

The conventional technique has the following drawbacks. In a ceramic multilayer substrate, a warp of about 0.1 mm / 25 mm is usually generated due to a mismatch of contraction rates between a conductor material and a ceramic during sintering, nonuniformity during molding, and the like, and this warp is formed on the substrate. This limits the fineness of the thin film wiring pattern that can be formed.

The raw material of the ceramic multilayer substrate is several μm.
Since it is made of powder of particles having a size of m to 10 μm, it is unavoidable that the surface of the product has irregularities substantially equal to the particle diameter. In addition, the ceramic multilayer substrate is formed by simultaneously forming a ceramic powder part to be an insulating layer and a metal powder part to be a conductive layer and simultaneously sintering them. In order to match the shrinkage amount, it is usual to mix several percent to 10% of glass component into the ceramic powder portion. This is because the composition of ceramics is densified by liquid phase sintering with molten glass. But,
Due to this liquid phase sintering, voids are formed in the ceramic sintered body during molding. These holes cannot be completely removed even if the surface is ground, and it is unavoidable that they remain. For this reason, the surface of the ceramic substrate is dented by the residual holes. This dent is also
This causes defects in the thin film formed by sputtering, vapor deposition, etc., which becomes an obstacle to the miniaturization of the thin film wiring pattern. In this way, on the ceramic substrate surface with warpage and dents,
Even if the thin film technology using an organic material as an insulating layer, which is easy to miniaturize the wiring, is used together, the density of the wiring cannot be increased.

[0006]

SUMMARY OF THE INVENTION In the above conventional technique,
The occurrence of warpage during sintering of the above-mentioned ceramic multilayer substrate has the following problems. That is, although the thin film wiring pattern is formed by the photolithography technique, the pattern accuracy is determined by the flatness of the exposure surface due to the depth of focus of the pattern exposure apparatus. The occurrence of the warp hinders the accuracy of the pattern from increasing.

Further, in the past, when unevenness almost equal to the raw material particle diameter of the ceramic multilayer substrate produced at the time of sintering and dents due to the remaining pores at the time of molding were generated, sputtering, vapor deposition, etc. There has been a problem that defects are generated in the formed thin film, which becomes an obstacle to miniaturization of the thin film wiring pattern.

The present invention has been made in order to solve the above-mentioned problems of the prior art. It removes the warp of the ceramic multi-layer substrate that occurs during sintering, flattens the exposed surface, improves the pattern accuracy, and wiring. In addition, by densifying the surface, removing the irregularities that occur on the surface due to the particles, and the recesses due to residual holes, making the thin film wiring pattern finer and making the wiring finer, electronic parts such as LSI can be mounted, The wiring length for connecting the LSIs is significantly reduced. That is, the present invention provides a multilayer wiring board having an appropriate structure of ceramic / thin film interfaces in a ceramic multilayer / thin film multilayer hybrid substrate.

[0009]

In order to achieve the above object, the structure of the present invention forms a thin film wiring pattern on a ceramic substrate having inner layer wiring for connecting front and back surfaces in the thickness direction of the substrate. In the multilayer wiring board having the above-mentioned structure, a through hole having a conductor pattern formed at least on the side of the ceramic substrate on which a thin film is to be formed is formed so as to maintain the wiring function even if it is removed by grinding. -A metal pattern coated with a metal that does not oxidize during the subsequent glass layer formation on the exposed conductor pattern by exposing the conductor pattern to surface grinding of the conductor pattern and the through hole pattern. A coating layer is provided. Furthermore, a glass layer is coated on the entire surface of the ceramic substrate including at least the metal coating layer, and after the coating, the glass layer is surface-ground to expose the metal coating layer.

At least the pad material of the conductor pattern of the ceramic substrate is made of tungsten or molybdenum having a high melting point and high temperature strength or a composite material thereof, and the metal coating layer is made of at least gold. is there. At least the pad material of the conductor pattern is made of copper having good heat resistance, and the metal coating layer is formed to have a double structure of nickel and gold. The glass layer having the exposed metal coating layer gradually removes fine defects,
Heat treatment is performed at the softening temperature of the glass to form a softened glass layer.

[0011]

The function of each of the above technical means is as follows.
According to the structure of the present invention, the through hole pattern including the conductor pattern is provided on the side of the ceramic multilayer wiring substrate where the thin film wiring pattern is formed, and the thickness of this through hole pattern is increased. Since the thickness is set so that the wiring function can be maintained even if it is flattened by grinding after sintering, the conductor pattern can be ground by grinding.
The exposed surface is removed and the warpage during sintering is removed, and the exposed surface is flattened. As a result, the pattern resolution in the exposure process at the time of forming the thin film is improved, and the fine pattern can be formed.

Further, the exposed conductor pattern of the flattened through-hole pattern is covered with a metal film layer which is not oxidized during the formation of the glass layer, and the metal film layer is further affected by internal defects. Since the surface is ground and reinforced, the surface is ground to remove the surface irregularities due to the size of the particles and the cavities due to the voids generated at the time of molding, thereby achieving a high yield of the thin film wiring pattern.

The use of at least tungsten or molybdenum or composites thereof for the conductive pads on the conductor pattern and at least gold for the metallization layer results in diffusion of the gold and these conductive pad metals. In addition, even if nickel or the like is overlaid on gold to form a multilayer, diffusion is similarly performed, and a good bonded state can be obtained. Further, when the conductive pad of the conductor pattern is made of copper having good heat resistance and the metal coating layer has a double structure of nickel and gold, nickel suppresses the diffusion rate of copper and gold, and good bonding is performed. Be done. The glass layer is heat-treated at the softening temperature of the glass,
With the softened glass layer, fine defects are gradually removed.

[0014]

Embodiments of the present invention will be described below with reference to FIG. [Embodiment 1] FIG. 1A is a sectional view of a multilayer wiring board according to an embodiment of the present invention, and FIG. 1B is a manufacturing process diagram of the multilayer wiring board according to an embodiment of the present invention. is there. In the multilayer wiring board of the present invention, at least a thin film is formed on a multilayer wiring board formed by forming a thin film wiring pattern on a ceramic substrate having inner layer wiring for connecting front and back surfaces in the thickness direction of the board. On the surface of the ceramic substrate on the side, a through-hole pattern having a conductor pattern having a thickness capable of retaining the wiring function even if it is removed by grinding is formed,
This through-hole pattern is ground to expose the conductor pattern, and a metal coating layer covered with a metal that does not oxidize is formed on the exposed conductor pattern when a glass layer is formed later. And a glass layer formed on the entire surface of the ceramic substrate including at least the metal coating layer and having the metal coating layer exposed by surface grinding.

In FIG. 1A, 1 is a ceramic multilayer wiring board, 2 is a through hole pattern of the ceramic multilayer wiring board, and 3 is a conductor pattern of the ceramic multilayer wiring board.
Input and output pin pads of ceramic multilayer wiring board,
Reference numeral 5 is a void generated during the molding of ceramics, 6 is a surface recess (hereinafter referred to as a recess) caused by unevenness due to raw material particles remaining after grinding or recesses due to residual holes, 7 is a metal coating layer on a through-hole pattern, and 8 is glass. Layers 10a are conductor patterns of the thin film wiring pattern, and 10b are insulating portions of the thin film wiring pattern.

In FIG. 1B, 101 is a step of forming a ceramic multilayer wiring substrate 1 having a through hole pattern 2 having a conductor pattern 3, and 102 is a flattening process by grinding the formed through hole pattern 2. The step of exposing the conductor pattern 3, the step 103 of covering the metal pattern layer 7 on the conductor pattern 3 and the step of forming the glass layer 8 on the entire surface of the through hole pattern 2, and the step 104 of grinding the glass layer 8 Step 105 is a step of exposing the metal film layer 7, and step 105 is a step of forming the thin film wiring patterns 10a and 10b on the ceramic multilayer wiring board 1.

Hereinafter, examples will be described together with manufacturing steps by giving concrete numerical examples. The ceramic multilayer wiring board 1 is
Only the through-hole pattern 2 having a thickness of about 1 mm is formed on the thin film formation surface side, and a multilayer wiring layer is formed below the through-hole pattern 2. Input / output pin pads 4 of the ceramic multilayer wiring board 1 are provided on the back surface, and the input / output pin pads 4 are connected to the conductor patterns 3 of the ceramic multilayer wiring board 1. Such a ceramic multilayer wiring board 1 was formed by the following steps.

The step 101 in FIG. 1B will be described with reference to FIG. First, alumina powder and alumina-silica-magnesia glass powder are mixed in a weight ratio of 9: 1, polyvinyl butyral and a plasticizer are added thereto, and a green sheet having a thickness of 0.3 mm is formed by a doctor blade method. A 0.15 mmφ through hole pattern 2 is formed at a predetermined position on this green sheet by punching, the through hole pattern 2 is filled with tungsten powder by a printing method, and then a predetermined conductor is formed using a tungsten paste by the same printing method. Pattern 3 is formed.

150 mm × 150 m subjected to the above treatment
A multilayer wiring structure was realized by stacking and pressing a predetermined number of m green sheets. In this case, the four green sheets on the thin film formation surface side are used in which only the holes of the through-hole pattern 2 are formed without filling the tungsten powder or forming the predetermined conductor pattern 3 using the tungsten paste. To do. The pressure-bonded green sheet having the multilayer wiring structure was heat-treated at 1600 ° C. for 2 hours in a mixed gas atmosphere of N ₂ and H ₂ and sintered to complete the ceramic multilayer wiring board 1.

The step 102 in FIG. 1B will be described with reference to FIG. The ceramic multilayer wiring board 1 after sintering had a warp of 0.15 mm to 0.8 mm on the thin film formation surface side. Next, the thin film formation surface side of this substrate 1 was ground by surface grinding using diamond powder so that the surface warp and waviness were 20 μm or less. At this time,
Only the portion of the through-hole pattern 2 formed on the surface of the substrate 1 formed by the holes is ground, and the function of the multilayer wiring is not affected. By this grinding, the surface of the substrate 1 is
It is composed of the surface of the ceramic material of the substrate 1 and the tungsten conductor pattern 3 of the through hole pattern 2 exposed by grinding. On the surface of the ceramic material of the substrate 1, voids 5 generated during sintering are exposed by grinding, and the size is 5 μm.
Depressions of m to 20 μmφ were generated at a rate of about 100 / mm ² .

The step 103 in FIG. 1B will be described with reference to FIG. In the step 102, a metal plating layer 7 is formed on the exposed through-hole pattern 2 of the ceramic multilayer wiring substrate 1 by electroless plating with a gold plating film having a thickness of about 5 μm. The electroless plating method is used because the laminated metal film has no pinhole and has a constant thickness. In FIG. 1A, 10 of FIG.
Step 4 will be described. The thermal expansion coefficient is 45 to 55 × 1 from many kinds of glass materials containing boron oxide and silica as main components.
A material having a composition of 0 to ⁷ / ° C. is selected, and this powder is made into a paste.

The paste material is screen-printed to form a 30 μm thick coating film on the entire surface of the ceramic multilayer wiring substrate 1 on which the thin film is to be formed, and then the paste is formed in a N ₂ atmosphere at a temperature of 1000 to 1100 ° C. for 4 hours. Heat treatment for an hour. By this heat treatment, the glass softens and fills the recesses 6 on the surface of the substrate 1, and at the same time, the bubbles contained in the glass insulating layer 8 disappear. Further, the thickness thereof contracted to about 15 μm. After the glass layer 8 is formed, the second surface grinding is performed until the gold plating film previously formed on the surface of the substrate 1 is exposed to complete the ceramic multilayer wiring substrate 1. The surface of the completed substrate 1 has the number of uneven defects of 5 μmφ or more reduced to about 0.01 / cm ² and shows a favorable state for forming the fine thin film wiring pattern 10.

The step 105 in FIG. 1B will be described with reference to FIG. First, on the surface of the substrate 1, Cr / Al / Cr
Films (0.1 μm, 5 μm, 0.1 μm thick) are formed by sputtering, and photoetching is performed.
Circular metal pads 10c for connection having a size capable of absorbing the displacement of the positions of the through holes caused by shrinkage variation during sintering of the ceramic substrate were formed at the positions corresponding to the respective through holes 2. Thereafter, a varnish of a polyimide-based organic material is dropped to coat the ceramic multilayer wiring board 1 uniformly. The thickness is set to 10 μm after curing. After heat treatment and curing, irregularities due to irregularities on the surface of the substrate 1 were formed on the surface of the polyimide-based organic material film, but in the substrate of this example, no concave portion having a diameter of 5 μmφ or more and a depth of 2 μm or more was observed.

After the organic material film was cured, a through hole 2 having a diameter of 30 μm was formed in the organic cured film by photoetching. A high accuracy of ± 2 μm was obtained for the through hole diameter at this time. With conventional boards that do not include the grinding process of the board surface,
The value of this diameter was about ± 20 μm, and practically, the miniaturization of through holes was limited to a diameter of 50 μm. After that, wiring was formed on the organic film with the same film structure as that of the surface of the substrate 1, and through-hole formation was repeated to form a thin film multilayer wiring pattern having a desired number of layers. In this case, the wiring width is 5
It is possible to reduce the size to about μm, and in the ceramic multilayer wiring substrate 1 in which 10 wiring layers are formed, unevenness of the surface of the substrate, disconnection of wiring due to warpage, and short circuit between wirings were not observed.

[Embodiment 2] Another embodiment of the present invention will be described. FIG. 1B of FIG. 1A in [Example 1]
103 step, the conductor tungsten pattern 3 on the through hole pattern 2 exposed by surface grinding
As the metal coating layer 7 for covering, a double structure of nickel 5 μm thickness and electroless gold plating 3 μm thickness was adopted, and the other steps were the same. In this case, in the heat treatment process of the glass layer 8, diffusion occurs between nickel and tungsten and between gold and tungsten, and the connection tensile strength between the plating film 7 and the pads on the conductive tungsten pattern 3 is 1 per through-hole pad. Values over 1 kg were obtained. On the other hand, in the heat treatment step, oxidation of nickel in the nickel / gold diffusion layer was recognized, but when grinding the glass insulating layer 8,
If the gold plating layer 7 is ground by 1 μm or more,
An ohmic contact was obtained between the pad on the conductive tungsten pattern 3 and the thin film wiring pattern 10.

[Embodiment 3] Still another embodiment of the present invention will be described. FIG. 1 of FIG. 1A in [Example 1]
In step 101 (b), mullite powder and alumina, silica, magnesia glass powder were mixed as a ceramic substrate material in a weight ratio of 7: 3, and the through hole pattern 2 was formed in the same manner as in [Example 1]. Formation, conductor pattern 3 formation, thin film formation surface grinding treatment, and thin film pattern 10 formation were performed, and similar results were obtained. In the substrate of the present embodiment, the dielectric constant of the ceramic is 6 or less as compared with about 9 in [Example 1], and the signal propagation speed in the ceramic portion of the substrate 1 is 30.
I was able to improve it.

[Embodiment 4] Still another embodiment of the present invention will be described. FIG. 1 of FIG. 1A in [Example 1]
In step 101 of (b), alumina powder and borosilicate glass powder were mixed as a ceramic substrate material in a weight ratio of 5: 5, and green sheet molding and through hole pattern were performed in the same manner as in [Example 1]. After forming 2, the through hole was filled with a copper powder paste, the conductor pattern 3 was formed, and pressure bonding was performed to realize a multilayer wiring structure. After this, in a N ₂ atmosphere, 900 ° C., 1
Heat treated and sintered for hours. The substrate showed the same warp of 0.15 mm to 0.8 mm as in [Example 1]. After sintering,
The same surface grinding as in [Example 1] was performed, and [Example
1] in step 103 of FIG. 1A, the metal film layer 7 covering the conductor pattern 3 on the through-hole pattern 2 has a nickel film thickness of 5 μm and a gold film thickness of 3 μm.
A double-structured plating film having a thickness of m was formed.

After that, as shown in FIG.
In the step 104 of FIG. 1B of FIG. 1A, a borosilicate glass powder that softens at a lower temperature than the alumina powder used as the substrate material and the alumina-silica-magnesia glass powder glass is used. ], The glass layer 8 was formed on the substrate surface. The heat treatment at this time was performed at 800 ° C. for 8 hours. At the time of this heat treatment, mutual diffusion occurs between copper, nickel and gold, but if only gold is used as the metal film layer 7, gold will diffuse rapidly into the copper of the conductor pattern 3 from the surface of the substrate 1. Since the protrusion of gold formed by plating is eliminated, the glass layer 8 remains as it is during the subsequent grinding.
It becomes impossible to expose the gold plating layer which is the metal film layer 7. Thereafter, the thin film wiring pattern 10 was applied in the same manner as in [Example 1] to complete the substrate. According to this embodiment, the wiring resistance in the ceramic substrate can be reduced, so that the signal level in the ceramic substrate can be prevented from lowering.

[Embodiment 5] Still another embodiment of the present invention will be described. 1 of FIG. 1 (a) performed after grinding the glass layer 8 on the thin film formation surface of the ceramic multilayer wiring substrate 1.
The heat treatment in the step 104 of (b) is performed in [Example 1],
Regarding the molded product in [Example 3], 110
Remolding was performed at 0 ° C. for 1 hour, and for the molded product in Example 4, 800 ° C. for 1 hour. When this step is added, the scratches on the surface of the glass layer 8 at the time of grinding and the surface irregularities 6 caused by the voids 5 in the glass layer 8 remaining in a small amount are flattened, and the reheat treatment is not performed.
The surface defect rate obtained in 1] could be reduced to about 10%.

[0030]

As described above in detail, according to the present invention, the warp of the ceramic multi-layer substrate, which is an essential defect of the ceramic multi-layer substrate, which occurs during sintering is removed, the exposed surface is made flat, and the pattern accuracy is improved. Accuracy, wiring density is high, and since the raw material of the ceramic multilayer substrate is particles, the irregularities on the surface and the cavities due to residual holes are removed,
It is possible to obtain a ceramic multi-layer / thin-film multi-layer hybrid multi-layer wiring board that can miniaturize the thin-film wiring pattern and highly miniaturize the wiring. Furthermore, the above-mentioned high-density wiring and miniaturization of thin-film wiring patterns enable electronic components such as LSIs to be mounted on a board, and the wiring length for connecting LSIs can be significantly reduced. In particular, signal delay in board wiring In a large-sized computer where is a problem, it has a remarkable effect on the performance improvement.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a multilayer wiring board according to an embodiment of the present invention and an explanatory view showing a manufacturing process.

[Explanation of symbols]

 1 Ceramic Multilayer Wiring Board 2 Through Hole Pattern 3 Conductor Pattern 4 Input / Output Pin Pad 5 Void 6 Recess 7 Metal Coating Layer 8 Glass Layer

Claims (4)

[Claims] 1. A multilayer wiring board comprising a ceramic substrate having inner layer wiring for connecting front and back surfaces in a thickness direction of the substrate, and a thin film wiring pattern formed on the ceramic substrate. A through hole pattern having a conductor pattern formed to have a thickness capable of retaining a wiring function even if the through hole pattern is removed by grinding on a substrate, and the through hole pattern is surface ground. And exposing the conductor pattern, and covering the exposed conductor pattern with a metal coating layer coated with a metal that does not oxidize during the subsequent glass layer formation, and the entire surface of the ceramic substrate including at least the metal coating layer. A multi-layer wiring board, which is provided with a glass layer, the glass layer being coated with the metal coating layer exposed by surface grinding. 2. The multi-layer wiring according to claim 1, wherein the pad material of the conductor pattern is at least tungsten or molybdenum or a composite material thereof, and the metal coating layer is at least gold. substrate. 3. The conductive pattern pad material is copper,
2. The multilayer wiring board according to claim 1, wherein the metal coating layer has a double structure of nickel and gold. 4. The multilayer wiring board according to claim 1, wherein the glass layer with the metal coating layer exposed is heat-treated at a temperature at which the glass softens to form a softened glass layer.