JPH0660814A - Plasma display panel and its driving method - Google Patents

Abstract

PURPOSE: To continue the discharge of a scanning electrode for a long time, and also give high discharge responsiveness for prolonging lifetime by protecting the scanning electrode and a common electrode with a dielectric layer, when both the electrodes are provided between panels. CONSTITUTION: Front and back surface plates 1a and 2a are separated at a given interval for having the interval filled with a discharge gas. A large number of display electrodes 30a on a stripe are provided in a row on the inner surface of the front surface plate 1a, and scanning and common electrodes 10a and 20a are alternately provided on the same plate between vertical dielectric layers 13a and 14a, formed on the back surface plate 2a. A first terminal 11a and a second terminal 12a below it are provided, with the dielectric layer 13a being interposed, on the end part of the electrode 10a. Thus, the dielectric layer 13a between the terminals 11a and 12a is made to fulfil a role as a capacitor layer 131a, and the terminal of the common electrode 20a is made in a direction opposite to the terminal 11a to be electrically connected light-transmittedly as a whole. The electrodes 10a and 20a are provided, while being separated by using the dielectric layer 14a, on the surfaces of the electrodes 10a and 20a and on the surface of the dielectric layer 13a which is exposed between these electrodes 10a and 20a.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly to a structure and driving method of an AC-DC hybrid memory type plasma display panel.

[0002]

2. Description of the Related Art It is a well known fact that plasma display panels are generally classified into an AC type and a DC type according to their discharge method. In the AC type plasma display panel, the discharge is generated by the AC driving voltage through the dielectric layer, and in the DC type plasma display panel, the DC driving voltage is supplied in the state that the two opposite electrodes are directly exposed to the discharge space. Occur.

Such a plasma display panel is subdivided into various types according to its internal structure.
Recently, a plasma display panel has been proposed to improve the low brightness, which is a disadvantage of the plasma display panel, and to improve the response. Typical examples thereof are "DC type pulse memory plasma display panel" of NHK Broadcasting Technology Laboratories (see JP-A-62-211831) and "Trigger discharge type plasma display panel" of Sony Corporation (US Pat. 562, 434)).

The NHK plasma display panel is
By applying the memory discharge effect so that the brightness is improved through the longer extended discharge, even if the discharge is transferred to another discharge line, the preceding discharge of the previous line can be up to 1 frame (one frame). (A completed screen) of a piece.

Such a plasma display panel of NHK Broadcasting Technology Laboratories uses "space charge" inside the panel as its memory means, but the discharge sustain voltage is externally lower than the discharge start voltage and higher than the discharge sustain voltage. A method in which the memory discharge is sustained by applying a pulse is adopted. However, it is actually very difficult to apply a high frequency discharge sustaining pulse to the electrodes on both sides of the plasma display panel, and abnormal operations often occur during operation. Utilizing space charge as a memory means is not easy either.

The plasma display panel manufactured by Sony Corporation has nothing to do with the memory, and it is merely for shortening the discharge start time after application of a signal and improving the response thereof. A wall charge is formed around the wall discharge, and the wall charge acts on the voltage that is actually applied during the main discharge, so that the display discharge can be rapidly generated.

In the above-mentioned conventional plasma display panel, in the case of the NHK plasma display,
Since it is a DC type, it is necessary to improve the material of the cathode that is exposed to the discharge space and is bombarded by discharge ions, and to extend the life of the cathode by suppressing cathode damage. Although the above material is used as a paste, satisfactory results have not been obtained, and there is still a problem with extending its life. And since it is a DC type, it cannot hold a memory in principle, so-called line sequential (L
Under the ine scanning driving method, desired brightness cannot be obtained.

As a method for solving this, after all,
Although the memory is embodied as a circuit, as a result, the number of discharges is larger than that of the line-sequential driving method, which is also disadvantageous in terms of life. In addition, when applied to a color type, the mass of the discharge gas is heavier than that of the gas in the monochromatic type, and the discharge voltage is high, so there is a great concern about damage to the cathode.

In the case of Sony's plasma display panel, since the trigger discharge is used, its response is excellent, but since the memory function is not actually given, its brightness is disadvantageous compared to other plasma display panels. Is.

As another example of the known AC type plasma display panel, there is the US Pat.
No. 349 can be cited as an example. This has a structure in which a cathode and an anode of a simple XY matrix type are arranged on a front plate and a rear plate, and a discharge electrode group for address and a discharge electrode group for sustaining discharge are overlapped. Has a complex structure that can be equipped. Since the plasma display panel is driven by an alternating current type, its driving circuit is complicated.

Meanwhile, Tomson of France proposed a plasma display panel having a new structure through European Patent Publication No. 357,485 (A1). This plasma display panel has a structure in which a Y electrode to which a sustain voltage and a scan voltage are applied and a E electrode to which the sustain voltage is applied are provided so as to be orthogonal to the data electrode (or the X electrode). Since the cost of the electrode driver is high and the memory system uses AC discharge, the duty of light emission is long and the electrodes are easily destroyed by the high heat accumulated in the driver.

[0012]

SUMMARY OF THE INVENTION An object of the present invention is to improve the structure of an AC-DC composite memory type in which the structure is improved so that only the advantages of the conventional DC type plasma display panel and AC type plasma display panel can be selectively provided. It is to provide a plasma display panel.

It is another object of the present invention to provide a memory type plasma display panel which has a simple structure, can perform stable discharge, and has improved durability.

Another object of the present invention is to provide a memory type plasma display panel suitable for displaying a color image.

[0015]

In order to achieve the above-mentioned object, the plasma display panel of the present invention is separated from each other at a predetermined interval to form a discharge space filled with a discharge gas therebetween. A front plate and a back plate facing each other, a large number of display electrodes formed in an inner surface of the front plate and arranged in the first direction, and arranged on the back plate in a second direction orthogonal to the first direction. And a first terminal electrically connected directly to one end of each of the discharge spaces by being protected by a dielectric layer coated on them, without being in contact with the gas in the discharge space, A large number of stripe-shaped scan electrode groups each having a second terminal indirectly connected to a capacitor layer made of a dielectric material, and the first terminal together with the back plate, and a capacitor having the dielectric layer as a medium. And one common electrode that forms a bond, a plurality of partition walls provided alongside the first terminal on the rear plates and the front plate, there is the feature that comprises a.

In the present invention as described above, the common electrode is formed as a single type under the scanning electrode in a single layer, and a dielectric layer is provided between them to form a common layer. Form a sandwich structure.

Another type of the common electrode is separately formed into a large number of stripe-shaped elements that are electrically commonly connected.

At this time, the divided common electrode elements are provided below the scan electrodes with a dielectric layer interposed therebetween, as in the above type.

On the other hand, the divided elements of the common electrode are arranged side by side and alternately in the same plane as the scan electrodes, and the dielectric layer is provided on the elements of the scan electrodes and the common electrode. By being provided, one AC discharge structure is formed.

In the above type, the mutual position of the scan electrode and the common electrode is determined so that discharge can be performed through the discharge space.

On the other hand, according to the driving method of the present invention for driving the plasma display panel, (a) a standby voltage of 0 V is applied to the second terminals and the common electrodes of all scan electrodes for standby of the memory discharge. First and second memory signals having periodic first and second memory pulse components having a sustaining potential are applied, and the pulses of the first and second memory signals are applied to the second terminal of the scan electrode and the common electrode. Are alternately applied to each other, and a discharge sustaining voltage difference for memory discharge is maintained between the scan electrode and the common electrode in a predetermined cycle.
(B) In order to start the discharge, the first and second addressing signals are supplied to the display electrode and the second terminal of the scan electrode which are orthogonal to the scan electrode while maintaining a predetermined distance from the scan electrode. When the potential difference between the signals is 0 volt, the first and second addressing signal groups are applied.
Bias voltages of different potentials having a potential difference equal to or lower than the discharge sustaining voltage are provided, and a relative potential difference between the potentials has a potential difference equal to or higher than the discharge start voltage, and at the same time, each of the first and second
The memory cell has first and second writing pulses of a predetermined cycle having a potential difference less than or equal to the discharge sustaining voltage, and (c) when the second memory pulse is applied to the common electrode to end the discharge, The feature is that a pulse having a potential difference with the second memory pulse having a value equal to or higher than the discharge start voltage is applied through the second terminal of the scan electrode.

On the other hand, another driving method of the present invention for driving the plasma display panel is as follows: (a) Since the memory discharge is on standby, the first memory signal is applied to the second terminals and common electrodes of all scan electrodes. And a second memory signal is applied, the first memory signal has a bias potential of 0 volt as an alternating rectangular wave, and has an equipotential positive memory pulse component and a negative memory pulse component, and the second memory signal is the The first memory signal has a phase opposite to that of the first memory signal, the relative potential difference between the scan electrode and the common electrode is lower than the discharge start voltage, and the potential difference capable of maintaining discharge is maintained. While maintaining a predetermined distance, the first and second addressing signals are applied to the display electrodes and the first terminals of the scanning electrodes which are orthogonal to the first and second addressing signals. The first and second addressing signal groups are applied when the potential difference between the memory signals is 0 volt, and the first and second addressing signal groups have a potential difference equal to or lower than the discharge sustaining voltage constantly applied to the first terminal of the scan electrode and the display electrode. Bias voltages of different potentials and their relative potential difference has a value equal to or higher than the discharge start voltage, and at the same time, each has a potential difference equal to or lower than the first and second memory pulses and the discharge sustaining voltage. A pulse, and (c) when the first and second memory pulses are applied to the second electrode of the scan electrode and the common electrode to end the discharge, the first electrode of the scan electrode is used to supply the first and second memory pulses. The characteristic is that a pulsed erase signal having a potential difference of 2 memory pulses or more and a potential difference or more is applied.

In the driving method of the present invention as described above,
First and second applied to the second electrode of the scanning electrode and the common electrode
The bias voltage of the memory pulse is the same, and the first
The bias voltage of the erase pulse applied to the terminal is equipotential to the bias voltage of the writing signal.

In particular, it is desirable that the bias voltage of the first writing signal be lower than the potential of the second writing signal so that the first writing signal is positive and the second writing signal is negative.

[0025]

The plasma display panel of the present invention has the AC type memory discharge structure in which the scanning electrode and the common electrode between which discharge is sustained for a long time are protected by the dielectric layer so as to be stable. Unlike the DC type discharge structure, there is no difficulty in selecting the electrode material, and the addressing discharge is a DC discharge method, so the circuit configuration of the addressing part is easy and the discharge for addressing is AC discharge. Unlike the method, it occurs quickly without being delayed. That is, the present invention has an AC-DC composite type discharge structure in which the advantages of the DC type plasma display panel and the AC type plasma display panel are the same.

[0026]

The present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is an equivalent circuit of a plasma display panel which expresses the concept of the present invention in detail.

A large number of pairs of memory electrodes formed of the scan electrodes 10 and the common electrode 20 are arranged side by side in the horizontal direction. A first terminal 11 and a second terminal 12 are provided at each end of the scan electrode 10. The first terminal 11 is directly connected to the scan electrode 10 and is connected to the scan drive X.
Are indirectly connected to the scan electrodes 10 through the capacitors 13. The common electrodes 20 are commonly connected and always maintain the same potential. AC rectangular waves of opposite phases are applied to the second terminal 12 of the scan electrode 10 and the common electrode 20, respectively, and the relative potential thereof periodically maintains a discharge sustaining voltage equal to or lower than the discharge start voltage.

Here, the discharge sustaining voltage (Discharge)
“Sustaining voltage” is a general term for a potential that sustains a discharge that has already started.
It is lower than the discharge starting voltage (Firing voltage). Then, the first terminal 11 of the scan electrode 10 and the display electrode 30
, Two writing pulses whose relative potential difference has a discharge start voltage are applied from the scan drive X and the data drive Y. This writing pulse is applied when the relative potential difference between the discharge sustaining signals applied to the second terminal 12 of the scan electrode 10 and the common electrode 20 is 0 V, and the potential difference between these sustaining signal groups must be smaller than the discharge starting voltage. I have to.

<Embodiment 1> Referring to FIG. 2, FIG. 3 and FIG. 4, the front plate 1a and the rear plate 2a are separated from each other by a predetermined distance so that a gas space filled with a discharge gas is formed therebetween. Form. A large number of stripe-shaped display electrodes 30a are arranged side by side on the inner surface of the front plate 1a. The scanning electrodes 10a and the common electrodes 20a are alternately formed on the same plane between the upper and lower dielectric layers 13a and 14a formed on the back plate 2a, and the first terminals 11a are formed at the ends of the scanning electrodes 10a.
And a second terminal 12a is provided under the dielectric layer 13
It is provided with a interposed.

The second terminal 12a is composed of a single body extending in the direction in which the first terminals 11a are arranged, and may be separated into an independent form corresponding to each scan electrode 10a, if necessary.

The dielectric layer 13a is formed on the inner surface of the back plate 2a, and its tip portion is the first terminal 11a.
And the second terminal 12a, the capacitor layer 131 between the first terminal 11a and the second terminal 12a.
Serves as a. At this time, the second terminal 12a can approach the scan electrode 10a to the extent that it does not overlap the common electrode 20a.

In the above structure, the second terminal 12
Since the overlapping area of “a” and the first terminal 11a and / or the scanning electrode 10a and the distance therebetween change the capacitance of the capacitor 131a, the necessary overlapping area and the thickness of the dielectric layer 13a should be adjusted according to the design conditions. Is.

On the other hand, the terminal of the common electrode 20a is the first terminal 1
It is provided in a direction opposite to 1a and is electrically commonly connected as a whole. Then, the scanning electrode 10a and the common electrode 20a
An upper dielectric layer 14a is formed on the surface of the dielectric layer 13a and the surface of the dielectric layer 13a exposed between them to isolate the scan electrode 10a and the common electrode 20a from the gas space.

<Embodiment 2> Referring to FIGS. 5 and 6, the front plate 1b and the rear plate 2b are separated from each other by a predetermined distance to form a gas space filled with the discharge gas therebetween. An upper insulating layer 14b is formed on an upper portion of the back plate 2b, and a plurality of scanning electrodes 10b each having a first terminal 11b at the tip thereof are arranged below the upper insulating layer 14b.

A lower dielectric layer 13b is formed under the scan electrode 10b. A common electrode 20b located below the scan electrode 10b and a second terminal 12b located below the first terminal 11b of the scan electrode 10b are provided between the lower dielectric layer 13b and the back plate 2b. To be

The second terminal 12b comprises one body extending in the direction in which the first terminal 11b is arranged, and may be separated into a large number of independent elements corresponding to each scanning electrode, if necessary.

The dielectric layer 13b is formed on the inner surface of the back plate 2b, and its tip portion is the first terminal 11b.
By being provided between the second terminal 12b and the second terminal 12b, it functions as a capacitor layer. At this time, the second terminal 12b is not overlapped with the common electrode 20b so that the second electrode 12b does not overlap with the common electrode 20b.
Can be up to.

In the above structure, the second terminal 12
Since the overlapping area of b and the first terminal 11b and / or the scanning electrode 10b and the interval between them change the capacitance of the capacitor, the necessary overlapping area and the thickness of the dielectric layer should be adjusted according to the design conditions. is there.

On the other hand, the terminal (not shown) of the common electrode 20b is provided in the direction opposite to the first terminal 11b, and the whole is electrically commonly connected.

The second embodiment having such a structure is characterized in that the stripe-shaped common electrode 20b is located on a plane different from that of the scanning electrode 10b, and in some cases, it is shown in FIG. As described above, the scan electrode 10b and the common electrode 20b may be positioned so as to be offset from each other.
Further, while the common electrode 20b is arranged in the direction orthogonal to the scan electrode 10b, the whole can be electrically connected in common, but it is practically the same as the case where the common electrode 20b is arranged in the same direction as the scan electrode 10b. is there.

In this way, the common electrode 20b becomes the scanning electrode 10
If it is formed on a plane different from b, the arrangement interval of the scanning electrodes 10b is considerably narrowed, so that higher density image formation can be performed as compared with the first embodiment.

<Third Embodiment> This embodiment has a structure similar to that of the second embodiment, except that the common electrode 20c is formed as a single layer on the surface of the back plate 2b as shown in FIG. There is a difference.

Hereinafter, a driving method of the present invention for driving the plasma display panel having the above structure will be described with reference to two embodiments.

The driving method of the present invention is divided into three steps.
The first stage is a pre-discharge stage, which is a standby drive stage in which the discharge is maintained for a predetermined period if the discharge is triggered, and the second stage is a discharge space in the standby drive stage. The third step is a step of ending the discharge which is sustained after a predetermined period of time.

In the standby stage, a pulsed memory signal is applied to the scan electrode and the common electrode, and the potential between both electrodes is maintained by maintaining discharge. At this time, both electrodes serve as a cathode and an anode, respectively. Alternate. And
In the ignition stage, a pulse for writing a discharge start voltage is applied to the scan electrode and the data electrode, and in the discharge end stage, a pulse for the discharge start voltage is applied to the data electrode and the scan electrode for a very short time.

<First Embodiment of Driving Method> A first embodiment of the driving method will be described with reference to FIGS. 1 and 9.

In the standby state of the memory discharge, the first and second memory pulse components for each period T having the bias voltage of 0 volt and the discharge sustaining potential Vs are applied to the second terminals and the common electrode of all the scan electrodes. The first and second memory signals A1 and B1 possessed are respectively applied. Therefore, the pulses A11 and B11 of the first and second memory signals having the bias potential of 0 V are applied to the second scan electrode at the interval of the half cycle T / 2.
Since the terminals and the common electrode are alternately applied, the scan electrode and the common electrode alternately serve as a cathode and an anode at intervals of a half cycle. Then, during the period t in which the memory pulse is applied, the discharge sustaining voltage difference for the memory discharge is maintained between the scan electrode 10 and the common electrode 20.

To start the discharge, the first and second addressing signals C are applied to the first terminals of the display electrodes and the scan electrodes which are orthogonal to the scan electrodes while maintaining a predetermined distance from the scan electrodes.
1, D1 is applied when the potential difference between the first and second memory signals A1B1 is 0 volt. Therefore, discharge is started between the display electrode and the scan electrode by the first and second addressing signals C1 and D1. At this time, the discharge accumulates wall charges on the dielectric layers 14a and 14b covering the scan electrodes 10 and is eventually extinguished, so that the priming particles (priming particles) are discharged into the space.
particle) floats. The wall charge is applied with the sustaining voltage in the next cycle to increase the level of the deactivation voltage applied to the discharge cell, so that the discharge is started or sustained even by the potential difference below the discharge starting voltage.

That is, the first and second memory signals A having a potential lower than the initial discharge start voltage in the state where the wall charges are generated.
If the periodic memory pulse of 1, B2 is applied to the scan electrode and the common electrode, the discharge is sustained by the wall charges.

First and second addressing signals C1,
D1 has bias voltages 3Vs / 4 and Vs / 4 having different potentials, but these bias voltages have a relative potential difference that is equal to or lower than the discharge sustaining voltage Vs. Therefore, when the bias voltage of the addressing signal group is applied, since the potential difference between all the electrodes has a value equal to or lower than Vs / 2, that is, the discharge start voltage, the discharge does not start. Then, in such a state, the first and second writing pulses C11 and D11 having a relative potential difference between the voltages and the discharge start voltage are applied to the first terminal of the scan electrode 10 and the display electrode 30 for a predetermined time Tw. Addressing discharge starts only when applied. At this time, the first and second writing pulses C11 and D11 have a potential difference equal to or lower than the discharge sustaining voltage with respect to the first and second memory pulses A11 and B11.
Is only evoked between.

On the other hand, if the erase pulse is applied at a certain point in time when the memory discharge as described above is continued, the wall charges disappear and the discharge is stopped. The discharge is completed by suppressing the generation of wall charges that sustain the memory discharge at the discharge start voltage or less. The suppression of wall charge generation is possible by giving a strong discharge for a very short time without giving a time margin for wall charge formation.

Therefore, in order to end the memory discharge,
When the second memory pulse B11 is applied to the common electrode,
The second memory pulse B11 is applied to the second terminal 12 of the scan electrode 10.
Erase pulse D whose relative potential difference with
12 is added for a short period of time Tw / 10-Tw / 5 to suppress the generation of wall charges.

<Embodiment 2 of Driving Method> Referring to FIGS. 1 and 10, the first memory signal A2 and the second memory are connected to the second terminals and the common electrodes of all the scan electrodes for the standby of the memory discharge. The signal B2 is applied. The first memory signal A1 has a bias potential of 0 volt as an AC rectangular wave, and has a positive memory pulse component A21 and a negative memory pulse component A22 having potentials of Vs / 2 and -Vs / 2. The second memory signal B2 having the negative memory pulse component B21 and the positive memory pulse component B22 has a phase difference of 180 ° with respect to the first memory signal A2, that is, has the opposite phase of the first memory signal. Therefore, according to the first and second memory signals, the relative potential difference between the scan electrode 10 and the common electrode 20 is lower than the discharge start voltage.

To start the discharge, the first and second addressing signals C2 and D2 are applied to the display electrode 30 and the first terminal 11 of the scan electrode 10 which are orthogonal to the scan electrode 10 while maintaining a predetermined distance. 1, second memory signal A2
It is applied when the potential difference between B2 is 0 volt. The first and second addressing signals C2 and D2 are applied to the scan electrode 10
Of the bias voltage 3Vs / 4 and -Vs / 4 of different potentials having a potential difference equal to or lower than the discharge sustaining voltage Vs constantly applied to the first terminal 11 and the display electrode 30, and at the same time, the relative potential difference is discharged. Each of the first and second memory pulses A21 and B2 has a value equal to or higher than the start voltage.
1 and the first and second writing pulses C21 and D21 having a relative potential difference equal to or less than the sustaining voltage.

Then, when the first and second memory pulses A21 and B21 are applied to the second electrode 12 of the scan electrode 10 and the common electrode 20 to complete the discharge, the first electrode of the scan electrode 10 is discharged.
An erase pulse D22 having a potential difference from the second memory pulse B21 having a value equal to or higher than the discharge start voltage is applied through the terminal 11 for a short time Tw to suppress the generation of wall charges, thereby ending the memory discharge.

In the driving method of the present invention as described above,
First and second applied to the second terminal of the scanning electrode and the common electrode
The bias voltage of the memory pulse is the same, and the first
The bias voltage of the erase pulse applied to the terminal has the same potential as the bias voltage of the writing pulse. In particular, the bias voltage of the first writing pulse maintains a lower potential than that of the second writing pulse, the first writing pulse is a positive potential, and the second writing pulse is a negative potential.

[0058]

As described above, according to the plasma display panel of the present invention, the AC type in which the scanning electrode and the common electrode between which discharge is sustained for a long time are protected by the dielectric layer are stabilized. Since it has a memory discharge structure of
Unlike the DC type discharge structure, there is no difficulty in selecting the electrode material, and the addressing discharge is substantially a DC discharge type, so the circuit configuration of the addressing part is easy and the discharge for addressing is an AC discharge type. Unlike the above, it occurs quickly without being delayed.

That is, the present invention has an AC-DC composite type discharge structure in which the advantages of the DC type plasma display panel and the AC type plasma display panel are the same. In addition, stable AC type memory discharge can be performed at the time of discharge, which has stable discharge and high responsiveness as compared with the conventional plasma display panel, and has a long life.

It is needless to say that the present invention, which is more suitable for displaying a color image than the monochrome type, is not limited to the embodiments exemplified above, and is modified into various forms based on the embodiments. Is possible.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a plasma display panel according to the present invention.

FIG. 2 is a partially cutaway perspective view of a first embodiment of a plasma display panel according to the present invention.

FIG. 3 is a sectional view taken along line III-III in FIG.

FIG. 4 is a sectional view taken along line IV-IV in FIG.

FIG. 5 is a partially cutaway perspective view of a second embodiment of the plasma display panel according to the present invention.

6 is a sectional view taken along line VI-VI of FIG.

FIG. 7 is a sectional view showing another modification of the second embodiment of the present invention as a drawing corresponding to FIG. 6;

8 is a sectional view of a plasma display panel according to a third embodiment of the present invention, which corresponds to FIG.

FIG. 9 is a driving waveform diagram showing a first embodiment of a plasma display panel driving method according to the present invention.

FIG. 10 is a driving waveform diagram showing a second embodiment of the plasma display panel driving method according to the present invention.

[Explanation of symbols]

 1, 1a, 1b Front plate 2, 2a, 2b Back plate 10, 10a, 10b Scan electrode 11 First terminal 12 Second terminal 13 Capacitor 20, 20a, 20b Common electrode 30, 30a, 30b Display electrode

Claims (14)

[Claims] 1. A front plate and a back plate facing each other, which are spaced apart from each other by a predetermined distance to form a discharge space filled with a discharge gas, and are formed on an inner surface of the front plate. A large number of display electrodes arranged in a first direction, and arranged on the back plate in a second direction orthogonal to the first direction, and protected by a dielectric layer coated on them. A plurality of terminals each having a first terminal electrically connected directly to one end thereof without being in contact with the gas in the discharge space and a second terminal indirectly connected thereto through a capacitor layer made of a dielectric material. A striped scan electrode group, one common electrode that is provided on the back plate together with the first terminal and forms capacitive coupling through a dielectric layer, and the first terminal between the front plate and the back plate. Prepared side by side Plus Madi sley panel characterized by comprising a plurality of barrier ribs, a. 2. The common electrode is formed as a single layer under the scan electrode, and a dielectric layer is provided between them to form a sandwich structure with them. Item 2. A plasma display panel according to item 1. 3. The common electrode is separated and formed into a large number of stripe-shaped elements that are electrically commonly connected, and the divided common electrode elements have a dielectric layer under the scan electrode group. The plasma display panel according to claim 1, wherein the plasma display panel is provided. 4. The divided elements of the common electrode are arranged side by side and alternately on the same plane as the scan electrodes, and the elements of the scan electrode and the common electrode are arranged between and above the scan electrode and the common electrode. The plasma display panel as claimed in claim 3, wherein a dielectric layer is provided to form one AC discharge structure. 5. The common electrode is provided under the scan electrode with an insulating layer interposed.
The plasma display panel described. 6. The plasma display panel as claimed in claim 5, wherein the common electrode is formed in a single layer. 7. The plasma according to claim 5, wherein the separated striped elements, in which the common electrode is separated and formed into the plurality of aligned striped elements, are electrically connected in common. Display panel. 8. The plasma display panel according to claim 7, wherein the stripe-shaped elements of the common electrode are arranged in a direction along with the scanning electrodes. 9. The plasma display panel as claimed in claim 8, wherein each stripe-shaped element of the common electrode is positioned so as to be offset from each of the scanning electrodes by a predetermined width. 10. The plasma display panel according to claim 7, wherein the striped elements of the common electrode are arranged in a direction orthogonal to the scan electrodes. 11. The capacitor according to claim 1, wherein the first terminal and the second terminal are provided to face each other with a dielectric layer interposed therebetween.
The plasma display panel according to any one of items. 12. The plasma display panel as claimed in claim 11, wherein the second terminal comprises a single body arranged in the arrangement direction of the first terminals. 13. A method of driving a plasma display panel, comprising: (a) a periodic discharge having a discharge sustaining potential of 0 volt on the second terminal and the common electrode of all scan electrodes for standby of memory discharge. First and second memory signals having first and second memory pulse components are respectively applied, and the pulses of the first and second memory signals are alternately applied to the second terminal of the scan electrode and the common electrode, A discharge sustain voltage difference for memory discharge is maintained between the scan electrode and the common electrode in a predetermined cycle, and (b) a display electrode orthogonal to the scan electrode while maintaining a predetermined distance from the scan electrode for starting discharge. And a second terminal of the scan electrode
An addressing signal is applied when the potential difference between the first and second memory signals is 0 volt, and the first and second addressing signal groups have different potential bias voltages having a potential difference equal to or lower than the discharge sustaining voltage. Has a potential difference equal to or higher than the discharge start voltage, and at the same time, each has first and second writing pulses of a predetermined cycle having a potential difference equal to or lower than the discharge sustaining voltage, and (C) When the second memory pulse is applied to the common electrode to end the discharge, a pulse having a potential difference with the second memory pulse that is equal to or higher than the discharge start voltage is applied through the second terminal of the scan electrode. The method for driving a plasma display panel according to claim 1, wherein the method is as follows. 14. A method of driving a plasma display panel, comprising: (a) applying a first memory signal and a second memory signal to the second terminals and common electrodes of all scan electrodes for standby of memory discharge; The first memory signal has a bias potential of 0 volt as an AC rectangular wave, has a positive memory pulse component and a negative memory pulse component of equipotential, and the second memory signal has an opposite phase to the first memory signal. Further, the relative potential difference between the scan electrode and the common electrode is lower than the discharge start voltage, and the potential difference capable of sustaining discharge is maintained. (B) For starting discharge, while maintaining a predetermined distance from the scan electrode, The first terminals of the display electrodes and the first terminals of the scanning electrodes which are orthogonal to each other are
An addressing signal is applied when the potential difference between the first and second memory signals is 0 V, and the first and second addressing signal groups are constantly applied to the first terminal of the scan electrode and the display electrode. Bias voltages having different potentials less than or equal to the sustain voltage, and the relative potential difference having a value greater than or equal to the discharge start voltage, and at the same time, each of them has a potential difference less than or equal to the first and second memory pulses. And (c) when the first and second memory pulses are applied to the second electrode of the scan electrode and the common electrode for the end of discharge, the scan electrode of the scan electrode The plasmic erasing signal having a potential difference from the second memory pulse having a value equal to or higher than a discharge start voltage is applied through the first terminal. Method of driving a display panel.