JPH065993A - Multilayer board with internal layer circuits exposed - Google Patents

Abstract

PURPOSE:To prevent shortcircuit of a chip part connected to internal-layer circuits of a multilayer board by making a spot-facing hole in the upper surface of the multilayer board and by partly exposing internal-layer circuit patterns to the spot-facing hole. CONSTITUTION:In a multilayer board 4, a spot-facing hole 2 is made vertically in the upper surface of a 4-layer board 1 so that a circuit pattern 3 of the third layer of the 4-layer board 1 is partly exposed to the spot-facing hole. Further, in the bottom of the spot-facing hole 2, a through hole 5 is made at the center of the bottom to the lower surface of the 4-layer board 1, avoiding a circuit pattern 3 of the third layer and a circuit pattern 3' of the 4th layer. By this, when mounting a chip part in the spot-facing hole 2 of the substrate 4, since detergent that is used for cleaning, fluxing, etc., the mounted part does not remain in the spot-facing hole 2, but drains out of the through hole 5 serving as an escape hole. Accordingly, when a chip part is mounted in the hole 2 of the board 1 and connected to the circuit pattern 3 of the third layer, the chip part is prevented from being shortcircuited. The through hole 5 also serves as a draft to easily dissipate heat that is generated from the chip in operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly to an inner layer circuit exposure type board used for manufacturing an IC memory module board or a PGA (pinglit array) mounting board.

[0002]

2. Description of the Related Art Conventionally, IC memory module substrates and P
The GA mounting board has been increased in the number of mounted chip components due to the demand for higher density, but the mounted circuit area has a limit, and therefore the density cannot be increased so much.

Under these circumstances, recently, a counterbored hole 2 is formed from the upper surface of a multi-layer substrate, for example, a four-layer substrate 1 as shown in FIG. 2 to expose a part of the circuit pattern 3 of the third layer. Thus, the inner layer circuit exposed type substrate 4 having an increased chip component mounting circuit area has come to be used for manufacturing an IC memory module substrate or a PAG mounting substrate.

By the way, the exposed inner layer circuit type substrate 4 is
When the chip parts are mounted in the counterbore 2, the inside of the counterbore 2 is cleaned with a solvent or water, and liquid treatment such as flux treatment is performed. Therefore, as shown in FIG. The liquid W has no escape and easily remains. If a chip component is mounted in the counterbore 2 while the liquid remains and it is electrically connected to the inner layer circuit, a short circuit may occur, which must be absolutely avoided. Further, as the number of chip components mounted increases, it has been desired to avoid as much as possible the influence of temperature rise of the module and PGA itself due to heat generated from these and heat generation of other mounted components.

[0005]

Therefore, according to the present invention, when the inside of the counterbore hole exposing a part of the inner layer circuit pattern is subjected to liquid treatment such as cleaning with a solvent or water at the time of mounting chip parts, flux treatment, etc. It is an object of the present invention to provide an inner layer circuit exposure type substrate that does not remain and that facilitates heat dissipation when the circuit is energized.

[0006]

An inner layer circuit exposure type substrate of the present invention for solving the above problems exposes a part of an inner layer circuit pattern by forming a counterbore hole from the upper surface of a multilayer substrate.
A through hole is formed in a lower surface of the multilayer substrate while avoiding the inner layer circuit pattern from a part of the bottom surface of the counterbore.

[0007]

As described above, the inner layer circuit exposed type substrate of the present invention is
Since the liquid escape hole is pierced at the bottom of the counterbore hole, when mounting the chip component in the counterbore hole, the liquid will not get into the counterbore hole even if cleaning with solvent or water or liquid treatment such as flux treatment is performed. It does not remain and is discharged from the hole to the outside. Therefore, when the chip component is mounted in the counterbore and is electrically connected to the inner layer circuit, no short circuit occurs. Further, it is possible to suppress the temperature rise of the module and PGA itself due to the heat generated by the chip part in the counterbore hole and the heat generation of other mounted parts by the air permeability of the penetration.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the inner layer circuit exposed type substrate of the present invention will be described with reference to FIG. 1. A counterbore 2 is formed from the upper surface of a four-layer substrate 1 to form a part of a circuit pattern 3 of the third layer. A through hole 5 is formed in the lower surface of the four-layer board 1 so as to avoid the circuit patterns 3 and 3'of the third and fourth layers from the center of the bottom surface of the counterbore 2.

When the chip parts are mounted in the counterbore 2 of the inner layer circuit exposed type substrate 4'of the embodiment thus constructed, even if liquid treatment such as cleaning with a solvent or water and flux treatment is performed, Does not remain in the counterbore hole 2, and the through hole 5 becomes an escape hole and is discharged to the outside. Therefore, when a chip component is housed and mounted in the counterbore 2 and is electrically connected to the circuit pattern 3 of the third layer, there is no short circuit. Also, the through hole 5
The heat generated when the mounted chip portion is used as a device is easily diffused due to its breathability.

Incidentally, the inner layer circuit exposed type substrate 4'of the above embodiment.
Is applied to a four-layer substrate 1, but is not limited to this, and can be applied to a multi-layer substrate such as a six-layer substrate, an eight-layer substrate ... The exposed circuit pattern is not limited to the third layer,
It can be any layer. Further, the through hole does not have to be the central portion of the counterbore hole 2, and the number of through holes to be bored may be plural if possible.

[0011]

As can be seen from the above description, the inner layer circuit exposed type substrate of the present invention is a liquid treatment such as cleaning and flux treatment when mounting a chip part in a counterbore hole exposing a part of the inner circuit pattern. The liquid does not remain in the counterbore even after performing the above, and is discharged to the outside from the through hole provided at the bottom of the counterbore.
It does not short-circuit when a chip component is mounted and it is electrically connected to the inner layer circuit. Further, it is possible to suppress the temperature rise of the module and PGA itself due to the heat generated by the chip component in the counterbore and the heat generation of other mounted components by the air permeability of the through hole.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of an inner layer circuit exposure type substrate of the present invention.

FIG. 2 is a diagram showing an example of a conventional inner layer circuit exposure type substrate.

[Explanation of symbols]

 1 4 layer board (multilayer board) 2 counterbore hole 3 3rd layer circuit pattern (inner layer circuit pattern) 4'inner layer circuit exposed type board 5 through hole

Claims (1)

[Claims] 1. A counterbore hole is formed from the upper surface of a multilayer board to expose a part of an inner layer circuit pattern, and a through hole is formed in a lower surface of the multilayer board while avoiding the inner layer circuit pattern from a part of a bottom surface of the counterbore hole. An inner layer circuit exposure type substrate formed by punching.