JPH07235621A - Leadless chip carrier and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a leadless chip carrier and its mounting method with which the short circuit by fuse solder can be prevented. CONSTITUTION:A wiring circuit 35 is provided on the upper surface 15 of an insulated substrate 1, and a mounting pad 37 is provided on the lower surface of the insulated substrate 1. The side face of the insulated substrate is composed of an inclined slanting wall 16. A slanting circuit 36, with which the wiring circuit and a mounting pad are connected, is provided on the slanting wall 16. On the lower surface 17 of the insulated substrate, a wiring circuit can be provided. On a large type insulated substrate to be formed into dice, through holes are formed for cutting it into dice. Then, a plating treatment is conducted, a mask film is arranged for formation of pattern on the surface, and a parallel rays are made to irradiate on the mask film. Then, the mask film is removed, and an etching treatment is conducted. As a result, a slanting circuit can be formed together with a mounting pad.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a leadless chip carrier capable of preventing a short circuit due to molten solder and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, as a leadless chip carrier, for example, as shown in FIGS.
1, an electronic component mounting portion 90, a wiring circuit 55, a cross-section through hole 56, and a mounting pad 57. A concave electronic component mounting portion 90 and a wiring circuit 55 are provided on the upper surface 15 of the insulating substrate 91, a cross-section through hole 56 is provided on the side surface 16, and a mounting pad 57 is provided on the lower surface 17.

The mounting pad 57 is bonded onto the pad 87 of the mother board 8 with solder 6 as shown in FIG. As shown in FIGS. 17 and 21, the electronic component 4
Are connected to the wiring circuit 55 by the bonding wire 40, and are further electrically connected to the pad 87 of the motherboard 8 through the through hole 56 in the cross section and the mounting pad 57.

Next, a method for manufacturing the leadless chip carrier will be described. First, as shown in FIG.
A plurality of through holes 960 are formed in the large-sized insulating substrate 9 along the shape line 96 of the leadless chip carrier by a drilling method. In addition, a concave electronic component mounting portion 90 is formed on the upper surface 15 of the insulating substrate 9.

Next, as shown in FIG. 19, the inner wall of the through hole 960 is covered with a metal plating film 560. Further, the wiring circuit 55 is formed on the upper surface 15 of the insulating substrate 9, and the mounting pad is formed on the lower surface thereof. Next, the large insulating substrate 9 is cut along the shape line 96 shown in FIG. 19 into individual pieces. As a result, the cross-sectional through hole 56 is formed on the side surface 16 of the insulating substrate 91, and the leadless chip carrier shown in FIGS. 15 to 17 is obtained.

[0006]

However, in the conventional method of manufacturing the leadless chip carrier described above, the method shown in FIG.
As shown in FIG.
It is difficult to form the hole at an accurate position because the through hole 960 has a small diameter. Therefore, as shown in FIG. 20, the cross-sectional through hole 56 may be displaced with respect to the wiring circuit and the mounting pad 57.

In this case, as shown in FIG. 21, when the mounting pad 57 and the pad 87 of the mother board 8 are melt-bonded to each other by the solder 6, the melted solder 6 is attracted to the metal plating film 560 covering the through-hole 56 in cross section. To be Then, the solder 6 on the adjacent mounting pad 57 may be fused and a soldering defect such as a short circuit 60 may occur.

In particular, in recent years, mounting on a leadless chip carrier has become highly dense, and the pitch of the through holes 56 in the cross section tends to be narrowed. Therefore, as mentioned above, the molten solders are easily short-circuited. In view of the above conventional problems, the present invention aims to provide a leadless chip carrier capable of preventing a short circuit due to molten solder and a method for manufacturing the same.

[0009]

The present invention provides a leadless chip carrier in which an electronic component mounting portion is provided on an insulating substrate,
The upper surface of the insulating substrate has a wiring circuit, the lower surface of the insulating substrate has mounting pads, and the side surface of the insulating substrate is
It is composed of sloped sloped walls, and the sloped walls are
The leadless chip carrier is characterized in that it has a slope circuit for connecting the wiring circuit and the mounting pad.

What is most noticeable in the present invention is that the side surface of the insulating substrate is composed of a sloped wall, and a sloped circuit is formed in the sloped wall. In the present invention, the side surface of the insulating substrate is an inclined wall that extends from the upper surface to the lower surface of the insulating substrate or from the lower surface to the upper surface. A slope circuit is provided on the surface of the slope wall. The sloped circuit connects a wiring circuit provided on the upper surface of the insulating substrate and a mounting pad provided on the lower surface thereof. The mounting pad is soldered onto an external element such as a mother board.

The electronic component mounting portion is composed of a concave portion or a pad portion and is provided on the upper surface or the lower surface of the insulating substrate.
Electronic components are mounted on the electronic component mounting portion. The electronic component is connected to a wiring circuit by a bonding wire. The wiring circuit is provided at least on the upper surface of the insulating substrate, but can also be provided on the lower surface of the insulating substrate.
The wiring circuit, the mounting pad, and the slope circuit are made of a conductive material such as copper.

The above-mentioned insulating substrate is one or two or more, and includes a glass / epoxy substrate, a glass / polyimide substrate,
It is made of an insulating material such as glass bismaleimide triazine substrate. In the case of two or more insulating substrates, the insulating substrates are bonded together by an adhesive such as prepreg. It is preferable to provide a heat radiating plate or the like on the insulating substrate in order to efficiently dissipate heat generated from the electronic component. Further, the insulating substrate may be provided with through holes for electrically connecting the inside or upper and lower surfaces of the insulating substrate.

Next, as a method of manufacturing the leadless chip carrier, for example, a through hole for cutting into individual pieces is formed in a large insulating substrate to be divided into individual pieces, and the through holes are formed. The inner wall has a through-hole forming step composed of inclined sloped walls, and a coating step of forming a photosensitive etching resist film with a metal plating film on the entire surface of the insulating substrate including the inside of the through-hole. An exposure step of arranging a mask film for forming a pattern of a wiring circuit and a slope circuit on the surface of the insulating substrate, irradiating the mask film with parallel light, and then removing the mask film; The insulating substrate is etched to form a wiring circuit on the upper surface of the insulating substrate, a slope circuit on the slope wall in the through hole, and a mounting pad on the bottom surface of the insulation substrate. And a cutting step of cutting the large-sized insulating substrate along the through-holes to produce individualized or framed leadless chip carriers. There is a method of manufacturing a carrier.

Each step will be described below. Through-hole forming step First, a through-hole for cutting into individual pieces is formed on a large insulating substrate to be separated into individual pieces. The inner wall of the through hole is an inclined sloped wall. The sloped wall is formed so as to spread from the upper surface to the lower surface of the insulating substrate or from the lower surface to the upper surface, and the contact portion with the upper surface or the lower surface of the insulating substrate has an acute angle.

The through hole is, for example, an elongated slit and is formed at a position corresponding to a side surface of a leadless chip carrier described later. The through hole is formed by boring a large insulating substrate by, for example, counterboring. By forming the through hole, the insulating substrate is divided into an individual piece that constitutes the leadless chip carrier and a support section that supports the individual piece.

The insulating material described above is used for the insulating substrate. The number of insulating substrates is one or more.
In the case of two or more sheets, the insulating substrates are bonded together by an adhesive material such as a prepreg adhesive. Further, when forming a concave electronic component mounting portion, the upper surface or the lower surface of the insulating substrate is bored by counterbore processing in this step.

Next, a metal plating film is formed and a photosensitive etching resist film is formed on the entire surface of the insulating substrate including the inside of the through hole. That is, the entire surface of the insulating substrate is subjected to panel plating to form a metal plating film. At this time,
A metal plating film is also formed in the through hole.

Next, a photosensitive etching resist film is formed on the entire surface of the insulating substrate including the inside of the through hole to cover the entire surface of the metal plating film. The etching resist film is formed by a wet method such as an electrodeposition coating method. Copper or the like is used as the metal plating film.

Exposure Step Next, a mask film for forming a wiring circuit or mounting pad and a slope circuit pattern is arranged on the surface of the insulating substrate. The mask film includes a light blocking portion that blocks light and a transparent portion that transmits light. The blocking part includes a pattern part having the same shape as the pattern formed on the surface of the insulating substrate, and an extension part located above or below the through hole and extending from the pattern part.

The pattern formed on the surface of the insulating substrate means a wiring circuit formed on the upper surface of the insulating substrate or a mounting pad formed on the lower surface thereof. Further, when a wiring circuit is formed on the lower surface of the insulating substrate, it means a mounting pad and a wiring circuit. The mask film is arranged on the upper surface or the lower surface of the insulating substrate at least on the side where the sloped wall of the through hole is visible. Specifically, when the sloped wall extends from the upper surface to the lower surface of the insulating substrate, a mask film is arranged on the upper surface of the insulating substrate. On the other hand, when extending from the lower surface to the upper surface, a mask film is placed on the lower surface of the insulating substrate.

Next, the mask film is irradiated with parallel light. At this time, the pattern portion of the mask film produces a shadow of light on the surface of the insulating substrate, and the extended portion of the mask film also produces a shadow of light on the sloped wall of the through hole, which is not exposed. It becomes a part. After the light irradiation, the mask film is removed from the insulating substrate.

Pattern Forming Step Next, a developing solution is brought into contact with the large-sized insulating substrate. As a result, the unexposed portion of the etching resist film remains as it is, and the other exposed portions are removed to expose the metal plating film. Then, the exposed portion of the metal plating film is removed by etching. As a result, a pattern is formed on the upper surface or the lower surface of the insulating substrate and the sloped wall in the through hole.

Next, the etching resist film remaining on the surface of the pattern is removed. As a result, when the mask film is arranged on the upper surface of the insulating substrate, the wiring circuit is formed on the upper surface of the insulating substrate and the slope circuit is formed on the slope wall in the through hole. On the other hand, when the mask film is arranged on the lower surface of the insulating substrate, the mounting pads are formed on the lower surface of the insulating substrate and the slope circuit is formed on the slope wall in the through hole.

Next, on the lower surface or the upper surface of the insulating substrate,
A pattern such as a mounting pad or a wiring circuit is formed on the side where no pattern is formed yet. The formation method is
Similar to the above, the method using a mask film is simple. Further, as a simple method, there is a method of arranging mask films on both the upper surface and the lower surface of the insulating substrate and irradiating parallel light from both sides thereof. According to this method, a pattern can be formed on the entire surface of the insulating substrate by a single exposure process.

Cutting Step Next, the insulating substrate is cut along the through holes to produce individualized or framed leadless chip carriers. A dicing saw or the like is used for the above cutting. When a large insulating substrate is cut along the through hole, the inclined wall inside the large insulating substrate constitutes the side surface of the individual insulating substrate.

Further, when the heat dissipation plate is provided on the surface of the insulating substrate, it can be formed by the same method as the mounting pad or the wiring circuit. When a through hole is provided in the insulating substrate, the through hole is formed in a large insulating substrate and the inside is covered with a metal plating film.

[0027]

In the leadless chip carrier of the present invention, the side surface of the insulating substrate is composed of a sloped wall, and a sloped circuit is formed on the surface of the sloped wall. As will be described later, the slope circuit is formed at an accurate position as compared with the conventional case where a through hole is provided on the side surface of the insulating substrate. Therefore, when the mounting pad and the motherboard pad are melt-bonded by solder, the molten solder is not attracted to the adjacent mounting pad or slope circuit. Therefore, there is no possibility that adjacent solders will be short-circuited.

Next, in the method for manufacturing a leadless chip carrier of the present invention, a pattern is formed on the surface of the insulating substrate by an exposure method using a mask film. The mask film is provided with a pattern portion having the same shape as a pattern of a wiring circuit, a mounting pad, etc. to be formed on the insulating substrate. Therefore, when parallel light is irradiated from the outside of the mask film, a shadow of light having the same shape as the light shielding portion is formed on the upper surface or the lower surface of the insulating substrate covered by the light shielding portion.

Further, the mask film is provided with an extension portion extending from the pattern portion. The extended portion covers the through hole of the insulating substrate. for that reason,
As described above, when the parallel light is applied, a shadow of light continuous with the shadow of light on the upper surface or the lower surface of the insulating substrate is formed.
On the upper surface or the lower surface of the insulating substrate and the sloped wall, the shadowed portion of the light remains as a pattern of a wiring circuit or a mounting pad, a sloped circuit, or the like by the subsequent etching process.

Therefore, according to the above-mentioned exposure method, it is possible to form a pattern such as a wiring circuit or a mounting pad at an accurate position on the insulating substrate. Further, a slope circuit is formed at a position connected to the pattern on the slope wall of the insulating substrate. Therefore, not only the pattern on the upper surface or the lower surface of the insulating substrate, but also the slope circuit can be formed at an accurate position on the slope wall. Therefore, there is no problem that the slope circuit is displaced with respect to the wiring circuit or the mounting pad.

As a result, the leadless chip carrier manufactured by the manufacturing method of the present invention is free from the possibility of short circuit due to molten solder when it is mounted on the motherboard as described above. According to the present invention, it is possible to provide a leadless chip carrier that can prevent a short circuit due to molten solder and a method for manufacturing the same.

[0032]

【Example】

Example 1 A leadless chip carrier according to an example of the present invention will be described with reference to FIGS. In the leadless chip carrier 7 of this example, as shown in FIGS. 1, 3, and 4, an electronic component mounting portion 19 is provided on the insulating substrate 1. The upper surface 15 of the insulating substrate 1 has a wiring circuit 35, and its lower surface 1
7 has a mounting pad 37. The side surface of the insulating substrate 1 is composed of a sloped wall 16 which is inclined.
6 has a slope circuit 36 for connecting the wiring circuit 35 and the mounting pad 37.

The inclined wall 16 is inclined so as to spread from the upper surface 15 of the insulating substrate 1 to the lower surface 17. The contact portion between the sloped wall 16 and the lower surface 17 of the insulating substrate 1 is formed at an acute angle. The mounting pad 37 is joined to the pad 87 of the mother board 8 by the solder 6 as shown in FIG.

The electronic component mounting portion 19 has a concave shape and is provided on the upper surface 15 of the insulating substrate 1. Electronic component mounting section 1
An electronic component 4 is mounted on 9 as shown in FIG.
The electronic component 4 is connected to the wiring circuit 35 by the bonding wire 40. Wiring circuit 35, mounting pad 3
7 and the slope circuit 36 are made of a conductive material such as copper.
The insulating substrate 1 is made of a glass / epoxy substrate.

Next, a method for manufacturing the leadless chip carrier 7 will be described with reference to FIGS. Through-hole forming step First, as shown in FIGS. 5 and 6, a large-sized insulating substrate 10 to be singulated is cut into four pieces along the dimension line 165 of the leadless chip carrier for cutting into individual pieces. Through hole 1
1 is formed.

The inner wall of the through hole 11 is an inclined slope wall 16
Consists of. The sloped wall 16 is formed so as to spread from the upper surface 15 to the lower surface 17 of the insulating substrate 1 and to have an acute contact portion with the lower surface 17. The through hole 11 is, for example, a slit having a long hole shape, and is formed at a position corresponding to a side surface of a leadless chip carrier described later. The through hole 11 is formed by boring a large insulating substrate 10 by counterboring.

The insulating substrate 10 is formed with the through-holes 11 so that the individual pieces 71 constituting the leadless chip carrier are formed.
And a support portion 72 that supports the individual piece portion 71. The insulating material described above is used for the insulating substrate 10. Next, as shown in FIG. 7, an electronic component mounting portion 19 is formed on the upper surface 15 of the large-sized insulating substrate 10 by machining such as a countersink at a substantially central portion thereof.

Covering Step Next, as shown in FIG. 8, the metal plating film 3 and the photosensitive etching resist film 30 are formed on the entire surface of the insulating substrate 10 including the inside of the through hole 11. That is, the entire surface of the insulating substrate 10 is panel-plated to form the metal plating film 3. At this time, the metal plating film 3 is also formed in the through hole 11.

Next, including the inside of the through hole 11, the insulating substrate 1
A photosensitive etching resist film 30 is formed on the entire surface of No. 0 to cover the entire surface of the metal plating film 3. The etching resist film 30 is formed by a wet method such as an electrodeposition coating method. Copper or the like is used as the metal plating film 3.

Exposure Step Next, as shown in FIGS. 9 and 10, a mask film 2 for forming patterns of wiring circuits, slope circuits, and mounting pads on the upper surface 15 and the lower surface 17 of the insulating substrate 10.
1 and 22 are arranged respectively. Mask film 21,2
Reference numeral 2 has light-shielding portions 210 and 220 that block light, and transmission portions 213 and 223 that transmit light.

The light shielding portion 210 of the mask film 21 is located above the pattern portion 211 having the same shape as the wiring circuit formed on the upper surface 15 of the insulating substrate 10 and the through hole 11 and extended from the pattern portion 211. And an extended portion 212. The light shielding part 220 of the mask film 22 is located below the through hole 11 and the pattern part 221 having the same shape as the mounting pad formed on the lower surface 17 of the insulating substrate 10, and extends from the pattern part 221. The installation part 222. The mask films 21 and 22 are large-sized insulating substrates 10
Are arranged on the upper surface 15 and the lower surface 17, respectively.

Next, the mask films 21 and 22 are irradiated with parallel light 28 from above and below. At this time,
As shown in FIG. 10, light shielding 301 is formed on the upper surface 15 and the lower surface 16 of the insulating substrate 10 by the pattern portions 211 and 221 of the light shielding portions 210 and 220. In addition, the light blocking portion 210,
Due to the extending portions 212 and 222 of 220, a shadow 302 of light is also formed on the slope wall 16 of the through hole 11, and that portion becomes an unexposed portion that is not exposed. After that, the mask film 21,
22 is removed from the insulating substrate 10.

Pattern Forming Step Next, as shown in FIG. 11, the insulating substrate 10 is brought into contact with a developing solution to leave the unexposed portion of the etching resist film 30 as it is and remove the other exposed portions to form a metal plating film. Expose 3 Next, the exposed portion of the metal plating film 3 is removed by etching. Then, the etching resist film 30 covering the surface of the remaining metal plating film 3 is removed. As a result, as shown in FIG. 12, the wiring circuit 3 is formed on the upper surface 15, the lower surface 17, and the sloped wall 16 of the insulating substrate 10.
5, the mounting pad 37 and the slope circuit 36 are formed.

Cutting Step Next, as shown in FIG. 12, using a dicing saw,
The insulating substrate 10 is cut along the dimension line 165 in the through hole 11. As a result, the individualized insulating substrate 1 shown in FIG. 1 is obtained. In addition, the slope wall 16 inside the through hole 11
Form the side surface of the individualized insulating substrate 1.

Next, the function and effect of this example will be described.
In the leadless chip carrier 7 of this example, FIG.
As shown in FIG. 4, the side surface of the insulating substrate 1 is composed of a sloped wall 16, and a slope circuit 36 is formed on the surface of the sloped wall 16. As will be described later, the slope circuit 36 is formed at an accurate position as compared with the conventional case where a cross-sectional through hole is provided on the side surface of the insulating substrate.

Therefore, as shown in FIG. 2, when the mounting pad 37 and the pad 87 of the mother board 8 are melt-bonded by the solder 6, the melted solder 6 is attracted to the mounting pad 37 and the slope circuit 36 adjacent to each other. There is no.
Therefore, there is no possibility that adjacent solders will be short-circuited.

Next, in the method of manufacturing the leadless chip carrier of this example, as shown in FIGS. 9 and 10, the insulating substrate 1 is formed by the exposure method using the mask films 21 and 22.
A pattern is formed on the surface of 0. Mask film 2
Pattern portions 211 and 221 having the same shapes as the patterns of the wiring circuit 35 and the mounting pad 37 to be formed on the insulating substrate 10 are provided on the substrates 1 and 22. Therefore, when the parallel light 28 is radiated from the outside of the mask films 21 and 22, the insulating substrate 1 covered by the pattern portions 211 and 221.
A shadow 301 of light having the same shape as the pattern portion is formed on the upper surface 15 and the lower surface 17 of 0.

Further, the mask films 21 and 22 have extended portions 212 extending from the pattern portions 211 and 221.
222 is provided. The extended portion covers the upper portion and the lower portion of the through hole 11 of the insulating substrate 10. for that reason,
When the parallel light 28 is irradiated, the light shadow 301 of the upper surface 15 and the lower surface 17 of the insulating substrate 10 and the continuous light shadow 302 are
It is also formed on the slope wall 16.

The portions having the above-mentioned light shadows 301 and 302 remain as a pattern of the wiring circuit 35 or the mounting pad 37 and the slope circuit 36 by the subsequent etching process. Therefore, the wiring circuit 35 and the mounting pad 37 can be formed at accurate positions on the insulating substrate 10.

A slope circuit 36 is formed on the slope wall 16 of the insulating substrate 10 at a position connected to the pattern. Therefore, not only the patterns on the upper surface 15 and the lower surface 17 of the insulating substrate 10 but also the slope circuit 36 can be formed at accurate positions on the slope wall 16. Therefore, there is no problem that the slope circuit 36 is displaced with respect to the wiring circuit 35 and the mounting pad 37. As a result, as shown in FIG. 2, the leadless chip carrier manufactured by the manufacturing method of this example does not have a possibility of short circuit due to molten solder when it is mounted on the mother board 8.

Further, in this example, mask films 21 and 22 for pattern formation are arranged on the upper surface 15 and the lower surface 17 of the insulating substrate 10, and the parallel light 28 is simultaneously irradiated from both sides thereof.
Is irradiating. Therefore, not only the pattern can be accurately formed, but also the pattern can be formed quickly and easily.

Embodiment 2 In the leadless chip carrier 7 of this embodiment, as shown in FIG. 13, a wiring circuit 38 is provided not only on the upper surface 15 of the insulating substrate 1 but also on the lower surface 17. In addition, the electronic component mounting unit 19
A wiring circuit 34 is also provided inside. In manufacturing the leadless chip carrier 7, the wiring circuit 3 is formed on the mask film arranged on the upper surface of the insulating substrate.
A light shielding portion having a pattern portion having the same shape as 4, 35 is provided (see FIGS. 9 and 10). Further, the mask film arranged on the lower surface of the insulating substrate is provided with a light shielding portion having a pattern portion having the same shape as the mounting pad 37 and the wiring circuit 38.
Then, an exposure process is performed using these mask films.

Others are the same as those in the first embodiment. In this example, the lower surface 17 of the insulating substrate 1 and the electronic component mounting portion 1
Wiring circuits 38 and 34 are also provided inside 9. Therefore, higher density mounting can be achieved. Other than that, the same effects as those of the first embodiment can be obtained.

Embodiment 3 In the leadless chip carrier 7 of this embodiment, as shown in FIG. 14, a sloped wall 169 is provided on the side surface of the insulating substrate 1 so as to extend from the lower surface 17 to the upper surface 15. A wiring circuit 35 and a mounting pad 37 are provided on the slope wall 169.
Is provided with a slope circuit 36 connected thereto.

The pattern of the slope circuit 36 is formed by the mask film disposed on the lower surface of the insulating substrate 1 together with the mounting pad 37 in the exposure process (see FIGS. 9 and 10). That is, in the slope circuit 36, a shadow of parallel light is formed by the light-shielding portion of the mask film, and the shadow portion is left by the etching process. Others are the same as in the first embodiment. Also in this example, the same effect as that of the first embodiment can be obtained.

[Brief description of drawings]

FIG. 1 is a sectional view of a leadless chip carrier according to a first embodiment.

FIG. 2 is a side view of the leadless chip carrier mounted on the motherboard according to the first embodiment.

FIG. 3 is a plan view of the leadless chip carrier shown in FIG.

FIG. 4 is a rear view of the leadless chip carrier shown in FIG.

FIG. 5 is an explanatory view showing a through hole forming step in a large insulating substrate in the method for manufacturing the leadless chip carrier according to the first embodiment.

6 is a plan view of the large insulating substrate of FIG.

FIG. 7 is an explanatory view of a through hole forming step following FIGS. 5 and 6;

FIG. 8 is an explanatory view of the coating process following FIG. 7.

FIG. 9 is a cross-sectional view of a large insulating substrate in the exposure process following FIG.

FIG. 10 is a perspective view of a main part of a large-sized insulating substrate in the exposure process following FIG.

FIG. 11 is an explanatory diagram of the pattern forming process following FIGS. 9 and 10;

FIG. 12 is an explanatory view of the cutting process following FIG. 11.

FIG. 13 is a cross-sectional view of the leadless chip carrier of Example 2.

FIG. 14 is a cross-sectional view of the leadless chip carrier of Example 3.

FIG. 15 is a plan view of a conventional leadless chip carrier.

16 is a rear view of the leadless chip carrier shown in FIG.

17 is a sectional view taken along the line AA of FIG.

FIG. 18 is an explanatory view showing a method for manufacturing a leadless chip carrier of a conventional example.

FIG. 19 is an explanatory diagram of the manufacturing method following FIG. 18.

FIG. 20 is a perspective view of a main part of a conventional leadless chip carrier as viewed from the back surface side.

FIG. 21 is an explanatory view for pointing out a problem of the conventional leadless chip carrier.

[Explanation of symbols]

 1,10. ． ． Insulating substrate, 11. ． ． Through hole, 15. ． ． Top surface, 16. ． ． Slope wall, 17. ． ． Bottom surface, 19. ． ． Electronic component mounting part, 21, 22. ． ． Mask film, 34, 35, 38. ． ． Wiring circuit, 36. ． ． Slope circuit, 37. ． ． Mounting pad, 4. ． ． Electronic components, 6. ． ． Solder, 7. ． ． Leadless chip carrier, 8. ． ． Motherboard,

Claims (6)

[Claims] 1. A leadless chip carrier in which an electronic component mounting portion is provided on an insulating substrate, wherein an upper surface of the insulating substrate has a wiring circuit, and a lower surface of the insulating substrate has a mounting pad, and the insulating substrate. A side surface of the leadless chip carrier is formed of an inclined sloped wall, and the sloped wall has a sloped circuit for connecting the wiring circuit and the mounting pad. 2. The leadless chip carrier according to claim 1, wherein a wiring circuit is provided on the lower surface of the insulating substrate. 3. A through-hole forming step in which a through hole for cutting into individual pieces is formed on a large-sized insulating substrate to be singulated, and the inner wall of the through hole is a slanted sloped wall. A coating step of forming a metal plating film and a photosensitive etching resist film on the entire surface of the insulating substrate including the inside of the through hole, and forming a wiring circuit and a slope circuit pattern on the surface of the insulating substrate. A mask film for irradiating the mask film, irradiating the mask film with parallel light, and then removing the mask film, and etching the large-sized insulating substrate to form an upper surface of the insulating substrate. Forming a wiring circuit, a slope circuit on the slope wall in the through hole, and a pattern forming step of forming a mounting pad on the lower surface of the insulating substrate, and the large insulating substrate along the through hole. Off A method of manufacturing a leadless chip carrier, which comprises a cutting step of cutting into individual pieces or a framed leadless chip carrier. 4. The method for manufacturing a leadless chip carrier according to claim 3, wherein a wiring circuit is formed on the lower surface of the insulating substrate. 5. The method for manufacturing a leadless chip carrier according to claim 3, wherein the through hole is formed by counterboring. 6. The method for manufacturing a leadless chip carrier according to claim 3, 4, or 5, wherein the etching resist film is formed by a wet method.