JPH065906A - Manufacture of monolithic photo-coupler - Google Patents

Manufacture of monolithic photo-coupler

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Publication number
JPH065906A
JPH065906A JP16276392A JP16276392A JPH065906A JP H065906 A JPH065906 A JP H065906A JP 16276392 A JP16276392 A JP 16276392A JP 16276392 A JP16276392 A JP 16276392A JP H065906 A JPH065906 A JP H065906A
Authority
JP
Japan
Prior art keywords
light
optical coupling
recess
coupling device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16276392A
Other languages
Japanese (ja)
Inventor
Tetsuya Hanamoto
哲也 花本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP16276392A priority Critical patent/JPH065906A/en
Publication of JPH065906A publication Critical patent/JPH065906A/en
Pending legal-status Critical Current

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  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PURPOSE:To simplify manufacturing processes and mounting manhours of both light emitting and receiving elements. CONSTITUTION:A recessed part 22 is provided in a semiconductor substrate 21 to be a base, and photo-coupling elements 10 are formed together by an epitaxial growth. Thereafter, the photo-coupling elements 10 are divided into a light emitting element 11 and a light receiving element 12 by using a photolithography method and an etching method. The respective electrodes 31, 32 of the light emitting and receiving elements 11, 12 are formed on an identical plane, and conductive bumps 47 are formed, and thereby, the connections of the elements 11, 12 are facilitated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、受発光一体型のモノリ
シック型光結合装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a monolithic optical coupling device of the light receiving and emitting type.

【0002】[0002]

【従来の技術】図7,8に、従来の技術により作製され
た光結合装置(フォトカプラ)の構成を示す。図7は斜
視図、図8は断面図である。
2. Description of the Related Art FIGS. 7 and 8 show the structure of an optical coupling device (photocoupler) manufactured by a conventional technique. FIG. 7 is a perspective view and FIG. 8 is a sectional view.

【0003】図示の如く、鉄系もしくは銅系の金属リー
ドフレーム1,2の先端部に、発光素子3(LEDチッ
プ)と受光素子4(フォトダイオードチップやフォトト
ランジスタチップ)を各々ダイボンドし、その後Auワ
イヤー等による接続が施され、それらは対向して配置さ
れる。そして、前記受発光素子3,4は、これらチップ
の保護および光量子効率向上の目的で、透光性絶縁材料
5による一次モールドを施した後、前記リードフレーム
1,2の保護と外乱光遮蔽のために、遮光性樹脂6で二
次モールドされていた。
As shown in the figure, the light emitting element 3 (LED chip) and the light receiving element 4 (photodiode chip or phototransistor chip) are die-bonded to the tip of the iron-based or copper-based metal lead frames 1 and 2, respectively. Connections such as Au wires are made, and they are arranged opposite to each other. Then, the light emitting and receiving elements 3 and 4 are subjected to a primary molding with a translucent insulating material 5 for the purpose of protecting these chips and improving the photon efficiency, and then protect the lead frames 1 and 2 and shield against external light. Therefore, the light-shielding resin 6 is secondarily molded.

【0004】[0004]

【発明が解決しようとする課題】従来の技術により作製
された光結合装置では、発光素子3がGaAs系半導
体、受光素子4がSi系半導体と、その構成材料が夫々
異なるため、各々の素子3,4は別工程で作製しなけれ
ばならなかった。
In the optical coupling device manufactured by the conventional technique, the light emitting element 3 is a GaAs semiconductor and the light receiving element 4 is a Si semiconductor. , 4 had to be manufactured in a separate process.

【0005】また、上記光結合装置の構造上、発光素子
3と受光素子4は各々一個以上、合計二個以上のリード
フレーム1,2に搭載する必要があった。したがって、
従来の技術方式では、個々の素子3,4を実装するため
に作製にかかる工数が多く、また、各素子3,4間の幅
にもバラツキがあった。
Due to the structure of the optical coupling device, it is necessary to mount one or more light emitting element 3 and one or more light receiving element 4, respectively, on a total of two or more lead frames 1, 2. Therefore,
In the conventional technical method, the number of manufacturing steps for mounting the individual elements 3 and 4 is large, and the width between the elements 3 and 4 also varies.

【0006】さらに、光結合装置の小型化を考える場
合、受発光素子3,4と実装基板とを接続しているボン
ディングワイヤーに係る信頼性を考慮しなければなら
ず、このため、基板側での電気的接続用ワイヤーボンデ
ィングパッドの設定が不可避であった。
Further, when considering the miniaturization of the optical coupling device, it is necessary to consider the reliability of the bonding wire connecting the light emitting / receiving elements 3 and 4 and the mounting substrate. It was unavoidable to set the wire bonding pad for electrical connection.

【0007】また、リードフレーム1,2と外装モール
ド樹脂としての遮光性樹脂6との膨張係数の違いによ
り、両材料間での密着性に係る不安定要素を包含してい
た。
Further, due to the difference in the expansion coefficient between the lead frames 1 and 2 and the light-shielding resin 6 as the exterior molding resin, there is included an unstable element relating to the adhesion between the two materials.

【0008】本発明は、上記課題に鑑み、受発光両素子
の製作工程および実装工数を簡略化し、各素子間の幅の
バラツキを軽減し、実装基板への接続を容易とし、かつ
各部材間の膨張係数の違いを考慮する必要がなくなるモ
ノリシック型光結合装置の製造方法の提供を目的とす
る。
In view of the above problems, the present invention simplifies the manufacturing process and the mounting man-hours of both the light receiving and emitting elements, reduces the variation in the width between the elements, facilitates the connection to the mounting board, and reduces the space between the members. It is an object of the present invention to provide a method for manufacturing a monolithic optical coupling device that eliminates the need to consider the difference in expansion coefficient between the two.

【0009】[0009]

【課題を解決するための手段】本発明請求項1による課
題解決手段は、図1〜6の如く、発光素子11と受光素
子12とを有する光結合装置の製造方法において、半導
体基板21の電極形成面またはこれと反対側の面に凹部
22を形成し、該凹部22の表面上に、発光素子11お
よび受光素子12としての光結合素子10をエピタキシ
ャル成長法により同時に一体形成し、前記電極形成面ま
たはこれと反対側の面に、受発光素子11,12間の一
部を切り欠くように溝26を形成し、該溝26に透光性
絶縁材料27を充填して光路を形成し、発光素子11と
受光素子12との間の透光性絶縁材料27以外の部分を
エッチングにて除去して受発光間を電気的に分離し、前
記電極形成面に外部回路との接続用電極31,32をパ
ターン形成するものである。
The means for solving the problems according to claim 1 of the present invention is to provide an electrode of a semiconductor substrate 21 in a method of manufacturing an optical coupling device having a light emitting element 11 and a light receiving element 12, as shown in FIGS. A recess 22 is formed on the formation surface or the surface opposite to the formation surface, and the light-emitting element 11 and the optical coupling element 10 as the light-receiving element 12 are integrally formed on the surface of the recess 22 at the same time by an epitaxial growth method. Alternatively, a groove 26 is formed on the surface on the opposite side so as to cut out a part between the light emitting / receiving elements 11 and 12, and the groove 26 is filled with a translucent insulating material 27 to form an optical path to emit light. A portion other than the translucent insulating material 27 between the element 11 and the light receiving element 12 is removed by etching to electrically separate the light receiving and emitting areas, and an electrode 31 for connecting to an external circuit is provided on the electrode forming surface. Patterning 32 It is.

【0010】本発明請求項2による課題解決手段は、請
求項1記載の各接続用電極31,32に、実装基板上に
直接実装するための導電バンプ47を形成するものであ
る。
According to a second aspect of the present invention, a problem-solving means is to form a conductive bump 47 on each of the connection electrodes 31 and 32 according to the first aspect for mounting directly on a mounting substrate.

【0011】本発明請求項3による課題解決手段は、上
面に収納凹部42を有する樹脂ケース41を射出成形ま
たはトランスファ成形等によって成形し、前記収納凹部
42から樹脂ケース41の側面あるいは下面にかけて、
薄膜状の立体配線部43a〜43dを立体的に引き回し
て形成し、請求項1記載の光結合素子10を前記収納凹
部42内に搭載し、該収納凹部42を封止樹脂48で封
止するものである。
According to a third aspect of the present invention, a resin case 41 having an accommodating recess 42 on the upper surface is molded by injection molding or transfer molding, and the accommodating recess 42 extends from the side surface or the lower surface of the resin case 41.
The thin-film three-dimensional wiring portions 43a to 43d are three-dimensionally drawn and formed, the optical coupling element 10 according to claim 1 is mounted in the storage recess 42, and the storage recess 42 is sealed with a sealing resin 48. It is a thing.

【0012】[0012]

【作用】上記請求項1による課題解決手段において、発
光素子11および受光素子12を同一の半導体基板21
上でモノリシックに形成するため、従来別々の工程で作
製していたものを同時工程で一体的に作製でき、工程の
単純化を図ることができる。さらに、受発光素子11,
12間の間隔を、高精度にかつ短距離に取ることができ
る。したがって、光の利用効率を上げることが可能とな
る。
In the means for solving the problems according to claim 1, the light emitting element 11 and the light receiving element 12 are formed on the same semiconductor substrate 21.
Since it is formed monolithically as described above, it is possible to integrally manufacture what was conventionally manufactured in separate steps in the same step, and to simplify the steps. Further, the light emitting / receiving element 11,
The distance between 12 can be made highly precise and short distance. Therefore, it is possible to improve the light utilization efficiency.

【0013】また、これまでチップの上部と下部とに別
れて形成されていた電極を、同一平面上に形成できるの
で、光結合素子10と樹脂ケース41あるいは外部の実
装基板との接続を平面的に行なうことができ、さらに、
請求項2のように、電極31,32をバンプ化すること
で、従来使用していたAuワイヤー等を用いた接続を改
善することができ、ワイヤー断線等の不良の発生が無く
なり、その結果、製品の信頼性が向上する。
Further, since the electrodes which have been formed separately on the upper and lower parts of the chip can be formed on the same plane, the connection between the optical coupling element 10 and the resin case 41 or the external mounting substrate is planar. Can be done to
By bumping the electrodes 31 and 32 as in claim 2, it is possible to improve the connection using a conventionally used Au wire or the like, and eliminate the occurrence of defects such as wire disconnection. Product reliability is improved.

【0014】請求項3では、立体配線を施した樹脂ケー
ス41を用いることにより、従来のような金属リードフ
レーム、モールド樹脂間の熱膨張係数の違いによる外装
モールド樹脂の剥離およびクラック等の発生を防止する
ことができる。また、リードレス化したことにより金属
リードピンの曲がりや変形も無くなる。
According to the third aspect of the present invention, by using the resin case 41 having the three-dimensional wiring, the peeling and cracking of the exterior molding resin due to the difference in the thermal expansion coefficient between the conventional metal lead frame and the molding resin can be prevented. Can be prevented. In addition, the leadless structure eliminates bending and deformation of the metal lead pin.

【0015】あるいは、請求項1および2の製造方法に
より得られるモノリシック型の光結合素子10は、電気
回路配線等を有するプリント基板上へ直接実装が可能で
あるため、プリント配線基板等のさらなる高密度実装が
可能となる。
Alternatively, the monolithic type optical coupling element 10 obtained by the manufacturing method according to claims 1 and 2 can be directly mounted on a printed circuit board having electric circuit wiring and the like. High density mounting is possible.

【0016】[0016]

【実施例】(第一実施例)図1は本発明の第一実施例を
示すモノリシック型光結合装置の各製造工程図面であ
り、(A)は半導体基板に凹部を形成した状態を示す
図、(B)は凹部に半導体成長層をエピタキシャル成長
させた図、(C)は半導体成長層の中央部分を除去して
溝を形成した図、(D)は溝に透光性絶縁材料を充填し
た図、(E)は凹部を光反射膜で塞いだ図、(F)は樹
脂ケースに搭載した図、図2はモノリシック型光結合装
置の外観斜視図、図3は本発明の第一実施例のモノリシ
ック型光結合装置を搭載する樹脂ケースであって、
(A)は平面図、(B)は(A)のA−A断面図、
(C)は側面図、(D)は(A)のB−B断面図、
(E)は正面図、(F)は底面図、図4は光結合素子を
外部実装基板上に直接実装した外観斜視図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a drawing showing each manufacturing process of a monolithic optical coupling device showing a first embodiment of the present invention. FIG. 1A is a view showing a state in which a recess is formed in a semiconductor substrate. , (B) is a view in which a semiconductor growth layer is epitaxially grown in a recess, (C) is a view in which a central portion of the semiconductor growth layer is removed to form a groove, and (D) is filled with a translucent insulating material. FIG. 2, (E) is a view in which the recess is covered with a light reflecting film, (F) is a view in which it is mounted in a resin case, FIG. 2 is an external perspective view of a monolithic optical coupling device, and FIG. 3 is a first embodiment of the present invention. A resin case equipped with the monolithic optical coupling device of
(A) is a plan view, (B) is a sectional view taken along line AA of (A),
(C) is a side view, (D) is a BB cross-sectional view of (A),
(E) is a front view, (F) is a bottom view, and FIG. 4 is an external perspective view in which an optical coupling element is directly mounted on an external mounting substrate.

【0017】本実施例の光結合装置は、図示の如く、入
力電源にて駆動発光する発光素子11からの光を受光素
子12にて受光し、再び電気的信号に光電変換して出力
するものであって、前記両素子11,12が、一体的な
光結合素子10としてモノリシックに成長形成されたも
のである。
As shown in the figure, the optical coupling device of this embodiment receives light from a light emitting element 11 which is driven and emitted by an input power source by a light receiving element 12 and photoelectrically converts it into an electric signal for output. The two elements 11 and 12 are monolithically grown and formed as an integrated optical coupling element 10.

【0018】該光結合素子10は、次のように製造され
る。
The optical coupling element 10 is manufactured as follows.

【0019】まず、図1(A)の如く、例えば、GaA
s製の半導体基板21の表面の一部を、フォトリソグラ
フィ法と選択エッチング液を用いてメサ型にエッチング
し、凹部22を形成する。該凹部22の幅および深さ
は、形成する両素子11,12の大きさによって規定さ
れる。
First, as shown in FIG. 1A, for example, GaA
A part of the surface of the semiconductor substrate 21 made of s is etched into a mesa shape by using a photolithography method and a selective etching solution to form a recess 22. The width and depth of the recess 22 are defined by the sizes of the two elements 11 and 12 to be formed.

【0020】次に、図1(B)の如く、凹部22を含め
た半導体基板21の表面上に、エピタキシャル成長によ
り、P型クラッド層(P−Ga1-yAlyAs)23、P
型活性層(P−Ga1-xAlxAs)24およびN型クラ
ッド層(N−Ga1-yAlyAs)25を順次成長させ
る。ここで、化学式中のx,yは、x>yの関係にある
ものとする。
Next, as shown in FIG. 1 (B), on the surface of the semiconductor substrate 21 including the recess 22, by epitaxial growth, P-type cladding layer (P-Ga 1-y Al y As) 23, P
-Type active layer (P-Ga 1-x Al x As) are successively grown to 24 and N-type cladding layer (N-Ga 1-y Al y As) 25. Here, x and y in the chemical formula have a relation of x> y.

【0021】そして、各半導体成長層23〜25につい
て、イオンビームエッチング、化学エッチングあるいは
研磨等を行い、半導体基板21の凸状の表面部分が露出
するまで除去する。これにて、半導体成長層23〜25
は凹部22内に限定される。
Then, each of the semiconductor growth layers 23 to 25 is subjected to ion beam etching, chemical etching, polishing or the like to remove it until the convex surface portion of the semiconductor substrate 21 is exposed. In this way, the semiconductor growth layers 23 to 25
Is limited to the inside of the recess 22.

【0022】また、図1(C)の如く、半導体基板21
の凹部22内の半導体成長層23〜25の中央部分に、
フォトリソグラフィ法とエッチング手法を用いて表溝2
6を形成し、発光素子11と受光素子12を分断する。
この際、半導体基板21の凹部22が露出するまで除去
しておく。
As shown in FIG. 1C, the semiconductor substrate 21
In the central portion of the semiconductor growth layers 23 to 25 in the recess 22 of
The surface groove 2 is formed by using the photolithography method and the etching method.
6 is formed, and the light emitting element 11 and the light receiving element 12 are separated.
At this time, it is removed until the concave portion 22 of the semiconductor substrate 21 is exposed.

【0023】図1(D)の如く、表溝26に、発光素子
11と受光素子12との間の光路確保のため、SiO2
等の透光性絶縁材料27を、スパッタリング、蒸着ある
いはP−CVD等の手法を用いて充填する。なお、該透
光性絶縁材料27は、光結合に実使用する光の波長を透
過するものであればどのようなものでも良く、例えば、
ポリイミド等の樹脂材料を用いて形成しても良い。
As shown in FIG. 1D, in order to secure an optical path between the light emitting element 11 and the light receiving element 12, SiO 2 is provided in the front groove 26.
A transparent insulating material 27 such as the above is filled by using a technique such as sputtering, vapor deposition, or P-CVD. The translucent insulating material 27 may be any material as long as it transmits the wavelength of light actually used for optical coupling.
It may be formed using a resin material such as polyimide.

【0024】その後、半導体基板21の透光性絶縁材料
27形成側と逆側の裏面の一部を、フォトリソグラフィ
法と選択エッチング液を用いてメサ型にエッチングし、
裏溝28を形成する。この際、裏側からみて透光性絶縁
材料27を完全に露出させる。これにより、光結合素子
内では発光素子11と受光素子12とは完全に電気的に
分離された構造となる。
After that, a part of the back surface of the semiconductor substrate 21 opposite to the side where the translucent insulating material 27 is formed is etched into a mesa shape by using a photolithography method and a selective etching solution,
The back groove 28 is formed. At this time, the translucent insulating material 27 is completely exposed when viewed from the back side. As a result, the light emitting element 11 and the light receiving element 12 are completely electrically separated in the optical coupling element.

【0025】さらに、図1(E)の如く、露出した半導
体成長層23〜25や透光性絶縁材料27からの光の漏
れを防止して光の利用効率を向上させるため、半導体成
長層23〜25および透光性絶縁材料27の表面にAl
23等の光反射膜29をEB蒸着法等により成膜する。
Further, as shown in FIG. 1E, in order to prevent light from leaking from the exposed semiconductor growth layers 23 to 25 and the translucent insulating material 27 and improve the light utilization efficiency, the semiconductor growth layer 23 is formed. ~ 25 and Al on the surface of the translucent insulating material 27
A light reflecting film 29 such as 2 O 3 is formed by an EB vapor deposition method or the like.

【0026】次に、この光反射膜29の一部をエッチン
グし、外部回路との電気的接続用の電極31,32を形
成する。
Next, a part of the light reflecting film 29 is etched to form electrodes 31 and 32 for electrical connection with an external circuit.

【0027】該電極31,32の形成においては、N電
極31として例えばAuGe/Niをスパッタリング等
の手法により形成する。また、P電極32としては例え
ばAu/Znを同様にスパッタリング等の手法を用いて
形成する。この時、P・N両電極31,32とも、光の
吸収層として作用するので、寸法はできる限り小さく
し、望ましくはボンディング可能最小形状にしておく。
また、該接続用電極31,32には、外部への接続作業
の容易のため、Au等の導電バンプ47を形成してお
く。
In forming the electrodes 31 and 32, AuGe / Ni, for example, is formed as the N electrode 31 by a method such as sputtering. As the P electrode 32, for example, Au / Zn is similarly formed by using a method such as sputtering. At this time, both the P and N electrodes 31 and 32 act as a light absorbing layer, so the size is made as small as possible, and preferably the minimum shape capable of bonding is set.
Further, conductive bumps 47 of Au or the like are formed on the connection electrodes 31 and 32 in order to facilitate an external connection work.

【0028】しかる後、光結合素子10を、スクライブ
手法やダイシング等により個々のチップに分割形成す
る。
Thereafter, the optical coupling element 10 is divided into individual chips by a scribing method or dicing.

【0029】そして、図1(F)に示すように、光結合
素子10を樹脂ケース41に収納する。
Then, as shown in FIG. 1F, the optical coupling element 10 is housed in a resin case 41.

【0030】該樹脂ケース41は、図3(A)〜(F)
の如く、リードフレームを用いずに、小型、薄型の一体
化した部品を得るためのMolded Interco
nnection Device法(以下、MID法と
称す)を用いたものである。ここで、MID法とは、射
出成形またはトランスファ成形等によって得られた成形
品に化学めっき等の方法でフレームレスにて電気回路を
形成したものである。
The resin case 41 is shown in FIGS.
Molded Interco for obtaining small and thin integrated parts without using lead frame
The injection device method (hereinafter referred to as the MID method) is used. Here, the MID method is a method in which a molded product obtained by injection molding, transfer molding, or the like is formed with a frameless electric circuit by a method such as chemical plating.

【0031】該樹脂ケース41の基本材料としては、熱
硬化性樹脂や熱可塑性樹脂が用いられ、熱硬化性樹脂を
用いる場合はトランスファ成形等法、熱可塑性樹脂を用
いる場合は射出成形法等の手法を用いて、多数個取り形
状の基板状に一体形成し、チップ搭載・封止後、スクラ
イブ手法やダイシング手法等を用いて個々の単位に分割
してなる。
A thermosetting resin or a thermoplastic resin is used as a basic material of the resin case 41. When the thermosetting resin is used, a transfer molding method or the like, and when a thermoplastic resin is used, an injection molding method or the like is used. Using a method, it is integrally formed into a multi-piece substrate shape, and after chip mounting / sealing, it is divided into individual units using a scribing method or a dicing method.

【0032】該樹脂ケース41の上面には、前記光結合
素子10を収納するための収納凹部42が形成されてい
る。該収納凹部42には、金属メッキ技術、スパッタリ
ング技術あるいは蒸着技術等により、薄膜状の立体配線
部43a〜43dが立体的に形成されている。該各立体
配線部43a〜43dは、図3(A)〜(F)の如く、
前記光結合素子10と接続するためのランド部44a〜
44dを有し、収納凹部42の底面から樹脂ケース41
の上面および側面のスルーホール45を介して裏面電極
46a〜46dにまで夫々引きまわしされている。該裏
面電極46a〜46dは、他の実装基板等への実装時の
半田付け用パッドとして使用される。
A housing recess 42 for housing the optical coupling element 10 is formed on the upper surface of the resin case 41. In the storage recess 42, thin-film three-dimensional wiring portions 43a to 43d are three-dimensionally formed by metal plating technology, sputtering technology, vapor deposition technology, or the like. Each of the three-dimensional wiring portions 43a to 43d is as shown in FIGS.
Land portions 44a for connecting to the optical coupling element 10-
44d, and the resin case 41 from the bottom of the storage recess 42.
Through the through holes 45 on the upper surface and the side surface thereof to the back surface electrodes 46a to 46d, respectively. The back surface electrodes 46a to 46d are used as soldering pads at the time of mounting on another mounting board or the like.

【0033】前記モノリシック型光結合素子10は、樹
脂ケース41の収納凹部42内の立体配線部43a〜4
3dの各ランド部44a〜44dに、導電バンプ47等
を介して直接搭載される。
The monolithic optical coupling element 10 has a three-dimensional wiring portion 43a-4 in a storage recess 42 of a resin case 41.
The land portions 44a to 44d of 3d are directly mounted via the conductive bumps 47 and the like.

【0034】該光結合素子10の収納凹部42への搭載
後、黒色エポキシ樹脂等の遮光性封止樹脂48によって
樹脂封止しておく。
After mounting the optical coupling element 10 in the housing recess 42, it is resin-sealed with a light-shielding sealing resin 48 such as a black epoxy resin.

【0035】以上のように、本実施例によるモノリシッ
ク型光結合装置においては、MID法、すなわち、樹脂
ケース41の立体配線部43a〜43dを、金属メッキ
技術、スパッタリング技術或いは蒸着技術等によって施
したリードフレームレスの構造であり、金属リードフレ
ームとモールド用樹脂材料との間の熱膨張係数等の違い
を考慮する必要が無い。したがって、従来から発生して
いた、金属リードフレームと封止樹脂との間の剥離も発
生しない。さらに、リードフレームレス化したことによ
り、金属リードピンの曲がりや変形も無くなる。
As described above, in the monolithic type optical coupling device according to this embodiment, the MID method, that is, the three-dimensional wiring portions 43a to 43d of the resin case 41 are formed by the metal plating technique, the sputtering technique, the vapor deposition technique, or the like. Since the structure is lead frame-less, it is not necessary to consider the difference in thermal expansion coefficient between the metal lead frame and the molding resin material. Therefore, peeling between the metal lead frame and the sealing resin, which has occurred conventionally, does not occur. Furthermore, since the lead frame is not used, bending and deformation of the metal lead pin are eliminated.

【0036】また、本実施例においては、光結合素子1
0の封止用に遮光性封止樹脂48を使用している。した
がって、外装樹脂ケース41としては、遮光性を考慮す
る必要は無く、耐熱性・耐湿性等にのみ留意して選定す
れば良い。また、反対に遮光性封止樹脂48と樹脂ケー
ス41とを同じ材料の遮光性樹脂で形成することによ
り、異種材料を用いた場合の密着不良から来る剥離等が
防止できる。
Further, in this embodiment, the optical coupling element 1 is used.
A light-shielding sealing resin 48 is used for 0 sealing. Therefore, it is not necessary to consider the light-shielding property as the exterior resin case 41, and it suffices to select it in consideration of only heat resistance and moisture resistance. On the contrary, by forming the light-shielding sealing resin 48 and the resin case 41 from the light-shielding resin of the same material, it is possible to prevent peeling and the like due to poor adhesion when different materials are used.

【0037】また、図4に示すように、上記光結合素子
10は、通常のいわゆる表面実装タイプ(SMT)のチ
ップ部品として、プリント基板51等の各種基板上に直
接実装することも可能である。この場合は、光結合素子
10をAuバンプ等を用いてダイボンディング後に、遮
光性封止樹脂52をポッティングし、光結合素子10を
外乱光から遮光する。
Further, as shown in FIG. 4, the optical coupling element 10 can be directly mounted on various boards such as the printed board 51 as a normal so-called surface mount type (SMT) chip component. . In this case, the light coupling sealing resin 52 is potted after the optical coupling element 10 is die-bonded using Au bumps or the like to shield the optical coupling element 10 from ambient light.

【0038】このようにすれば、樹脂ケースを用いるこ
と無く、直接モノリシック型光結合素子をベアチップ部
品としてプリント基板51上に実装することができるの
で、プリント基板51等の高密度実装化に対応できる。
In this way, the monolithic optical coupling element can be directly mounted on the printed circuit board 51 as a bare chip component without using a resin case, so that high density mounting of the printed circuit board 51 or the like can be realized. .

【0039】(第二実施例)図5は本発明の第二実施例
を示すモノリシック型光結合装置の各製造工程図面であ
り、(A)は半導体基板に凹部を形成した状態を示す
図、(B)は凹部に半導体成長層をエピタキシャル成長
させた図、(C)は半導体基板の裏面に溝を形成した
図、(D)は溝に透光性絶縁材料を充填し凹部を光反射
膜で塞いだ図、図6は本発明の第二実施例のモノリシッ
ク型光結合装置を搭載する樹脂ケースであって、(A)
は平面図、(B)は(A)のC−C断面図、(C)は側
面図、(D)は(A)のD−D断面図、(E)は正面
図、(F)は底面図である。
(Second Embodiment) FIG. 5 is a manufacturing process drawing of a monolithic optical coupling device showing a second embodiment of the present invention. FIG. 5A is a view showing a state in which a recess is formed in a semiconductor substrate. (B) is a diagram in which a semiconductor growth layer is epitaxially grown in the recess, (C) is a diagram in which a groove is formed on the back surface of the semiconductor substrate, and (D) is a groove in which a translucent insulating material is filled, and the recess is formed by a light reflecting film. 6A and 6B show a resin case in which the monolithic optical coupling device according to the second embodiment of the present invention is mounted.
Is a plan view, (B) is a sectional view taken along line CC of (A), (C) is a side view, (D) is a sectional view taken along line DD of (A), (E) is a front view, and (F) is (F). It is a bottom view.

【0040】図示の如く、本実施例の光結合装置は、半
導体成長層23〜25を形成する凹部として、予め発光
側と受光側とに別々に分けて形成し、両凹部22a,2
2bの間の光路を、半導体基板21の裏側から形成した
ものである。
As shown in the figure, in the optical coupling device of this embodiment, the concave portions for forming the semiconductor growth layers 23 to 25 are separately formed in advance on the light emitting side and the light receiving side respectively, and both concave portions 22a, 2 are formed.
The optical path between 2b is formed from the back side of the semiconductor substrate 21.

【0041】本実施例の光結合素子10は、次のように
製造される。
The optical coupling element 10 of this embodiment is manufactured as follows.

【0042】まず、図5(A)の如く、半導体基板21
の表面の一部を、フォトリソグラフィ法および選択エッ
チング液を用いてメサ型にエッチングし、一対の凹部2
2a,22bを並置形成する。該各凹部22a,22b
の幅および深さは、形成する各素子11,12の大きさ
によって規定される。
First, as shown in FIG. 5A, the semiconductor substrate 21
A part of the surface of each of the recesses 2 is etched into a mesa shape by using a photolithography method and a selective etching solution.
2a and 22b are formed side by side. The recesses 22a, 22b
The width and depth of the element are defined by the sizes of the elements 11 and 12 to be formed.

【0043】次に、図5(B)の如く、凹部22a,2
2bを含めた半導体基板21の表面上に、エピタキシャ
ル成長により、P型クラッド層(P−Ga1-yAly
s)23、P型活性層(P−Ga1-xAlxAs)24お
よびN型クラッド層(N−Ga1-yAlyAs)25を順
次積層成長させる(x>y)。
Next, as shown in FIG. 5B, the recesses 22a, 2a
On the surface of the semiconductor substrate 21 including the 2b, by epitaxial growth, P-type cladding layer (P-Ga 1-y Al y A
s) 23, P-type active layer (P-Ga 1-x Al x As) are sequentially stacked and grown to 24 and N-type cladding layer (N-Ga 1-y Al y As) 25 (x> y).

【0044】また、該半導体成長層23〜25の半導体
基板21から突出した部分は、イオンビームエッチン
グ、化学エッチング或いは研磨等にて除去する。
The portions of the semiconductor growth layers 23 to 25 protruding from the semiconductor substrate 21 are removed by ion beam etching, chemical etching or polishing.

【0045】そして、図5(C)の如く、半導体基板2
1の裏面の一部に、フォトリソグラフィ法および選択エ
ッチング液を用いてメサ型にエッチングし、裏溝26を
形成する。このとき、裏溝26は、半導体基板21の両
凹部22a,22bの間の位置、すなわち半導体成長層
23〜25が形成されていない部分に対応する位置に形
成する。また、裏溝26の底面の位置は、N型クラッド
層(N−Ga1-yAlyAs)25の底面部より充分深く
なるまでエッチングを行う。
Then, as shown in FIG. 5C, the semiconductor substrate 2
A back groove 26 is formed on a part of the back surface of No. 1 by using a photolithography method and a selective etching solution in a mesa type. At this time, the back groove 26 is formed at a position between the concave portions 22a and 22b of the semiconductor substrate 21, that is, a position corresponding to a portion where the semiconductor growth layers 23 to 25 are not formed. The position of the bottom surface of Uramizo 26 etched until sufficiently deeper than the bottom surface portion of the N-type cladding layer (N-Ga 1-y Al y As) 25.

【0046】上記工程で形成された裏溝26に、図5
(D)の如く、受・発光素子間の光路確保の目的で、S
iO2等の透光性絶縁材料27を、スパッタリング、蒸
着或はP−CDV等の手法を用いて形成する。形成領域
は、少なくともP型クラッド層(P−Ga1-yAly
s)23が完全に隠れる位置まで積層する。なお、透光
性絶縁材料27は、実使用する光の波長を透過するもの
であれば良く、例えば、ポリイミド等の樹脂材料を用い
て形成しても良い。
In the back groove 26 formed in the above process, as shown in FIG.
As shown in (D), in order to secure the optical path between the light receiving and light emitting elements, S
The translucent insulating material 27 such as iO 2 is formed by using a technique such as sputtering, vapor deposition or P-CDV. Forming region, at least P-type cladding layer (P-Ga 1-y Al y A
s) Laminate until 23 is completely hidden. The translucent insulating material 27 may be any material that transmits the wavelength of light actually used, and may be formed using, for example, a resin material such as polyimide.

【0047】次に、半導体基板21の表面を、半導体基
板21の表側(図5(C)中の21a)が無くなるま
で、研磨する。これにより、半導体成長層23〜25の
発光側と受光側とは電気的に完全に分離された構造とな
る。
Next, the surface of the semiconductor substrate 21 is polished until the front side of the semiconductor substrate 21 (21a in FIG. 5C) disappears. As a result, the light emitting side and the light receiving side of the semiconductor growth layers 23 to 25 are electrically completely separated.

【0048】さらに、図5(D)の如く、エッチング手
法等により露出した半導体成長層23〜25と透光性絶
縁材料27からの光の漏れを防止するためと、光の利用
効率向上を目的として、Al23等の光反射膜29をE
B蒸着法等により成膜する。
Further, as shown in FIG. 5D, in order to prevent light from leaking from the semiconductor growth layers 23 to 25 and the translucent insulating material 27 which are exposed by an etching method or the like, the purpose is to improve the light utilization efficiency. As a light reflection film 29 of Al 2 O 3 or the like,
A film is formed by the B vapor deposition method or the like.

【0049】次に、この光反射膜29の一部をエッチン
グし、受・発光各々の素子部と外部回路との電気的接続
用の電極31,32を形成する。
Next, a part of the light reflection film 29 is etched to form electrodes 31 and 32 for electrical connection between the element parts for receiving and emitting light and an external circuit.

【0050】電極31,32の形成においては、N電極
31として例えばAuGe/Niをスパッタリング等の
手法により形成する。P電極32としては例えばAu/
Znを同様にスパッタリング等の手法を用いて形成す
る。このとき、P・N両電極31,32とも、吸収層と
して作用するので、電極寸法はできる限り小さくし、望
ましくはボンディング可能な最小形状にする必要があ
る。
In forming the electrodes 31 and 32, for example, AuGe / Ni is formed as the N electrode 31 by a method such as sputtering. As the P electrode 32, for example, Au /
Similarly, Zn is formed using a technique such as sputtering. At this time, since both the P and N electrodes 31 and 32 act as an absorption layer, it is necessary to make the electrode size as small as possible and preferably to have a minimum shape that allows bonding.

【0051】最後に、この基板をスクライブ手法やダイ
シング等により基板から個々のチップに分割形成する。
Finally, this substrate is divided and formed into individual chips from the substrate by a scribing method or dicing.

【0052】そして、本実施例の光結合素子10を、例
えば図6(A)〜(F)に示した樹脂ケース41に収納
し、光結合装置が完成する。該樹脂ケース41は第一実
施例と同様にMID法にて作成されたものである。
Then, the optical coupling element 10 of this embodiment is housed in, for example, the resin case 41 shown in FIGS. 6A to 6F, and the optical coupling device is completed. The resin case 41 is made by the MID method as in the first embodiment.

【0053】本実施例による光結合装置においても第一
実施例と同様の効果を奏することは言うまでもない。
It goes without saying that the optical coupling device according to this embodiment also has the same effects as those of the first embodiment.

【0054】なお、本発明は、上記実施例に限定される
ものではなく、本発明の範囲内で上記実施例に多くの修
正および変更を加え得ることは勿論である。
The present invention is not limited to the above embodiment, and it goes without saying that many modifications and changes can be made to the above embodiment within the scope of the present invention.

【0055】[0055]

【発明の効果】以上の説明から明らかな通り、本発明請
求項1によると、受発光素子を同一半導体基板上に一体
形成しているため、従来の光結合装置に較べて製造工程
が単純で、短時間に、精度良く造ることができる。ま
た、受発光素子間の距離が短くできるので、光の利用効
率が上がり、高効率・低電流化が期待できる。
As is apparent from the above description, according to claim 1 of the present invention, since the light emitting and receiving elements are integrally formed on the same semiconductor substrate, the manufacturing process is simpler than that of the conventional optical coupling device. It can be manufactured accurately in a short time. Further, since the distance between the light emitting and receiving elements can be shortened, the light utilization efficiency is improved, and high efficiency and low current can be expected.

【0056】請求項2によると、電極に導電バンプを設
けることにより、光結合素子をダイレクトに樹脂ケース
内のランド部やプリント基板等の配線回路上に直接ボン
ディングできる。したがって、従来使用していた様な、
Auワイヤー等によるボンディングが不要となるため、
チップ保護等の目的で使用される樹脂の応力による影響
を受けることが無く、ワイヤー断線等の不良の無い高信
頼性の製品を提供することができる。また、従来より用
いられていた外部配線回路上の二次側ワイヤーボンディ
ング用パッドを設ける必要が無いので、ケースサイズを
コンパクト化できる。さらに、チップ面に対して張力が
均等にかかるように電極パッドを設計することにより、
ダイボンディングの際のマンハッタン(浮き上がり)現
象も防ぐことができる。また、光結合素子をプリント配
線基板上等に直接実装することにより、従来のものに比
べてより高密度な実装が達成される。
According to the second aspect, by providing the conductive bumps on the electrodes, the optical coupling element can be directly bonded directly to the land portion in the resin case or a wiring circuit such as a printed circuit board. Therefore, it seems that it was used conventionally,
Since bonding with Au wire etc. is unnecessary,
It is possible to provide a highly reliable product that is not affected by the stress of the resin used for chip protection or the like and has no defects such as wire breakage. Further, since it is not necessary to provide the secondary side wire bonding pad on the external wiring circuit which has been conventionally used, the case size can be made compact. Furthermore, by designing the electrode pad so that tension is evenly applied to the chip surface,
It is also possible to prevent the Manhattan (lifting) phenomenon during die bonding. Further, by mounting the optical coupling element directly on the printed wiring board or the like, higher density mounting can be achieved as compared with the conventional one.

【0057】請求項3によると、リードフレームレス形
状の樹脂ケースを用いて、上記チップを封止することに
より、リードフレームと外装モールド樹脂材料との間の
熱膨張係数の違いによる、クラック・剥離等の、両材料
間での密着性に係る信頼性上の問題も解消される。ま
た、リードレス化したことにより、金属リードピン化の
曲がりや変形も無くなるといった優れた効果がある。
According to the third aspect of the present invention, by encapsulating the chip with a lead frameless resin case, cracks and peeling due to a difference in thermal expansion coefficient between the lead frame and the exterior molding resin material can be achieved. Also, the reliability problem related to the adhesion between both materials is solved. Further, the leadless structure has an excellent effect of eliminating the bending and deformation of the metal lead pin.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第一実施例を示すモノリシック型光結
合装置の各製造工程図面であり、(A)は半導体基板に
凹部を形成した状態を示す図、(B)は凹部に半導体成
長層をエピタキシャル成長させた図、(C)は半導体成
長層の中央部分を除去して溝を形成した図、(D)は溝
に透光性絶縁材料を充填した図、(E)は凹部を光反射
膜で塞いだ図、(F)は樹脂ケースに搭載した図
1A and 1B are each a manufacturing process drawing of a monolithic optical coupling device showing a first embodiment of the present invention, FIG. 1A is a view showing a state in which a recess is formed in a semiconductor substrate, and FIG. 1B is a semiconductor growth in the recess. The layer is epitaxially grown, (C) is a figure in which a central portion of the semiconductor growth layer is removed to form a groove, (D) is a figure in which the groove is filled with a translucent insulating material, and (E) is a case where the concave portion is exposed to light. Figure closed with a reflective film, (F) figure mounted in a resin case

【図2】モノリシック型光結合装置の外観斜視図FIG. 2 is an external perspective view of a monolithic optical coupling device.

【図3】本発明の第一実施例のモノリシック型光結合装
置を搭載する樹脂ケースであって、(A)は平面図、
(B)は(A)のA−A断面図、(C)は側面図、
(D)は(A)のB−B断面図、(E)は正面図、
(F)は底面図
FIG. 3 is a resin case in which the monolithic optical coupling device of the first embodiment of the present invention is mounted, (A) is a plan view,
(B) is a sectional view taken along line AA of (A), (C) is a side view,
(D) is a sectional view taken along line BB of (A), (E) is a front view,
(F) is a bottom view

【図4】光結合素子を外部実装基板上に直接実装した外
観斜視図
FIG. 4 is an external perspective view of an optical coupling element directly mounted on an external mounting substrate.

【図5】本発明の第二実施例を示すモノリシック型光結
合装置の各製造工程図面であり、(A)は半導体基板に
凹部を形成した状態を示す図、(B)は凹部に半導体成
長層をエピタキシャル成長させた図、(C)は半導体基
板の裏面に溝を形成した図、(D)は溝に透光性絶縁材
料を充填し凹部を光反射膜で塞いだ図
5A and 5B are each a manufacturing process drawing of a monolithic optical coupling device showing a second embodiment of the present invention, FIG. 5A showing a state in which a recess is formed in a semiconductor substrate, and FIG. 5B showing semiconductor growth in the recess. Figure in which the layer is epitaxially grown, Figure in (C) shows a groove formed on the back surface of the semiconductor substrate, and (D) in which the groove is filled with a translucent insulating material and the recess is closed by a light reflecting film.

【図6】本発明の第二実施例のモノリシック型光結合装
置を搭載する樹脂ケースであって、(A)は平面図、
(B)は(A)のC−C断面図、(C)は側面図、
(D)は(A)のD−D断面図、(E)は正面図、
(F)は底面図
FIG. 6 is a resin case on which the monolithic optical coupling device of the second embodiment of the present invention is mounted, (A) is a plan view,
(B) is a cross-sectional view taken along line CC of (A), (C) is a side view,
(D) is a sectional view taken along the line D-D of (A), (E) is a front view,
(F) is a bottom view

【図7】従来の光結合装置の斜視図FIG. 7 is a perspective view of a conventional optical coupling device.

【図8】従来の光結合装置の断面図FIG. 8 is a sectional view of a conventional optical coupling device.

【符号の説明】 10 光結合素子 11 発光素子 12 受光素子 21 半導体基板 22 凹部 26 溝 27 透光性絶縁材料 31,32 接続用電極 41 樹脂ケース 42 収納凹部 43a〜43d 立体配線部 47 導電バンプ 48 封止樹脂[Explanation of reference numerals] 10 optical coupling element 11 light emitting element 12 light receiving element 21 semiconductor substrate 22 recessed portion 26 groove 27 translucent insulating material 31, 32 connection electrode 41 resin case 42 accommodating recessed portion 43a to 43d three-dimensional wiring portion 47 conductive bump 48 Sealing resin

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 発光素子と受光素子とを有する光結合装
置の製造方法において、半導体基板の電極形成面または
これと反対側の面に凹部を形成し、該凹部の表面上に、
発光素子および受光素子としての光結合素子をエピタキ
シャル成長法により同時に一体形成し、前記電極形成面
またはこれと反対側の面に、受発光素子間の一部を切り
欠くように溝を形成し、該溝に透光性絶縁材料を充填し
て光路を形成し、発光素子と受光素子との間の透光性絶
縁材料以外の部分をエッチングにて除去して受発光間を
電気的に分離し、前記電極形成面に外部回路との接続用
電極をパターン形成することを特徴とするモノリシック
型光結合装置の製造方法。
1. A method of manufacturing an optical coupling device having a light emitting element and a light receiving element, wherein a recess is formed on a surface of a semiconductor substrate on which an electrode is formed or a surface opposite to the surface, and a recess is formed on the surface of the recess.
A light-emitting element and an optical coupling element as a light-receiving element are integrally formed at the same time by an epitaxial growth method, and a groove is formed on the electrode forming surface or a surface opposite to the electrode-forming surface so as to cut out a part between the light-receiving and emitting elements. An optical path is formed by filling the groove with a light-transmissive insulating material, and a portion other than the light-transmissive insulating material between the light emitting element and the light receiving element is removed by etching to electrically separate the light receiving and emitting light, A method for manufacturing a monolithic optical coupling device, characterized in that an electrode for connection to an external circuit is patterned on the electrode formation surface.
【請求項2】 請求項1記載の各接続用電極に、実装基
板上に直接実装するための導電バンプを形成することを
特徴とするモノリシック型光結合装置の製造方法。
2. A method for manufacturing a monolithic optical coupling device, wherein conductive bumps for directly mounting on a mounting substrate are formed on each of the connection electrodes according to claim 1.
【請求項3】 上面に収納凹部を有する樹脂ケースを射
出成形またはトランスファ成形等によって成形し、前記
収納凹部から樹脂ケースの側面あるい下面にかけて、薄
膜状の立体配線部を立体的に引き回して形成し、請求項
1記載の光結合素子を前記収納凹部内に搭載し、該収納
凹部を封止樹脂で封止することを特徴とするモノリシッ
ク型光結合装置の製造方法。
3. A resin case having an accommodating recess on the upper surface is formed by injection molding or transfer molding, and a thin film three-dimensional wiring portion is three-dimensionally drawn from the accommodating recess to the side surface or the lower surface of the resin case. Then, a method for manufacturing a monolithic optical coupling device, wherein the optical coupling element according to claim 1 is mounted in the storage recess, and the storage recess is sealed with a sealing resin.
JP16276392A 1992-06-22 1992-06-22 Manufacture of monolithic photo-coupler Pending JPH065906A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16276392A JPH065906A (en) 1992-06-22 1992-06-22 Manufacture of monolithic photo-coupler

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16276392A JPH065906A (en) 1992-06-22 1992-06-22 Manufacture of monolithic photo-coupler

Publications (1)

Publication Number Publication Date
JPH065906A true JPH065906A (en) 1994-01-14

Family

ID=15760767

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16276392A Pending JPH065906A (en) 1992-06-22 1992-06-22 Manufacture of monolithic photo-coupler

Country Status (1)

Country Link
JP (1) JPH065906A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08264823A (en) * 1995-01-27 1996-10-11 Sharp Corp Photocoupler
US7235804B2 (en) 2005-06-16 2007-06-26 Sharp Kabushiki Kaisha Method for manufacturing optocoupler

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08264823A (en) * 1995-01-27 1996-10-11 Sharp Corp Photocoupler
US7235804B2 (en) 2005-06-16 2007-06-26 Sharp Kabushiki Kaisha Method for manufacturing optocoupler
CN100452336C (en) * 2005-06-16 2009-01-14 夏普株式会社 Method for manufacturing optocoupler

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