JPH0654754B2 - Method for forming amorphous semiconductor film - Google Patents

Method for forming amorphous semiconductor film

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Publication number
JPH0654754B2
JPH0654754B2 JP60125305A JP12530585A JPH0654754B2 JP H0654754 B2 JPH0654754 B2 JP H0654754B2 JP 60125305 A JP60125305 A JP 60125305A JP 12530585 A JP12530585 A JP 12530585A JP H0654754 B2 JPH0654754 B2 JP H0654754B2
Authority
JP
Japan
Prior art keywords
gas
substrate
semiconductor film
film
container
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60125305A
Other languages
Japanese (ja)
Other versions
JPS61283112A (en
Inventor
栄一郎 田中
昭雄 滝本
浩二 秋山
晋匡 倉本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
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Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60125305A priority Critical patent/JPH0654754B2/en
Publication of JPS61283112A publication Critical patent/JPS61283112A/en
Publication of JPH0654754B2 publication Critical patent/JPH0654754B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photoreceptors In Electrophotography (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明はシリコン,ゲルマニュームなどの局在化状態密
度を減少せしめる補償元素を含む非晶質半導体膜を形成
する方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an amorphous semiconductor film containing a compensating element such as silicon or germanium that reduces the localized density of states.

従来の技術 太陽電池,電子写真感光体などの非晶質シリコン、非晶
質ゲルマニュームなどの非晶質半導体膜の形成には、従
来比較的低温で薄膜が形成できるプラズマCVD法が最
もよく使用されている。この方法は、例えば非晶質シリ
コン膜を形成する場合、原料ガスとしてSiH4(シランガ
ス)あるいはSiH4とH2の混合ガスを使用し、基板温度
を200〜350℃に、またガス圧力を0.1〜10To
rrに制御しながら電極と対向した基板間に高周波電力を
印加してプラズマを発生させ、シランガスを分解して基
板上に膜を形成する方法である。この場合、堆積速度は
約3μm/h と遅く、約20μm以上を要する電子写真
感光体を製作する場合には6時間以上を必要とし、迅速
な量産が困難である。また、堆積速度を上げるために高
周波電力を増加すると、原料ガス中で気相反応により粉
体状のシリコンが大量に発生し、製造装置の排気系にめ
ずまりを起こし量産上大きな問題であった。
2. Description of the Related Art Conventionally, the plasma CVD method that can form a thin film at a relatively low temperature is most commonly used for forming an amorphous semiconductor film such as an amorphous silicon film such as a solar cell or an electrophotographic photoreceptor or an amorphous germanium film. ing. In this method, for example, when forming an amorphous silicon film, SiH 4 (silane gas) or a mixed gas of SiH 4 and H 2 is used as a source gas, the substrate temperature is 200 to 350 ° C., and the gas pressure is 0. 1-10 To
In this method, high frequency power is applied between the substrates facing the electrodes while controlling to rr to generate plasma, and the silane gas is decomposed to form a film on the substrate. In this case, the deposition rate is as slow as about 3 μm / h, and it takes 6 hours or more to manufacture an electrophotographic photosensitive member requiring about 20 μm or more, which makes rapid mass production difficult. In addition, when the high frequency power is increased to increase the deposition rate, a large amount of powdery silicon is generated in the source gas due to a gas phase reaction, which causes a waste in the exhaust system of the manufacturing apparatus, which is a major problem in mass production. It was

上記のプラズマCVD装置の持つ問題点を解決する手段
として提案されたのが、電子サイクロトロン共鳴(EC
R)を用いたプラズマCVD装置である。(特開昭56
−155535号公報,特開昭59−159167号公
報) 第2図にこの装置の基本構成を示す。1はプラズマ生成
室、2は膜形成室であり、プラズマ生成室1にはマグネ
トロン電源から導波管3が導波用窓4で接続されてお
り、その外周には磁気コイル5が設置してある。また、
膜形成室2の外周は水冷パイプ6で冷却されている。プ
ラズマ生成室1には第1ガス導入口7よりプラズマ励起
用ガスを導入し、マイクロ波によりプラズマ生成室内1
にプラズマを励起し、更に磁場を印加することによりプ
ラズマ中に電子サイクロトロン共鳴を起こし、拡散磁界
によりプラズマを導入口8より膜形成室2に配置された
基板ホルダー9上の基板10に導く。膜形成室2に第2
ガス導入口11,11Aより原料ガスを導入しプラズマ
と接触させ、原料ガス12を分解し膜を堆積させる。
Electron cyclotron resonance (EC) has been proposed as a means for solving the problems of the above plasma CVD apparatus.
It is a plasma CVD apparatus using R). (JP-A-56
No. 155535, JP-A-59-159167) FIG. 2 shows the basic configuration of this device. Reference numeral 1 is a plasma generation chamber, 2 is a film formation chamber, a plasma generation chamber 1 is connected to a waveguide 3 from a magnetron power source through a waveguide window 4, and a magnetic coil 5 is installed on the outer periphery thereof. is there. Also,
The outer periphery of the film forming chamber 2 is cooled by a water cooling pipe 6. A plasma excitation gas is introduced into the plasma generation chamber 1 through the first gas introduction port 7, and the plasma generation chamber 1 is microwaved.
The plasma is excited and the magnetic field is applied to cause electron cyclotron resonance in the plasma, and the diffusion magnetic field guides the plasma to the substrate 10 on the substrate holder 9 arranged in the film forming chamber 2 from the inlet 8. Second in the film forming chamber 2
A source gas is introduced through the gas inlets 11 and 11A and brought into contact with plasma to decompose the source gas 12 and deposit a film.

この方法は、電子サイクロトロン共鳴を用いていること
から、2×10-5〜0.1Torrの低圧力下でも放電の持
続が可能になっており、更に膜形成に利用されるエネル
ギーは基板10に入射するイオンの有するエネルギーで
与えられ、膜表面のイオンの衝突が膜をちみつにするた
め基板温度を室温に設定している場合においても良質な
膜が得られる。この方法により半導体プロセス用として
良質なSiN,SiO2などの絶縁層、またはSiを低温で形成
できることが示されている。これは、ごく表面のみがイ
オンエネルギーによって高温に上昇しSi−Hの結合を
立ち切ることによると考えられている。
Since this method uses electron cyclotron resonance, discharge can be sustained even under a low pressure of 2 × 10 −5 to 0.1 Torr, and the energy used for film formation is applied to the substrate 10. The high-quality film can be obtained even when the substrate temperature is set to room temperature because it is given by the energy of the incident ions and collision of the ions on the film surface causes the film to honey. It has been shown that this method can form a good-quality insulating layer such as SiN or SiO 2 or Si for a semiconductor process at a low temperature. It is considered that this is because only the very surface rises to a high temperature due to ion energy and breaks the Si—H bond.

発明が解決しようとする問題点 上記のようなECRを用いたCVD法は低温で高速に膜
堆積ができる半面、マイクロ波と磁界を用いることから
大面積にわたって均一な膜形成には不向きである。ま
た、CVD法の欠点であったシリコン粉体の発生につい
てはまだまだ未知の状態である。
Problems to be Solved by the Invention The CVD method using ECR as described above is not suitable for forming a uniform film over a large area because it uses microwaves and a magnetic field while it can deposit a film at a low temperature and a high speed. Further, the generation of silicon powder, which is a drawback of the CVD method, is still unknown.

また、イオンの入射により局在化状態密度を減少せしめ
る1価補償元素である水素を含む非晶質半導体膜が形成
できるかについての未知の状態である。
In addition, it is an unknown state as to whether an amorphous semiconductor film containing hydrogen, which is a monovalent compensating element that reduces the localized density of states by the incidence of ions, can be formed.

本発明は粉体の発生量少く、また大面積においても均一
な膜堆積が可能な非晶質半導体膜の堆積方法の実現を目
的とする。
It is an object of the present invention to realize a method for depositing an amorphous semiconductor film, which produces a small amount of powder and enables uniform film deposition even in a large area.

また、励起ガスに水素などの1価元素をもちい、イオン
の入射により局在化状態密度を減少せしめる1価補償元
素である水素を含む非晶質半導体膜が形成できる膜の堆
積方法を実現することを目的とする。
Further, a method of depositing a film, which uses a monovalent element such as hydrogen as an excitation gas and can form an amorphous semiconductor film containing hydrogen which is a monovalent compensating element which reduces the localized density of states by the incidence of ions, is realized. The purpose is to

問題点を解決するための手段 被着される基板が配置された容器内を減圧し、被着膜原
材料であるガス化された分子を前記容器内に導入し前記
基板上に堆積する非晶質膜の形成方法であって、電気的
放電を用いてガスを前励起しイオンを含む励起されたガ
スを前記容器内に導入された前記原材料ガスと接触さ
せ、その原材料ガスをラジカル化し前記基板上に堆積す
る工程を含み、その工程は、前記基板と、前記イオン及
びラジカルを含むプラズマとの間に形成されるシースの
幅(以下Sisと記す)が容器内のイオンの平均自由工程
(λ)に対し、Sis<λとなるガス圧にて実施される。
Means for Solving the Problems Amorphous that decompresses the inside of a container in which a substrate to be deposited is placed and introduces gasified molecules, which is a raw material for a deposition film, into the container and deposits on the substrate. A method for forming a film, wherein a gas is pre-excited by using an electric discharge to bring an excited gas containing ions into contact with the raw material gas introduced into the container, and the raw material gas is radicalized to form a gas on the substrate. And the width of the sheath formed between the substrate and the plasma containing the ions and radicals (hereinafter referred to as Si s ) is the mean free path of ions in the container.
For (λ), the gas pressure is such that Si s <λ.

作 用 電気的放電によって励起されイオン化された前励起ガス
は基板が設置された容器内に導入される。この時イオン
は電子をひきつれ原材料ガスと接触し多量のラジカルを
生成する。このラジカルは基板表面まで拡散し基板上の
膜材料と反応し堆積する。
The pre-excited gas that is excited and ionized by the working electric discharge is introduced into the container in which the substrate is installed. At this time, the ions attract electrons and come into contact with the raw material gas to generate a large amount of radicals. These radicals diffuse to the surface of the substrate and react with the film material on the substrate to be deposited.

また、イオンの寿命は比較的短くプラズマの存在しない
シース内に存在する中性分子との衝突により基板に付着
する前にエネルギーを失う。このため、多量に発生した
イオンも基板に到達する量は極く少なく堆積速度を遅く
している原因と考えられる。またこの際、気相において
イオン,ラジカルどうしの衝突により多量の気相反応が
誘起され半導体材料のポリマーが発生し、反応容器内に
粉体を付着させる。この考えを基にシースの幅が小さく
なるようガス圧を制御する事により堆積速度を著しく向
上する事ができ、また反応容器内の粉体の発生を著しく
減少させることが出来た。また、励起ガスとして水素を
含むガスを用いることによって、局在化状態密度を減少
させる事ができる半導体膜を形成することができた。
In addition, the lifetime of ions is relatively short, and energy is lost before they adhere to the substrate due to collision with neutral molecules existing in the sheath where plasma is not present. Therefore, it is considered that even a large amount of generated ions has a very small amount reaching the substrate, which slows down the deposition rate. Further, at this time, a large amount of gas phase reaction is induced by collision of ions and radicals in the gas phase to generate a polymer of the semiconductor material, and the powder is attached to the inside of the reaction container. Based on this idea, by controlling the gas pressure so as to reduce the width of the sheath, the deposition rate could be significantly improved, and the generation of powder in the reaction vessel could be significantly reduced. Further, by using a gas containing hydrogen as the excitation gas, a semiconductor film capable of reducing the localized density of states could be formed.

実施例 以下、図面をもって本発明の実施例について述べる。Embodiments Embodiments of the present invention will be described below with reference to the drawings.

〔実施例1〕 第1図に本発明に用いたイオン源を示す。イオン源には
励起ガスとして水素を含むガスを励起ガス導入口13よ
り導入する。プラズマソース14の背面と側面には磁石
15を配し、カスプ磁界15aを作るようになってい
る。最大磁場の強さは約2.3KGで、プラズマソース
14の内側では1KG、壁から約4cm内側では20Gで
ある。プラズマはフィラメント16と陽極(壁)17と
の間に120V〜250Vの交流電圧を印加し放電によ
り発生する。カスプ磁界15aにより電子のとじ込め時
間が長くなるため10-2〜10-3Torrでも安定に放電す
る。このように発生したプラズマは多孔グリッド18を
通って、あらかじめ原料ガス導入口19から原料ガスが
導入されている反応室20に、外部磁界21による拡散
磁界により導かれて移動し、原料ガス(SiH4)と接触し
ラジカル化する。
Example 1 FIG. 1 shows the ion source used in the present invention. A gas containing hydrogen as an exciting gas is introduced into the ion source through the exciting gas inlet 13. Magnets 15 are arranged on the back and side surfaces of the plasma source 14 to create a cusp magnetic field 15a. The maximum magnetic field strength is about 2.3 KG, 1 KG inside the plasma source 14 and 20 G about 4 cm inside the wall. The plasma is generated by applying an AC voltage of 120 V to 250 V between the filament 16 and the anode (wall) 17 and discharging. The cusp magnetic field 15a prolongs the electron confinement time, so that stable discharge occurs even at 10 -2 to 10 -3 Torr. The plasma thus generated moves through the porous grid 18 to the reaction chamber 20 into which the raw material gas has been introduced from the raw material gas introduction port 19 by being guided by the diffusion magnetic field by the external magnetic field 21 to move the raw material gas (SiH 4 ) Contact with and radicalize.

反応室では基板22との間に負バイアス20Vが印加さ
れているためプラズマ中の陽イオンは基板22に加速さ
れる。この時反応室20の圧力は、原料ガス5×10-2
×5×10-4Torrにポンプ23によって排気、制御され
ている。また多孔グリッド18から基板22までの距離
は約15cmに設定されている。この時導入されたイオン
の平均自由行程はプラズマのイオン化率が数%なので
0.1〜20cmである。基板22に印加されている負バ
イアスにより基板表面にイオンシースを形成する。この
イオンシースの幅はLangmuir−Childの式からイオンの
飽和電流(IO)に対しIO -1/2に比例し負バイアス電圧
(Vf)に対しVf 3/4に比例する。5×10-4Torrでは、
O=30mA/cm2、Vf=−20Vの時イオンシース幅は
0.2mm程度である。しかし、5×10-2Torrではイオ
ンの飽和電流IO=1mA/cm2でイオンシース幅は1mm程
度となる。このような状態にて基板上に堆積した非晶質
シリコン膜の暗導電率、光導電率(546nm光で1.
4μW/cm2)、水素含有量を赤外吸収の吸光度からも
とめた。基板は室温からヒータ24により350℃まで
制御したが基板温度の依存性は少ない。
Since a negative bias of 20 V is applied between the reaction chamber and the substrate 22, cations in the plasma are accelerated to the substrate 22. At this time, the pressure in the reaction chamber 20 is 5 × 10 −2 as the source gas.
Exhaust and control by a pump 23 to × 5 × 10 −4 Torr. The distance from the porous grid 18 to the substrate 22 is set to about 15 cm. The mean free path of the ions introduced at this time is 0.1 to 20 cm because the ionization rate of plasma is several%. The negative bias applied to the substrate 22 forms an ion sheath on the substrate surface. From the Langmuir-Child equation, the width of the ion sheath is proportional to I O -1/2 for the ion saturation current (I O ) and proportional to V f 3/4 for the negative bias voltage (V f ). At 5 × 10 -4 Torr,
Ion sheath width when I O = 30mA / cm 2, V f = -20V is about 0.2 mm. However, at 5 × 10 −2 Torr, the ion sheath current becomes about 1 mm at an ion saturation current I O = 1 mA / cm 2 . In this state, the amorphous silicon film deposited on the substrate has dark conductivity and photoconductivity (1.
4 μW / cm 2 ) and the hydrogen content was determined from the absorbance of infrared absorption. The temperature of the substrate is controlled from room temperature to 350 ° C. by the heater 24, but the dependency of the substrate temperature is small.

またこの時の堆積速度は20μm/hと非常に早いこと
が確認された。
It was also confirmed that the deposition rate at this time was as high as 20 μm / h.

第3図に暗導電率と光導電率の結果を示す。図中31
a,31bはそれぞれ原料ガスと励起ガスにSiH4とH
をもちい、それぞれの流量がSiH4/Hの比が67%,
32a,32bは流量の比が34%の条件で、31b,
32bは暗導電率、31a,32aは光導電率を示す。
イオンシースの幅とイオンの平均自由行程とが等しくな
る5×10-2Torr付近で光導電率が暗導電率と遠しく光
感度がない半導体材料としては膜質の悪い膜となる。ま
た、第4図には5×10-4Torrでの原料ガスと励起ガス
の流量の比によって非晶質シリコン膜に含まれる水素量
は制御できることを示す。41は励起ガスに水素を10
0%、42は励起ガスにHe/H2=0.24とした場合につい
て示したもので、それぞれ40〜14atm%,20〜5a
tm%まで制御できる事が分かった。
Figure 3 shows the results of dark conductivity and photoconductivity. 31 in the figure
a and 31b are SiH 4 and H 2 for the source gas and the excitation gas, respectively.
With a flow rate of SiH 4 / H 2 of 67%,
32a and 32b have a flow rate ratio of 34%.
Reference numeral 32b represents dark conductivity, and reference numerals 31a and 32a represent photoconductivity.
In the vicinity of 5 × 10 -2 Torr where the width of the ion sheath and the mean free path of ions are equal, the photoconductivity is far from the dark conductivity and the photosensitivity is poor, so that the film has poor film quality. Further, FIG. 4 shows that the amount of hydrogen contained in the amorphous silicon film can be controlled by the ratio of the flow rates of the source gas and the excitation gas at 5 × 10 −4 Torr. 41 is hydrogen as an exciting gas 10
0% and 42 indicate the case where He / H 2 = 0.24 was used as the excitation gas, and 40 to 14 atm% and 20 to 5 a, respectively.
It turns out that it can control up to tm%.

また、このような堆積条件では通常のプラズマCVD法
と明らかに異なり、堆積容器内のシリコン粉体の発生量
が著しく少なく、電子写真感光体に必要な20μm以上
の膜厚に堆積しても粉体の発生が極めて少ないため装置
の保守に必要だった時間が不用になり生産性が著しく向
上することができた。
Further, under such a deposition condition, unlike the ordinary plasma CVD method, the amount of silicon powder generated in the deposition container is remarkably small, and even if the film is deposited to a film thickness of 20 μm or more required for the electrophotographic photoreceptor, the powder is not produced. Since the generation of the body is extremely small, the time required for the maintenance of the device is unnecessary and the productivity can be remarkably improved.

また、原料ガスとしてSiH4を用いたが、他のSiF4,SiCl
4,Si2H6,Si2F6,SiH2F2,SiH3F,SiHClなどのシリ
コン系ガスのほかにGeH4,GeF4,GeH2F2,Ge2F6,GeH
3F,GeHF3 などのゲルマニューム系ガスを用いて非晶質
ゲルマニューム、あるいは非晶質シリコン、ゲルマニュ
ーム半導体膜を形成することもできる。
Although SiH 4 was used as the source gas, other SiF 4 , SiCl 4
In addition to silicon-based gases such as 4 , Si 2 H 6 , Si 2 F 6 , SiH 2 F 2 , SiH 3 F, and SiHCl 3 , GeH 4 , GeF 4 , GeH 2 F 2 , Ge 2 F 6 , GeH
Amorphous germanium or amorphous silicon or germanium semiconductor film can be formed by using germanium-based gas such as 3 F or GeHF 3 .

〔実施例2〕 次に、第1図の装置を用いて堆積容器内にドーピングガ
スとしてB2H6を添加した場合について述べる。
Example 2 Next, the case where B 2 H 6 is added as a doping gas into the deposition container using the apparatus shown in FIG. 1 will be described.

第5図に5×10-4Torr、SiH4/Hが34%でB2H6
量を変化させて第3図と同様に暗導電率51bと光導電
率51aを測定した。一方、5×10-2Torrでは52
b,52aに示すように感度が低く、またシリコン粉体
の発生量も著しく増加してくる。
In FIG. 5, 5 × 10 −4 Torr, SiH 4 / H 2 was 34%, the amount of B 2 H 6 was changed, and the dark conductivity 51b and the photoconductivity 51a were measured as in FIG. On the other hand, 5 × 10 -2 Torr is 52
As indicated by b and 52a, the sensitivity is low and the amount of silicon powder generated is significantly increased.

励起ガスとしてHガス、H,Heの混合ガスを用いた
が、Hガスに希ガス例えばAr,Ne,Xeなどを混合し用い
ても同じような結果が得られる。
Although a mixed gas of H gas, H, and He was used as the excitation gas, similar results can be obtained by mixing H gas with a rare gas such as Ar, Ne, or Xe.

ドーピング材料としてはB以外にもP、As、Gaなど
のガス化可能な材料はすべて適応出来ることは明らかで
ある。
As the doping material, it is clear that in addition to B, all gasifiable materials such as P, As and Ga can be applied.

発明の効果 以上述べたように、本発明によると、極めて早い堆積速
度でしかも反応容器内にほとんど粉体を発生させずに非
晶質半導体膜を堆積することができた。さらに半導体膜
には局在化状態密度を減少せしめる1価元素を励起ガス
に用いることにより価電子制御が可能な非晶質半導体膜
が容易に得られることができる。
EFFECTS OF THE INVENTION As described above, according to the present invention, an amorphous semiconductor film can be deposited at an extremely high deposition rate and with almost no powder generated in the reaction vessel. Further, an amorphous semiconductor film capable of controlling valence electrons can be easily obtained by using a monovalent element that reduces the localized density of states in the semiconductor film as an excitation gas.

これにより、電子写真感光体、太陽電子などの非晶質半
導体膜をもちいた機能デバイスは従来のCVD法に比較
して更に安価に、容易に製造できる。
As a result, a functional device using an amorphous semiconductor film such as an electrophotographic photoconductor or a solar electron can be manufactured more easily at a lower cost than the conventional CVD method.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例に用いる堆積装置の一実施例
を示す断面図、第2図は従来のECRプラズマCVD装
置の例を示す断面図、第3図は本発明に係わる非晶質半
導体膜の暗導電率、光導電率を示すグラフ、第4図は膜
中の水素濃度を測定した例を示すグラフ、第5図はBド
ープによる暗導電率、光導電率の変化を示すグラフであ
る。 13……ガス導入口、14……プラズマソース、15…
…磁石、16……フィラメント、17……陽極、18…
…多孔グリッド、19……原料ガス導入口、20……反
応室、21……外部磁界、22……基板。
FIG. 1 is a sectional view showing an embodiment of a deposition apparatus used in an embodiment of the present invention, FIG. 2 is a sectional view showing an example of a conventional ECR plasma CVD apparatus, and FIG. 3 is an amorphous structure according to the present invention. Graph showing dark conductivity and photoconductivity of the high-quality semiconductor film, FIG. 4 is a graph showing an example of measuring hydrogen concentration in the film, and FIG. 5 shows changes in dark conductivity and photoconductivity by B doping. It is a graph. 13 ... Gas inlet, 14 ... Plasma source, 15 ...
… Magnet, 16… Filament, 17… Anode, 18…
... Porous grid, 19 ... Raw material gas inlet, 20 ... Reaction chamber, 21 ... External magnetic field, 22 ... Substrate.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】被着される基板が配置された容器内を減圧
し、被着膜原材料であるガス化された分子を前記容器内
に導入し前記基板上に堆積する非晶質半導体膜の形成方
法であって、前記容器に隣接した空間で電気的放電を用
いて励起ガスを前励起し、イオンを含む励起されたガス
を、前記容器内に導入された前記原材料ガスと接触さ
せ、前記原材料ガスをラジカル化し基板上に堆積する工
程を含み、前記基板と、前記イオン及びラジカルを含む
プラズマとの間に形成されるシースの幅(Siと記
す)が前記容器内の前記イオンの平均自由工程(λ)に対
し、Si<λとなるガス圧にて堆積を実施する事を特
徴とする非晶質半導体膜の形成方法。
1. An amorphous semiconductor film in which a container in which a substrate to be deposited is placed is decompressed, gasified molecules as a raw material for a film to be deposited are introduced into the container and deposited on the substrate. A method of forming, wherein the excited gas is pre-excited using an electrical discharge in a space adjacent to the container, the excited gas containing ions is contacted with the raw material gas introduced into the container, A step of radicalizing a raw material gas and depositing it on a substrate, wherein a width (referred to as Si s ) of a sheath formed between the substrate and a plasma containing the ions and radicals is an average of the ions in the container. A method of forming an amorphous semiconductor film, characterized in that deposition is carried out at a gas pressure such that Si s <λ for the free process (λ).
【請求項2】原材料ガスにシリコンを含むガスを用い、
また励起ガスとして水素を含むガスを用い、水素を含む
非晶質シリコン膜を堆積する特許請求の範囲第1項記載
の非晶質半導体膜の形成方法。
2. A gas containing silicon is used as a raw material gas,
The method for forming an amorphous semiconductor film according to claim 1, wherein a gas containing hydrogen is used as an exciting gas to deposit an amorphous silicon film containing hydrogen.
【請求項3】基板が配置された容器内の圧力を5×10-2
以下とすることを特徴とする特許請求の範囲第2項記載
の非晶質半導体膜の形成方法。
3. The pressure inside the container in which the substrate is placed is 5 × 10 -2.
The method for forming an amorphous semiconductor film according to claim 2, wherein:
JP60125305A 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film Expired - Lifetime JPH0654754B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60125305A JPH0654754B2 (en) 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60125305A JPH0654754B2 (en) 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film

Publications (2)

Publication Number Publication Date
JPS61283112A JPS61283112A (en) 1986-12-13
JPH0654754B2 true JPH0654754B2 (en) 1994-07-20

Family

ID=14906800

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60125305A Expired - Lifetime JPH0654754B2 (en) 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film

Country Status (1)

Country Link
JP (1) JPH0654754B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0666272B2 (en) * 1986-12-17 1994-08-24 株式会社日立製作所 Method for forming silicon-based amorphous film

Also Published As

Publication number Publication date
JPS61283112A (en) 1986-12-13

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