JPS61283112A - Forming method for amorphous semiconductor film - Google Patents

Forming method for amorphous semiconductor film

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Publication number
JPS61283112A
JPS61283112A JP60125305A JP12530585A JPS61283112A JP S61283112 A JPS61283112 A JP S61283112A JP 60125305 A JP60125305 A JP 60125305A JP 12530585 A JP12530585 A JP 12530585A JP S61283112 A JPS61283112 A JP S61283112A
Authority
JP
Japan
Prior art keywords
gas
substrate
plasma
container
semiconductor film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60125305A
Other languages
Japanese (ja)
Other versions
JPH0654754B2 (en
Inventor
Eiichiro Tanaka
栄一郎 田中
Akio Takimoto
昭雄 滝本
Koji Akiyama
浩二 秋山
Akimasa Kuramoto
倉本 晋匡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60125305A priority Critical patent/JPH0654754B2/en
Publication of JPS61283112A publication Critical patent/JPS61283112A/en
Publication of JPH0654754B2 publication Critical patent/JPH0654754B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photovoltaic Devices (AREA)
  • Photoreceptors In Electrophotography (AREA)

Abstract

PURPOSE:To reduce the production of powder and to enable the accumulation of a uniform film even in a large area by executing in gas pressure which is specific for ion average free step in a vessel in the width of a sheath when radical-forming a raw gas to accumulate it on a substrate. CONSTITUTION:Gas containing hydrogen as exciting gas is supplied from an exciting gas supply port 13 to an ion source. Magnets 15 are disposed on the back and side surfaces of a plasma source 14 to form a cusp magnetic field 15a. An AC voltage is applied between a filament 16 and anode (wall) 17 to discharge, thereby generating a plasma. The plasma passes through a porous grid 18 to a reaction chamber 20 in which raw gas is supplied in advance from a raw gas inlet 19 to move by a dispersed magnetic field by an external magnetic field 21 to contact with raw gas (SiH4) to form a radical. Since a negative bias is applied to a substrate 22 in the chamber, cation in the plasma is accelerated to the substrate 22. A sheath of width SiS formed between the substrate 22 and the plasma is accumulated under the gas pressure of SiS<lambda with respect to the average free stroke lambda of the ion.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はシリコン、ゲルマニュームなどの局在化状態密
度を減少せしめる補償元素を含む非晶質半導体膜を形成
する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming an amorphous semiconductor film containing a compensating element, such as silicon or germanium, which reduces the density of localized states.

従来の技術 太陽電池、電子写真感光体などの非晶質シリコン、非晶
質ゲルマニュームなどの非晶質半導体膜の形成には、従
来比較的低温で薄膜が形WできるプラズマCVD法が最
もよく使用されている。この方法は、例えば非晶質シリ
コン膜を形成する場合、原料ガスとして5iH4(シラ
ンガス)あるいはS I H4とH2の混合ガスを使用
し、基板温度を200〜350℃に、またガス圧力を0
.1〜1゜Torrに制御しながら電極と対向した基板
間に高周波電力を印加してプラズマを発生させ、シラン
ガスを分解して基板上に膜を形成する方法である。
Conventional technology For forming amorphous semiconductor films such as amorphous silicon and amorphous germanium for solar cells, electrophotographic photoreceptors, etc., the plasma CVD method, which can form thin films at relatively low temperatures, is most commonly used. has been done. For example, when forming an amorphous silicon film, this method uses 5iH4 (silane gas) or a mixed gas of S I H4 and H2 as a raw material gas, and sets the substrate temperature to 200 to 350°C and the gas pressure to 0.
.. In this method, high frequency power is applied between an electrode and a substrate facing each other under control at 1 to 1 Torr to generate plasma, decompose silane gas, and form a film on the substrate.

この場合、堆積速度は約3μm/h  と遅く、約20
μm以上を要する電子写真感光体を製作する場合には6
時間以上を必要とし、迅速な量産が困難である。また、
堆積速度を上げるために高周波電力を増加すると、原料
ガス中で気相反応により粉体状のシリコンが大量に発生
し、製造装置の排気系にめずまりを起こし量産上大きな
問題であった。
In this case, the deposition rate is slow at about 3 μm/h and about 20 μm/h.
When manufacturing an electrophotographic photoreceptor that requires a diameter of μm or more, 6
It requires more time and is difficult to mass produce quickly. Also,
When high-frequency power is increased to increase the deposition rate, a large amount of powdered silicon is generated in the raw material gas due to a gas phase reaction, which clogs the exhaust system of the manufacturing equipment, posing a major problem in mass production.

上記のプラズマCVD装置の持つ問題点を解決する手段
として提案されたのが、電子サイクロトロン共鳴(EC
R)を用いたプラズマCVD装置である。(特開昭56
−155535号公報、特開昭59−169187号公
報) 第2図にこの装置の基本構成を示す。1はプラズマ生成
室、2は膜形成室であり、プラズマ生成室1にはマグネ
トロン電源から導波管3が導波用窓4で接続されておシ
、その外周には磁気コイル5が設置しである。また、膜
形成室2の外周は水冷バイブロで冷却されている。プラ
ズマ生成室1には第1ガス導入ロアよりプラズマ励起用
ガスを導入し、マイクロ波によシプラズマ生成室内1に
プラズマを励起し、更に磁場を印加することによtyラ
ズマ中に電子サイクロトロン共鳴を起こし、拡散磁界に
よりプラズマを導入口8より膜形成室2に配置された基
板ホルダー9上の基板1oに導く。膜形成室2に第2ガ
ス導入口11,11Aより原料ガスを導入しプラズマと
接触させ、原料ガス12を分解し膜を堆積させる。
Electron cyclotron resonance (EC) was proposed as a means to solve the problems of the plasma CVD equipment mentioned above.
This is a plasma CVD apparatus using R). (Unexamined Japanese Patent Publication No. 56
(Japanese Patent Laid-Open No. 59-169187) FIG. 2 shows the basic configuration of this device. 1 is a plasma generation chamber, 2 is a film formation chamber, and a waveguide 3 from a magnetron power source is connected to the plasma generation chamber 1 through a waveguide window 4, and a magnetic coil 5 is installed around the outer circumference of the waveguide 3. It is. Further, the outer periphery of the film forming chamber 2 is cooled by a water-cooled vibro. A plasma excitation gas is introduced into the plasma generation chamber 1 from the first gas introduction lower, plasma is excited in the plasma generation chamber 1 by microwaves, and electron cyclotron resonance is generated in the plasma by applying a magnetic field. Then, the plasma is guided by a diffused magnetic field from the inlet 8 to the substrate 1o on the substrate holder 9 disposed in the film forming chamber 2. A raw material gas is introduced into the film forming chamber 2 through the second gas introduction ports 11 and 11A and brought into contact with plasma to decompose the raw material gas 12 and deposit a film.

でも放電の持続が可能になっておシ、更に膜形成に利用
されるエネルギーは基板1oに入射するイオンの有する
エネルギーで与えられ、膜表面のイオンの衝突が膜をち
みつにするため基板温度を室温に設定している場合にお
いても良質な膜が得られる。この方法によシ半導体プロ
セス用として良質なS I N −S i 02などの
絶縁層、またはSiを低温で形成できることが示されて
いる。これは、ごく表面のみがイオンエネルギーによっ
て高温に上昇し5i−Hの結合を立ち切ることによると
考えられている。
However, it has become possible to sustain the discharge, and the energy used for film formation is given by the energy of the ions incident on the substrate 1o, and the collision of ions on the film surface turns the film into honey, which increases the substrate temperature. A high-quality film can be obtained even when the temperature is set at room temperature. It has been shown that this method can form a high-quality insulating layer such as SIN-Si02 or Si for semiconductor processing at a low temperature. This is thought to be due to the fact that only the very surface is raised to a high temperature by ion energy and the 5i-H bond is terminated.

発明が解決しようとする問題点 上記のようなECR1用いたCVD法は低温で高速に膜
堆積ができる半面、マイクロ波と磁界を用いることから
大面積にわたって均一な膜形成には不向きである。また
、CVD法の欠点であったシリコン粉体の発生について
はまだまだ未知の状態である。
Problems to be Solved by the Invention Although the CVD method using ECR1 as described above can deposit a film at low temperature and at high speed, it is not suitable for forming a uniform film over a large area because it uses microwaves and a magnetic field. Furthermore, the generation of silicon powder, which was a drawback of the CVD method, is still unknown.

また、イオンの入射により局在化状態密度を減少せしめ
る1価補償元素である水素を含む非晶質半導体膜が形成
できるかについての未知の状態である。
Furthermore, it is unknown whether an amorphous semiconductor film containing hydrogen, which is a monovalent compensating element, and which reduces the localized density of states upon ion injection can be formed.

本発明は粉体の発生量少く、また大面積においても均一
な膜堆積が可能な非晶質半導体膜の堆積方法の実現を目
的とする。
An object of the present invention is to realize a method for depositing an amorphous semiconductor film that generates a small amount of powder and can deposit a uniform film even over a large area.

また、励起ガスに水素などの1価元素をもちい、イオン
の入射により局在化状態密度を減少せしめる1価補償元
素である水素を含む非晶質半導体膜が形成できる膜の堆
積方法全実現することを目的とする。
In addition, we will use a monovalent element such as hydrogen as an excitation gas to realize a full film deposition method that can form an amorphous semiconductor film containing hydrogen, which is a monovalent compensating element that reduces the localized density of states upon ion incidence. The purpose is to

問題点を解決するための手段 被着される基板が配置された容器内を減圧し、被着膜原
材料であるガス化された分子を前記容器内に導入し前記
基板上に堆積する非晶質膜の形成方法であって、電気的
放電を用いてガスを前励起しイオンを含む励起されたガ
スを前記容器内に導入された前記原材料ガスと接触させ
、その原材料ガスをラジカル化し前記基板上に堆積する
工程を含み、その工程は、前記基板と、前記イオン及び
ラジカルを含むプラズマとの間に形成されるシースの幅
(以下5illと記す)が容器内のイオンの平均自由行
程(λ)に対し、5ill<λとなるガス圧にて実施さ
れる。
Means for Solving the Problems The pressure inside the container in which the substrate to be deposited is placed is reduced, and gasified molecules, which are the raw materials for the deposited film, are introduced into the container and the amorphous molecules deposited on the substrate are introduced into the container. A method for forming a film, the method comprising pre-exciting a gas using electrical discharge, bringing the excited gas containing ions into contact with the raw material gas introduced into the container, converting the raw material gas into radicals, and depositing the excited gas on the substrate. The width of the sheath (hereinafter referred to as 5ill) formed between the substrate and the plasma containing the ions and radicals is equal to the mean free path (λ) of the ions in the container. The test is carried out at a gas pressure such that 5ill<λ.

作  用 電気的放電によって励起されイオン化された前励起ガス
は基板が、設置された容器内に導入される。
A pre-excited gas, excited and ionized by the working electrical discharge, is introduced into the container in which the substrate is placed.

この時イオンは電子をひきつれ原材料ガスと接触し多量
のラジカルを生成する。このラジカルは基板表面まで拡
散し基板上の膜材料と反応し堆積する。
At this time, the ions attract electrons and come into contact with the raw material gas, producing a large amount of radicals. These radicals diffuse to the substrate surface, react with the film material on the substrate, and are deposited.

また、イオンの寿命は比較的短くプラズマの存在しない
シース内に存在する中性分子との衝突により基板に付着
する前にエネルギーを失う。このため、多量に発生した
イオンも基板に到達する量は極〈少なく堆積速度を遅く
している原因と考えられる。またこの際、気相において
イオン、ラジカルどうしの衝突によシ多量の気相反応が
誘起され半導体材料のポリマーが発生し、反応容器内に
粉体を付着させる。この考えを基にシースの幅が小さく
なるようガス圧を制御する事によシ堆積速度を著しく向
上する事ができ、また反応容器内の粉体の発生を著しく
減少させることが出来た。また、励起ガスとして水素を
含むガスを用いることによって、局在化状態密度を減少
させる事ができる半導体膜を形成することができた。
In addition, the ions have a relatively short lifetime and lose energy before adhering to the substrate due to collisions with neutral molecules present in the sheath where no plasma exists. Therefore, even if a large amount of ions are generated, the amount reaching the substrate is extremely small, which is considered to be the reason for slowing down the deposition rate. At this time, a large amount of gas phase reaction is induced due to collisions between ions and radicals in the gas phase, and a polymer of the semiconductor material is generated, which causes powder to adhere to the inside of the reaction container. Based on this idea, by controlling the gas pressure to reduce the width of the sheath, it was possible to significantly improve the deposition rate and to significantly reduce the generation of powder in the reaction vessel. Furthermore, by using a gas containing hydrogen as the excitation gas, it was possible to form a semiconductor film in which the density of localized states could be reduced.

実施例 以下、図面をもって本発明の実施例について述べる。Example Embodiments of the present invention will be described below with reference to the drawings.

〔実施例1〕 第1図に本発明に用いたイオン源を示す。イオン源には
励起ガスとして水素を含むガスを励起ガス導入口13よ
り導入する。プラズマソース14の背面と側面には磁石
トロ1r:配し、カスブ磁界16aを作るようになって
いる。最大磁場の強さは約2・3KGで、プラズマソー
ス14の内側では1KG、壁から約401内側では20
Gである。プラズマはフィラメント16と陽極(壁)1
7との間に120V〜260vの交流電圧を印加し放電
によ多発生する。カスブ磁界15aにより電子のとじ込
め時間が長くなるため10〜10Torτでも安定に放
電する。このように発生したプラズマは多孔グリッド1
8を通って、あらかじめ原料ガス導入口19から原料ガ
スが導入されている反応室20に、外部磁界21による
拡散磁界により導かれて移動し、原料ガス(SiH4)
と接触しラジカル化する。
[Example 1] FIG. 1 shows an ion source used in the present invention. A gas containing hydrogen as an excitation gas is introduced into the ion source through an excitation gas inlet 13. Magnets 1r are arranged on the back and side surfaces of the plasma source 14 to create a cusp magnetic field 16a. The maximum magnetic field strength is approximately 2.3 KG, 1 KG inside the plasma source 14, and 20 KG inside the plasma source 14.
It is G. Plasma consists of filament 16 and anode (wall) 1
An alternating current voltage of 120 V to 260 V is applied between the 7 and 7, and a large amount of discharge occurs. Since the electron confinement time becomes longer due to the cusp magnetic field 15a, stable discharge is achieved even at 10 to 10 Torr. The plasma generated in this way flows through the porous grid 1
8, the raw material gas (SiH4) is guided by the diffusion magnetic field of the external magnetic field 21, and moves to the reaction chamber 20 into which the raw material gas has been previously introduced from the raw material gas inlet 19.
It comes into contact with and becomes radical.

反応室では基板22との間に負バイアス2oVが印加さ
れているためプラズマ中の陽イオンは基板22に加速さ
れる。この時反応室20の圧力は、原料ガス5X10 
〜5X10  Torrにポンプ23によって排気、制
御されている。また多孔グリッド18から基板22tで
の距離は約16CI11に設定されている。この時導入
されたイオンの平均自由行程はプラズマのイオン化率が
数チなのでこのイオ7 シー ス(D幅はLangmu
i r −Chi ldの式からイオンの飽和電流(I
  )に対し1−f/2 に比o        O 例し負バイアス電圧(Vf)に対しv5/lに比例する
。5 X 10−’ Torrでは、工。=30mA/
′crl。
Since a negative bias of 2 oV is applied between the reaction chamber and the substrate 22, positive ions in the plasma are accelerated toward the substrate 22. At this time, the pressure in the reaction chamber 20 is 5×10
It is evacuated and controlled by a pump 23 to ~5X10 Torr. Further, the distance from the porous grid 18 to the substrate 22t is set to about 16 CI11. Since the ionization rate of the plasma is several inches, the mean free path of the ions introduced at this time is
From the equation of i r -Child, the ion saturation current (I
) is proportional to 1-f/2. For example, the negative bias voltage (Vf) is proportional to v5/l. At 5 x 10-' Torr. =30mA/
'crl.

vi=−20vの時イオンシース幅は0.2+llff
1程度である。しかし、5X10  Torrではイオ
ンの飽和電流工。= 1 mA/CIlでイオンシース
幅は1M程度となる。このような状態にて基板上に堆積
した非晶質シリコン膜の暗導電率、光導電率(646n
m光で1.4μW/Ciり、水素含有量を赤外吸収の吸
光度からもとめた。基板は室温からヒータ24により3
60°Cまで制御したが基板温度の依存性は少ない。
When vi=-20v, the ion sheath width is 0.2+llff
It is about 1. However, at 5X10 Torr, the saturation current of ions is low. = 1 mA/CIl, the ion sheath width is about 1M. The dark conductivity and photoconductivity (646n) of the amorphous silicon film deposited on the substrate in this state are
The hydrogen content was determined from the infrared absorbance using m light at 1.4 μW/Ci. The substrate is heated from room temperature to 3 by the heater 24.
Although controlled up to 60°C, there is little dependence on substrate temperature.

またこの時の堆積速度は2o11m/hと非常に早いこ
とが確認された。
It was also confirmed that the deposition rate at this time was extremely fast at 2 o 11 m/h.

第3図に暗導電率と光導電率の結果を示す。図中a1a
 、 31bはそれぞれ原料ガスと励起ガスにSiH4
とH2をもちい、それぞれの流量がSiH4/H2の比
が67% 、32a 、32bは流量の比が34チの条
件で、31b、32bは暗導電率、31a、32aは光
導電率を示す。イオンシースの幅とイオンの平均自由行
程とが等しくなる5X10  Torr付近で光導電率
が暗導電率と等しく光感度がない半導体材料としては膜
質の悪い膜となる。また、第4図には5 X 10−’
 Torrでの原料ガスと励起ガスの流量の比によって
非晶質シリコン膜に含まれる水素量は制御できることを
示す。41は励起ガスに水素f:、100%、42は励
起ガスにHe / H2=O−24とした場合について
示したもので、それぞれ40〜14atm%。
FIG. 3 shows the results of dark conductivity and photoconductivity. a1a in the figure
, 31b contains SiH4 as source gas and excitation gas, respectively.
and H2, and the flow rate of each is 67%, and 32a and 32b have a flow rate ratio of 34%. 31b and 32b show dark conductivity, and 31a and 32a show photoconductivity. At around 5×10 Torr, where the width of the ion sheath is equal to the mean free path of the ions, the photoconductivity is equal to the dark conductivity, resulting in a film of poor quality for a semiconductor material with no photosensitivity. Also, in Fig. 4, 5 x 10-'
This shows that the amount of hydrogen contained in the amorphous silicon film can be controlled by the ratio of the flow rates of source gas and excitation gas at Torr. 41 shows the case where the excitation gas is hydrogen f: 100%, and 42 shows the case where the excitation gas is He/H2=O-24, each being 40 to 14 atm%.

20〜5atm%まで制御できる事が分かった。It was found that it was possible to control up to 20 to 5 atm%.

また、このような堆積条件では通常のプラズマCVD法
と明らかに異なり、堆積容器内のシリコン粉体の発生量
が著しく少なく、電子写真感光体に必要な20μm以上
の膜厚に堆積しても粉体の発生が極めて少ないため装置
の保守に必要だった時間が不用になり生産性が著しく向
上することができた。
In addition, under such deposition conditions, the amount of silicon powder generated in the deposition container is clearly different from that of normal plasma CVD, and even if the film is deposited to a thickness of 20 μm or more, which is required for electrophotographic photoreceptors, the amount of silicon powder generated in the deposition container is extremely small. Since the occurrence of body damage is extremely small, the time required for equipment maintenance is no longer needed, and productivity is significantly improved.

また、原料ガスとしてSiH4を用いたが、他の5tF
4,5ick4,5t2H6,5t2F6,5tH2F
2゜SiHF、5IHC13などのシリコン系ガスのほ
かにGeH4,GeF4. GaN2F2. Go2F
6. GeH3F。
In addition, although SiH4 was used as the raw material gas, other 5tF
4,5ick4,5t2H6,5t2F6,5tH2F
In addition to silicon-based gases such as 2°SiHF and 5IHC13, GeH4, GeF4. GaN2F2. Go2F
6. GeH3F.

G e HF sなどのゲルマニューム系ガスを用いて
非晶質ゲルマニューム、あるいは非晶質シリコン、ゲル
マニューム半導体膜を形成することもできる。
It is also possible to form an amorphous germanium, amorphous silicon, or germanium semiconductor film using a germanium-based gas such as G e HF s.

〔実施例2〕 ・ 次に、第1図の装置を用いて堆積容器内にドーピングガ
スとしてB2H6を添加した場合について述べる。
[Example 2] Next, a case will be described in which B2H6 is added as a doping gas into the deposition container using the apparatus shown in FIG.

第6図に5 X 10−’ Tor r 、 S iH
4/ N2が34チでB2H6の量を変化させて第3図
と同様に暗導電率61bと光導電率51aを測定した。
In Figure 6, 5 x 10-' Torr, SiH
4/ The dark conductivity 61b and the photoconductivity 51a were measured in the same manner as in FIG. 3 by changing the amount of B2H6 at 34 N2.

一方、5 X 10”−2Torrでは52b、52a
に示すように感度が低く、またシリコン粉体の発生量も
著しく増加してくる。
On the other hand, 52b, 52a for 5 x 10"-2 Torr
As shown in Figure 2, the sensitivity is low and the amount of silicon powder generated increases significantly.

励起ガスとしてHガス、H、Heの混合ガスを用いたが
、Hガスに希ガス例えばAr 、 No 、 Xeなど
を混合し用いても同じような結果が得られる。
Although a mixed gas of H gas, H, and He was used as the excitation gas, similar results can be obtained by using a mixture of H gas and a rare gas such as Ar, No, or Xe.

ドーピング材料としてはB以外にもP、As。In addition to B, other doping materials include P and As.

Gaなどのガス化可能な材料はすべて適応出来ることは
明らかである。
It is clear that any material that can be gasified, such as Ga, is suitable.

発明の効果 以上述べたように、本発明によると、極めて早い堆積速
度でしかも反応容器内にほとんど粉体を発生させずに非
晶質半導体膜を堆積することができた。さらに半導体膜
には局在化状態密度を減少せしめる1価元素を励起ガス
に用いることにより価電子制御が可能な非晶質半導体膜
が容易に得られることができる。
Effects of the Invention As described above, according to the present invention, an amorphous semiconductor film could be deposited at an extremely high deposition rate and with almost no powder generated in the reaction vessel. Furthermore, an amorphous semiconductor film in which valence electrons can be controlled can be easily obtained by using a monovalent element that reduces the localized state density as an excitation gas in the semiconductor film.

これによシ、電子写真感光体、太陽電池などの非晶質半
導体膜をもちいた機能デバイスは従来のCVD法に比較
して更に安価に、容易に製造できる。
As a result, functional devices using amorphous semiconductor films, such as electrophotographic photoreceptors and solar cells, can be manufactured more cheaply and easily than with conventional CVD methods.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に用いる堆積装置の一実施例
を示す断面図、第2図は従来のECRプラズマCVD装
置の例を示す断面図、第3図は本発明に係わる非晶質半
導体膜の暗導電率、光導電率を示すグラフ、第4図は膜
中の水素濃度を測定13・・・・・・ガス導入口、14
・・・・・・プラズマソース、16・・・・・・磁石、
16・・・・・・フィラメント、17・・・・・・陽極
、18・・・・・・多孔グリッド、19・・・・・・原
料ガス導入口、2o・・・・・・反応室、21・・・・
・・外部磁界、22・・・・・・基板。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第3
図 第4図 StH?/ N2 s、を量比(’/−)鵬   8 区ミ q 憾
FIG. 1 is a sectional view showing an example of a deposition apparatus used in an embodiment of the present invention, FIG. 2 is a sectional view showing an example of a conventional ECR plasma CVD apparatus, and FIG. 3 is a sectional view showing an example of a conventional ECR plasma CVD apparatus. Graph showing the dark conductivity and photoconductivity of a quality semiconductor film, Figure 4 shows the measurement of the hydrogen concentration in the film 13...Gas inlet, 14
...Plasma source, 16...Magnet,
16...Filament, 17...Anode, 18...Porous grid, 19...Source gas inlet, 2o...Reaction chamber, 21...
...External magnetic field, 22...Substrate. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 3
Figure 4 StH? / N2 s, the quantity ratio ('/-) Peng 8 ward miq 憾

Claims (3)

【特許請求の範囲】[Claims] (1)被着される基板が配置された容器内を減圧し、被
着膜原材料であるガス化された分子を前記容器内に導入
し前記基板上に堆積する非晶質半導体膜の形成方法であ
って、前記容器に隣接した空間で電気的放電を用いて励
起ガスを前励起し、イオンを含む励起されたガスを、前
記容器内に導入された前記原材料ガスと接触させ、前記
原材料ガスをラジカル化し基板上に堆積する工程を含み
、前記基板と、前記イオン及びラジカルを含むプラズマ
との間に形成されるシースの幅(Si_Sと記す)が前
記容器内の前記イオンの平均自由行程(λ)に対し、S
i_S<λとなるガス圧にて堆積を実施する事を特徴と
する非晶質半導体膜の形成方法。
(1) A method for forming an amorphous semiconductor film in which the pressure inside a container in which a substrate to be deposited is placed is reduced, gasified molecules, which are raw materials for the deposited film, are introduced into the container and deposited on the substrate. pre-exciting an excited gas using an electrical discharge in a space adjacent to the container, bringing the excited gas containing ions into contact with the raw material gas introduced into the container, and The width of the sheath (denoted as Si_S) formed between the substrate and the plasma containing the ions and radicals is determined by the mean free path (Si_S) of the ions in the container. λ), S
A method for forming an amorphous semiconductor film, characterized in that deposition is performed at a gas pressure such that i_S<λ.
(2)原材料ガスにシリコンを含むガスを用い、また励
起ガスとして水素を含むガスを用い、水素を含む非晶質
シリコン膜を堆積する特許請求の範囲第1項記載の非晶
質半導体膜の形成方法。
(2) An amorphous semiconductor film according to claim 1, wherein an amorphous silicon film containing hydrogen is deposited by using a gas containing silicon as a raw material gas and using a gas containing hydrogen as an excitation gas. Formation method.
(3)基板が配置された容器内の圧力を5×10^−^
2以下とすることを特徴とする特許請求の範囲第2項記
載の非晶質半導体膜の形成方法。
(3) Reduce the pressure inside the container where the substrate is placed to 5 x 10^-^
3. The method for forming an amorphous semiconductor film according to claim 2, characterized in that the number is 2 or less.
JP60125305A 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film Expired - Lifetime JPH0654754B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60125305A JPH0654754B2 (en) 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60125305A JPH0654754B2 (en) 1985-06-10 1985-06-10 Method for forming amorphous semiconductor film

Publications (2)

Publication Number Publication Date
JPS61283112A true JPS61283112A (en) 1986-12-13
JPH0654754B2 JPH0654754B2 (en) 1994-07-20

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63152115A (en) * 1986-12-17 1988-06-24 Hitachi Ltd Formation of silicon amorphous film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63152115A (en) * 1986-12-17 1988-06-24 Hitachi Ltd Formation of silicon amorphous film

Also Published As

Publication number Publication date
JPH0654754B2 (en) 1994-07-20

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