JPH0653628A - Circuit board provided with surface mounting element - Google Patents
Circuit board provided with surface mounting elementInfo
- Publication number
- JPH0653628A JPH0653628A JP4282051A JP28205192A JPH0653628A JP H0653628 A JPH0653628 A JP H0653628A JP 4282051 A JP4282051 A JP 4282051A JP 28205192 A JP28205192 A JP 28205192A JP H0653628 A JPH0653628 A JP H0653628A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- surface mount
- sop
- mount element
- connecting lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は印刷回路基板等の回路基
板に半導体集積回路装置の封止体の一種であるＳＯＰ
（Ｓｍａｌｌ Ｏｕｔｌｉｎｅ Ｐａｃｋａｇｅ）、Ｊ
ＳＯＰ（Ｓｍａｌｌ Ｏｕｔｌｉｎｅ Ｊ−ｌｅａｄｅ
ｄ Ｐａｃｋａｇｅ）等の表面実装素子を取り付けた回
路基板に関し、とくに特に表面実装素子を回路基板に積
層状に実装することにより、与えられた回路基板面積を
最大限に活用して実装密度及びメモリーなどの表面実装
素子の取り付け個数を増加させ得る表面実装素子を取り
付けた回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a SOP which is a kind of sealing body for a semiconductor integrated circuit device on a circuit board such as a printed circuit board.
(Small Outlet Package), J
SOP (Small Outline J-lead)
d package) and the like, in particular, by mounting the surface mount elements on the circuit board in a laminated manner, in particular, by maximizing the given circuit board area, the mounting density and memory etc. The present invention relates to a circuit board having surface-mounted elements mounted thereon, which can increase the number of mounted surface-mounted elements.
【０００２】[0002]
【従来の技術】印刷基板等の回路基板に、半導体装置等
を実装する方法には、回路基板に形成したスルーホール
（ｔｈｒｏｕｇｈ ｈｏｌｅ）に半導体装置の接続用リ
ードを差し込む方法ピン挿入型と、表面実装素子を回路
基板に形成した配線部の面上に接続用リードを接合する
表面実装型の二つがある。ピン挿入型に適した半導体装
置等のパッケージには、ＤＩＰ（Ｄｕａｌ Ｉｎｌｉｎ
ｅ Ｐａｃｋａｇｅ）、ＺＩＰ（Ｚｉｇｚａｇ Ｉｎｌ
ｉｎｅ Ｐａｃｋａｇｅ）等がある。一方、表面実装型
に使用するパッケージには、ＳＯＰ（Ｓｍａｌｌ Ｏｕ
ｔｌｉｎｅ Ｐａｃｋａｇｅ）、ＳＯＰのガールウィン
グ型の接続用リードをＪ型としたＳＯＪ（Ｓｍａｌｌ
Ｏｕｔｌｉｎｅ Ｊ−ｌｅａｄｅｄ Ｐａｃｋａｇｅ）
さらにそれらを小型化したＴＳＯＰ（Ｔｈｉｎ ＳＯ
Ｐ）等がある。2. Description of the Related Art A method of mounting a semiconductor device or the like on a circuit board such as a printed circuit board is to insert a connecting lead of the semiconductor device into a through hole formed in the circuit board. There are two types of surface mount type in which a connecting lead is joined on the surface of a wiring part where a mounting element is formed on a circuit board. DIP (Dual Inlin) is suitable for packages such as semiconductor devices suitable for pin insertion type.
e Package), ZIP (Zigzag Inl)
in package) etc. On the other hand, the SOP (Small Ou
SOJ (Small) which uses J-type lead for the girl wing of SOP
Outlook J-leaded Package)
Furthermore, TSOP (Thin SO
P) etc.
【０００３】表面実装型の従来の回路基板の実装構造を
図３（Ａ）および（Ｂ）に示す。A conventional surface mount type circuit board mounting structure is shown in FIGS. 3 (A) and 3 (B).
【０００４】図３（Ａ）は、回路基板１上のＳＯＰ（Ｓ
ｍａｌｌ Ｏｕｔｌｉｎｅ Ｐａｃｋａｇｅ）２を、ガ
ールウィング型の接続用リード２ａを基板面に向けて載
置し接続用リードの端部２ｂを回路基板のはんだ面３に
おいて接続している。図３（Ｂ）は、接続用リードをＪ
型としたＳＯＪ（Ｓｍａｌｌ Ｏｕｔｌｉｎｅ Ｊ−ｌ
ｅａｄｅｄ Ｐａｃｋａｇｅ）の取り付けを説明したも
のである。回路基板１１上にＳＯＪ１２を載置して、Ｊ
型接続用リード１２ａの肩部１２ｂにおいて回路基板の
配線のはんだ面１３と接続している。FIG. 3A shows the SOP (S
The small outer package 2 is mounted with the girl wing type connecting leads 2a facing the board surface, and the ends 2b of the connecting leads are connected to the solder surface 3 of the circuit board. In FIG. 3 (B), the connecting lead is J
SOJ (Small Outline J-1)
This is a description of attachment of an eaded package). Place the SOJ 12 on the circuit board 11
The shoulder 12b of the mold connecting lead 12a is connected to the solder surface 13 of the wiring of the circuit board.
【０００５】これらの回路基板にガールウィング形ＳＯ
ＰやＪ字形ＳＯＰの実装は以下のようにして行う。ま
ず、電気的配線を形成した回路基板に、各々のＳＯＰ、
Ｊ字形ＳＯＰの接続用リードの形態に適合するようには
んだパターンを形成し、はんだパターン部にＳＯＰ又は
Ｊ字形ＳＯＰの接続用リードの端部もしくは肩部を接触
せしめた状態で、当接した部位をＶＰＳ（ベイパーフェ
ーズソルダリング）などの高温蒸気による加熱、あるい
は赤外線照射による加熱よる方法等ではんだ付けする。
ＶＰＳによる方法では２１５℃程度の温度を有する蒸気
によってはんだ付けを行っており、赤外線照射では２６
０℃程度の温度ではんだ付けを行っている。The girl wing type SO is mounted on these circuit boards.
The P and J-shaped SOPs are mounted as follows. First, on the circuit board on which electrical wiring is formed, each SOP,
A portion where a solder pattern is formed so as to conform to the shape of the connecting lead of the J-shaped SOP, and the end or shoulder of the SOP or the connecting lead of the J-shaped SOP is in contact with the solder pattern portion. Is soldered by a method such as heating with high temperature steam such as VPS (vapor phase soldering) or heating with infrared irradiation.
In the method using VPS, soldering is performed with steam having a temperature of about 215 ° C.
Soldering is performed at a temperature of about 0 ° C.
【０００６】[0006]
【発明が解決しようとする課題】ＳＯＰ等の表面実装素
子は、単純な平面構造を有する回路基板上に実装される
ので、回路基板上の実装面積によって制限される。例え
ば、表面実装素子がメモリである場合には、メモリ取り
付け個数を一定の限度以内に制限して実装するしかなか
ったのである。A surface mount device such as an SOP is mounted on a circuit board having a simple planar structure, and is therefore limited by the mounting area on the circuit board. For example, when the surface mount device is a memory, the number of memory mounts must be limited to a certain limit before mounting.
【０００７】本発明はこのような従来の問題点に鑑みて
なされたものであり、本発明の目的は、回路基板の構造
を変更させて表面実装素子の実装密度及びメモリ取り付
け個数を増加させ得る表面実装素子を取り付けた回路基
板を提供することにある。The present invention has been made in view of such conventional problems, and an object of the present invention is to change the structure of a circuit board to increase the mounting density of surface mount devices and the number of memory mounts. It is to provide a circuit board to which a surface mount element is attached.
【０００８】[0008]
【課題を解決するための手段】本発明は、表面実装素子
を取り付けた回路基板において、表面実装素子が、回路
基板に形成した凹部に設けられているとともに、凹部に
設けられた表面実装素子の上部に少なくとも１個の表面
実装素子が設けられており、表面実装素子の接続用リー
ドが回路基板の配線部もしくは他の表面実装素子の接続
用リードとが接続されていることを特徴とする表面実装
素子を取り付けた回路基板であり、ＳＯＰ等の表面実装
素子を回路基板に形成した凹部に配置するとともに、凹
部に配置した表面実装素子上にさらに表面実装素子を二
層以上に配置するものであり、また回路基板の凹部の間
の回路基板の平坦面にも、表面実装素子を取り付けるて
凹部に設けた表面実装素子の接続用リードと回路基板の
配線部とを同一箇所において接続するものである。According to the present invention, in a circuit board to which a surface mount element is attached, the surface mount element is provided in a recess formed in the circuit board and the surface mount element is provided in the recess. A surface characterized in that at least one surface mount element is provided on the upper part, and the connecting lead of the surface mount element is connected to the wiring part of the circuit board or the connecting lead of another surface mount element. A circuit board on which mounting elements are attached, in which surface mounting elements such as SOP are arranged in a recess formed in the circuit board, and surface mounting elements are further arranged in two or more layers on the surface mounting element arranged in the recess. Also, on the flat surface of the circuit board between the recesses of the circuit board, the connection lead of the surface mount element provided in the recess by mounting the surface mount element and the wiring part of the circuit board are the same. It is intended to be connected in.
【０００９】[0009]
【作用】本発明の表面実装素子を取り付けた回路基板
は、回路基板面に形成した凹部に表面実装素子を配置
し、さらに表面実装素子上に他の素子を配置したので、
回路基板上に二層以上の表面実装素子の配置を可能と
し、さらに表面実装素子を配置する凹部の間の平坦部に
配置した表面実装素子の接続用リードと凹部に配置した
表面実装素子の接続用リードとを同一の箇所において接
続するようにしたので、表面実装素子の実装密度を高め
ることができる。In the circuit board to which the surface mount element of the present invention is attached, the surface mount element is arranged in the concave portion formed on the surface of the circuit board, and further other elements are arranged on the surface mount element.
Enables the placement of two or more layers of surface mount elements on the circuit board, and further connects the surface mount element's connection lead placed in the flat part between the recesses where the surface mount element is placed and the surface mount element placed in the recess Since the lead for the connection is connected at the same place, the mounting density of the surface mount element can be increased.
【００１０】[0010]
【実施例】以下、本発明の一実施例を図面を参照して詳
細に説明する。図１は、ガールウィング型ＳＯＰを例に
挙げて表面実装素子の実装方法を説明する図である。図
１（Ａ）のように、回路基板１に凹部５を形成し、接続
用リード４ａを上面に向けてガールウィング型ＳＯＰ４
を凹部５に配置し、接続用リード４ａの端部４ｂを回路
基板１の接続部５ａに形成したはんだ面６に当接してＶ
ＰＳ、赤外線加熱等の方法によってはんだ接合を行う。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a diagram for explaining a mounting method of a surface mount element by taking a Girl Wing SOP as an example. As shown in FIG. 1A, the recess 5 is formed in the circuit board 1 and the connection leads 4a are directed to the upper surface so that the girl wing SOP4 is formed.
Is placed in the concave portion 5 and the end 4b of the connecting lead 4a is brought into contact with the solder surface 6 formed on the connecting portion 5a of the circuit board 1 so that V
Solder joining is performed by a method such as PS or infrared heating.
【００１１】次いで、図１（Ｂ）に示すように、下部の
ＳＯＰ４の上に、接続用リードを下側にしたＳＯＰ２を
配置し、上部のＳＯＰの接続用リード２ａの端部２ｂを
下部のＳＯＰ４の接続用リード４ａの端部４ｂとをはん
だによって接合する。さらに、隣接する凹部の間の基板
面にＳＯＰ７を配置して同様に接続用リード７ａの端部
７ｂを、凹部のＳＯＰの接続用リードの端部と回路基板
の配線部とをはんだによって接合する。以上のような方
法によって、数多くの表面実装素子を実装することがで
きる。Then, as shown in FIG. 1B, the SOP 2 with the connecting lead on the lower side is arranged on the lower SOP 4, and the end 2b of the connecting lead 2a of the upper SOP is placed on the lower part. The ends 4b of the connecting leads 4a of the SOP 4 are joined by solder. Further, the SOP 7 is arranged on the substrate surface between the adjacent concave portions, and similarly, the end portion 7b of the connecting lead 7a is joined to the end portion of the connecting lead of the SOP of the concave portion and the wiring portion of the circuit board by soldering. . A large number of surface mount devices can be mounted by the above method.
【００１２】また、図２はＪ字型のリードを有するＪ字
型ＳＯＰを例に挙げて表面実装素子の取り付け方法を説
明する図である。図２（Ａ）のように、凹部１５にＪ字
型ＳＯＰ１４を接続リードを上面にして配置し、接続用
リード１４ａの肩部１４ｂと凹部の壁面接続部１５ａも
しくは基板面から凹部へと延長した接続部のはんだ面１
６とをはんだによって接合する。次いで、図２（Ｂ）に
示すように、接続用リードを下面に向けたＪ字型ＳＯＰ
を、下層の上向きの接続用リード上に載置してはんだ接
合する。そして、凹部の間の平坦な基板面にも接続用リ
ードを下向きとしたＪ字型ＳＯＰ１７を配置して接続用
リード１７ａの肩部１７ｂを凹部に設けたＪ字型ＳＯＰ
と回路基板との接合部へはんだ接合する。FIG. 2 is a diagram for explaining a method of mounting the surface mount device by taking a J-shaped SOP having a J-shaped lead as an example. As shown in FIG. 2 (A), the J-shaped SOP 14 is arranged in the recess 15 with the connection lead as the upper surface, and extended from the shoulder 14b of the connection lead 14a and the wall surface connection 15a of the recess or the substrate surface to the recess. Solder surface 1 of connection part
6 and 6 are joined by solder. Then, as shown in FIG. 2 (B), a J-shaped SOP with the connecting leads facing the lower surface.
Is mounted on the lower connection lead for upward connection and soldered. The J-shaped SOP 17 with the connecting leads facing downward is also arranged on the flat substrate surface between the recesses, and the shoulders 17b of the connecting leads 17a are provided in the recesses.
Solder to the joint between the board and the circuit board.
【００１３】[0013]
【発明の効果】このように本発明の表面実装素子を取り
付けた回路基板によれば、回路基板上に形成した凹部へ
表面実装素子を取り付け、凹部の表面実装素子の上部に
はさらに表面実装素子を積層し、凹部の間の回路基板面
にも表面実装素子を取り付けることができるので、実装
密度を極めて大きくすることが可能となり、表面実装素
子としてメモリを取り付ける場合には、メモリの取り付
け個数を増加することが可能となる。As described above, according to the circuit board to which the surface mount element of the present invention is attached, the surface mount element is attached to the recess formed on the circuit board, and the surface mount element is further provided above the surface mount element in the recess. Since surface mounting elements can be mounted on the circuit board surface between the recesses by stacking, it is possible to increase the mounting density extremely. It is possible to increase.
【図１】本発明の１実施例を説明する図である。FIG. 1 is a diagram illustrating an embodiment of the present invention.
【図２】本発明の他の実施例を説明する図である。FIG. 2 is a diagram illustrating another embodiment of the present invention.
【図３】従来の表面実装素子の実装方法を説明する図で
ある。FIG. 3 is a diagram illustrating a conventional method of mounting a surface mount element.
１…回路基板、２…ＳＯＰ、２ａ…接続用リード、２ｂ
…端部、３…はんだ面４…ＳＯＰ、４ａ…接続用リー
ド、４ｂ…端部、５…凹部、６…はんだ面、７…ＳＯ
Ｐ、７ａ…接続用リード、７ｂ…端部、１１…回路基
板、１２…Ｊ字型ＳＯＰ、１２ａ…接続用リード、１２
ｂ…端部、１４…Ｊ字型ＳＯＰ、１４ａ…接続用リー
ド、１４ｂ…肩部、１５…凹部、１５ａ…壁面接続部、
１６ｂ…端部、１６…はんだ面、１７…Ｊ字型ＳＯＰ、
１７ａ…接続用リード、１７ｂ…肩部1 ... Circuit board, 2 ... SOP, 2a ... Connection lead, 2b
... ends, 3 ... solder surface 4 ... SOP, 4a ... connection leads, 4b ... ends, 5 ... recesses, 6 ... solder surface, 7 ... SO
P, 7a ... Connection lead, 7b ... End portion, 11 ... Circuit board, 12 ... J-shaped SOP, 12a ... Connection lead, 12
b ... end, 14 ... J-shaped SOP, 14a ... connection lead, 14b ... shoulder, 15 ... recess, 15a ... wall connection,
16b ... Edge, 16 ... Solder surface, 17 ... J-shaped SOP,
17a ... Connection lead, 17b ... Shoulder
Claims (5)
いて、表面実装素子が、回路基板に形成した凹部に設け
られているとともに、凹部に設けられた表面実装素子の
上部に少なくとも１個の表面実装素子が設けられてお
り、表面実装素子の接続用リードが、回路基板の配線部
もしくは他の表面実装素子の接続用リードとが接続され
ていることを特徴とする表面実装素子を取り付けた回路
基板。1. A circuit board to which a surface mount element is attached, wherein the surface mount element is provided in a recess formed in the circuit board, and at least one surface mount element is provided above the surface mount element provided in the recess. A circuit board on which a surface mounting element is attached, wherein the surface mounting element connecting lead is connected to a wiring portion of the circuit board or a connecting lead of another surface mounting element. .
厚さと同等もしくは裏面への貫通孔であることを特徴と
する請求項１記載の表面実装素子を取り付けた回路基
板。2. The circuit board to which the surface mount element is attached according to claim 1, wherein the recess provided in the circuit board is equal to the thickness of the surface mount element or is a through hole to the back surface.
Ｐであり、下部の表面実装素子の接続用リードが回路基
板の配線部と接続されており、下部のガールウィング形
ＳＯＰの接続用リードと上部のガールウィング形ＳＯＰ
の接続用リードの接続部が一致していることを特徴とす
る請求項１記載の表面実装素子を取り付けた回路基板。3. A surface mount device is a girl wing type SO.
P, the lower surface mounting element connecting lead is connected to the wiring portion of the circuit board, and the lower girl wing type SOP connecting lead and the upper girl wing type SOP are connected.
The circuit board to which the surface mount element according to claim 1 is attached, characterized in that the connection portions of the connection leads of are identical.
にも、表面実装素子を取り付けるとともに、凹部に設け
た表面実装素子の接続用リードと回路基板の配線部とを
同一箇所において接続することを特徴とする請求項１記
載の表面実装素子を取り付けた回路基板。4. The surface mounting element is attached to the flat surface of the circuit board between the concave portions of the circuit board, and the connecting leads of the surface mounting element provided in the concave portion and the wiring portion of the circuit board are connected at the same location. The circuit board to which the surface mount element according to claim 1 is attached.
が、Ｊ字形ＳＯＰであり、接続用リードが上側を向くと
ともに、回路基板の凹部の壁面に形成した配線部と接続
されており、該接続用リードには上部のＪ字形ＳＯＰの
接続用リードが接続されていることを特徴とする請求項
１記載の表面実装素子を取り付けた回路基板。5. The surface mount element provided in the recess of the circuit board is a J-shaped SOP, and the connecting lead faces upward and is connected to a wiring part formed on the wall surface of the recess of the circuit board. 2. The circuit board on which the surface mount element is mounted according to claim 1, wherein the connecting lead is connected to the upper connecting lead of the J-shaped SOP.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910024398A KR930015991A (en) | 1991-12-26 | 1991-12-26 | PCB mounting structure of surface mount small out-line package (SOP) |
| KR1991-24398 | 1991-12-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0653628A true JPH0653628A (en) | 1994-02-25 |
Family
ID=19326034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4282051A Pending JPH0653628A (en) | 1991-12-26 | 1992-10-20 | Circuit board provided with surface mounting element |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH0653628A (en) |
| KR (1) | KR930015991A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100593695B1 (en) * | 2005-12-08 | 2006-06-30 | (주)에이텍엔지니어링 건축사사무소 | Box structure for installing at housing development |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100542671B1 (en) * | 2000-07-27 | 2006-01-12 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and its manufacturing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6373694A (en) * | 1986-09-17 | 1988-04-04 | 三菱電機株式会社 | Electronic circuit board |
| JPH01278089A (en) * | 1988-04-28 | 1989-11-08 | Mitsubishi Electric Corp | Electronic circuit device |
| JPH0352498A (en) * | 1989-07-20 | 1991-03-06 | Matsushita Electric Ind Co Ltd | Speaker unit |
-
1991
- 1991-12-26 KR KR1019910024398A patent/KR930015991A/en not_active IP Right Cessation
-
1992
- 1992-10-20 JP JP4282051A patent/JPH0653628A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6373694A (en) * | 1986-09-17 | 1988-04-04 | 三菱電機株式会社 | Electronic circuit board |
| JPH01278089A (en) * | 1988-04-28 | 1989-11-08 | Mitsubishi Electric Corp | Electronic circuit device |
| JPH0352498A (en) * | 1989-07-20 | 1991-03-06 | Matsushita Electric Ind Co Ltd | Speaker unit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100593695B1 (en) * | 2005-12-08 | 2006-06-30 | (주)에이텍엔지니어링 건축사사무소 | Box structure for installing at housing development |
Also Published As
| Publication number | Publication date |
|---|---|
| KR930015991A (en) | 1993-07-24 |
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