JPH0653373A - Ic carrier and method of testing and mounting ic - Google Patents

Ic carrier and method of testing and mounting ic

Info

Publication number
JPH0653373A
JPH0653373A JP20581992A JP20581992A JPH0653373A JP H0653373 A JPH0653373 A JP H0653373A JP 20581992 A JP20581992 A JP 20581992A JP 20581992 A JP20581992 A JP 20581992A JP H0653373 A JPH0653373 A JP H0653373A
Authority
JP
Japan
Prior art keywords
pads
pad
mounting
carrier
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP20581992A
Other languages
Japanese (ja)
Inventor
Noriyuki Goto
徳行 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20581992A priority Critical patent/JPH0653373A/en
Publication of JPH0653373A publication Critical patent/JPH0653373A/en
Withdrawn legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To eliminate the cutting of a lead when mounting an IC while the IC can be used to test concerning an IC carrier for protecting the lead of the IC packaged in the narrow pitch lead. CONSTITUTION:The present device comprises a plurality of first pads 2 arranged so as to connect each lead 21 of an IC separately on the surface of an insulating board 1, second pads 3 having the same number of pads as the first pads 2 arranged at intervals capable of separately contacting IC connecting contacts 31 of a test apparatus for testing the IC on the rear of the insulating board 1, and third pads 4 having the same number of pads as the first pads 2 arranged in alignment with the arrangement of connecting terminals 42 for mounting the IC of a mounting substrate 41 for mounting the IC. Each one of the first pads 2, the second pads 3 and the third pads 4 is made as one set, and interconnection of the pads in each set is formed by printed wirings 5 and through holes 6. An IC mounting to the mounting substrate 41 is performed by interposing an IC carrier.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ICキャリア及びIC
試験方法及びIC実装方法に係り、特に、狭ピッチリー
ドのパッケージにしたIC(半導体集積回路装置)のリ
ードを保護するICキャリア及びその使用方法に関す
る。
BACKGROUND OF THE INVENTION The present invention relates to an IC carrier and an IC.
The present invention relates to a test method and an IC mounting method, and more particularly, to an IC carrier for protecting leads of an IC (semiconductor integrated circuit device) packaged in a narrow pitch lead and a method of using the IC carrier.

【0002】QFP(Quad-Flat-Package) やPGA(Pin
-Grid-Array)など狭ピッチリードのパッケージにしたI
Cは、繊細なリードを保護する目的で、試験や出荷の際
に、リードの先端を半田付けにより固定しておくICキ
ャリアを個々のIC毎に用いている。
QFP (Quad-Flat-Package) and PGA (Pin)
-Grid-Array) and other packages with narrow pitch leads I
For the purpose of protecting the delicate lead, C uses an IC carrier for fixing the tip of the lead by soldering at the time of testing or shipping for each individual IC.

【0003】[0003]

【従来の技術】図4はICキャリアの従来例を説明する
ための側面図である。同図において、このICキャリア
は、絶縁板11の表面に、ICの各リード21を個別に
接続し得るように配列した第1パッド12と、第1パッ
ド12と同数でありICを試験する試験装置のIC接続
用接触子31(ポゴピンと称するスプリングコンタクタ
など)を個別に接触し得る間隔で第1パッド12の外側
に配列した第2パッド13とを有し、第1パッド12と
第2パッド13の各1個宛を1組として各組内のパッド
相互間が印刷配線15で接続されており、第1パッド1
2の内側にはスリット17が設けられてなっている。
2. Description of the Related Art FIG. 4 is a side view for explaining a conventional example of an IC carrier. In the figure, this IC carrier has the same number of first pads 12 arranged on the surface of the insulating plate 11 so that the leads 21 of the IC can be individually connected, and a test for testing the IC. A first pad 12 and a second pad, each of which has a second pad 13 arranged outside the first pad 12 at an interval such that an IC connection contact 31 (a spring contactor called a pogo pin or the like) of the device can be individually contacted. The pads in each set are connected to each other by the printed wiring 15 as one set for each of the first pad 1 and the first pad 1.
A slit 17 is provided on the inner side of 2.

【0004】そして、製造されたICの各リード21の
先端が第1パッド12に半田付けで固定されてリード2
1の変形を防止し、ICと一体になって試験部門に送ら
れる。試験部門は、IC接続用接触子31を第2パッド
13に接触させてICの試験を行う。試験終了の後はI
Cと一体になったままユーザに出荷される。ユーザは、
スリット17の部分でリード21の先端部を切断してI
CをICキャリアから分離し、そのICを実装基板に実
装する。ICキャリアはICを切り離されたところで用
済みとなる。
Then, the ends of the leads 21 of the manufactured IC are fixed to the first pad 12 by soldering to form the leads 2
The deformation of 1 is prevented, and it is sent to the test department together with the IC. The test department tests the IC by bringing the IC connection contact 31 into contact with the second pad 13. After the test, I
It is shipped to the user while being integrated with C. The user
I cut the tip of the lead 21 at the slit 17
C is separated from the IC carrier and the IC is mounted on a mounting board. The IC carrier is used when the IC is separated.

【0005】[0005]

【発明が解決しようとする課題】ところで、ユーザで
は、ICキャリアから切り離したICのリードを保護す
る技術を持たないため、実装前の取扱によって実装がで
きなくなってしまうことが屡ある。また、上記リードの
切断には特殊な技術を必要とするため、このようなIC
キャリアによってリードを保護したICを受け入れられ
ないユーザも多い。
By the way, since the user does not have a technique for protecting the leads of the IC separated from the IC carrier, it is often impossible to mount the IC due to handling before mounting. In addition, since a special technique is required to cut the above leads, such an IC
Many users cannot accept ICs whose leads are protected by carriers.

【0006】そこで本発明は、狭ピッチリードのパッケ
ージにしたICのリードを保護するICキャリアに関
し、該ICの試験に用い得ると共に、該ICの実装の際
にリードの切断を不要にさせるようにすることを目的と
する。
Therefore, the present invention relates to an IC carrier for protecting the leads of an IC packaged in a narrow pitch lead, which can be used for testing the IC, and makes it unnecessary to cut the leads when mounting the IC. The purpose is to do.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に、本発明によるICキャリアは、絶縁板の表面に、I
Cの各リードを個別に接続し得るように配列した複数の
第1パッドを有し、該絶縁板の裏面に、該第1パッドと
同数であり該ICを試験する試験装置のIC接続用接触
子を個別に接触し得る間隔で配列した第2パッドと、該
第1パッドと同数であり該ICを実装する実装基板の該
IC実装用接続端子の配列に整合させて配列した第3パ
ッドとを有し、該第1パッドと該第2パッドと該第3パ
ッドの各1個宛を1組として、各組内のパッド相互間が
印刷配線及びスルーホールで接続されてなることを特徴
としている。
In order to achieve the above-mentioned object, an IC carrier according to the present invention is provided with I on the surface of an insulating plate.
It has a plurality of first pads arranged so that each lead of C can be individually connected, and the contact for IC connection of a testing device for testing the IC is provided on the back surface of the insulating plate in the same number as the first pads. Second pads in which the children are arranged at intervals allowing individual contact with each other, and third pads in the same number as the first pads and arranged in alignment with the arrangement of the IC mounting connection terminals of the mounting substrate on which the IC is mounted. And each of the first pad, the second pad and the third pad is set as one set, and the pads in each set are connected by a printed wiring and a through hole. There is.

【0008】このICキャリアでは、ICを第1パッド
に接続した状態で、前記試験装置のIC接続用接触子を
第2パッドに接触させて、該ICの試験を行うことがで
きる。また、ICを第1パッドに接続した状態で、第3
パッドを前記実装基板の該IC用接続端子に接続させ
て、該ICを該実装基板に実装することができる。
With this IC carrier, the IC can be tested by bringing the IC connection contact of the tester into contact with the second pad while the IC is connected to the first pad. In addition, when the IC is connected to the first pad,
The IC can be mounted on the mounting board by connecting the pad to the IC connection terminal of the mounting board.

【0009】[0009]

【作用】上記第1パッドは、その配列により従来例の第
1パッドと同様にICのリードを保護できる。また上記
第2パッドは、その配列における相互間の間隔により試
験装置のIC接続用接触子を接触させることができて、
第1パッドに接続したICの試験を可能にさせる。そし
て上記第3パッドは、その配列により実装基板に接続す
ることができて、第1パッドに接続したICを実装基板
に本ICキャリアの介在による実装を可能にさせる。
The above-mentioned first pad can protect the leads of the IC by the arrangement thereof like the first pad of the conventional example. Further, the second pad can be brought into contact with the IC connection contact of the test apparatus due to the distance between the second pads.
Allows testing of the IC connected to the first pad. The third pad can be connected to the mounting board by its arrangement, and the IC connected to the first pad can be mounted on the mounting board by the interposition of the present IC carrier.

【0010】このことから、本ICキャリアは、ICの
リードを保護してそのICの試験に用いることができる
と共に、そのICの実装の際にリードの切断を不要にさ
せることができる。
Therefore, the present IC carrier can protect the leads of the IC for use in testing the IC and can eliminate the need for cutting the leads when mounting the IC.

【0011】[0011]

【実施例】以下本発明の実施例について図1〜図3を用
いて説明する。図1はICキャリアの実施例の側面図と
上面図と下面図、図2はIC試験方法の実施例を説明す
るための側面図、図3はIC実装方法の実施例を説明す
るための側面図、である。
Embodiments of the present invention will be described below with reference to FIGS. 1 is a side view, a top view and a bottom view of an embodiment of an IC carrier, FIG. 2 is a side view for explaining an embodiment of an IC test method, and FIG. 3 is a side view for explaining an embodiment of an IC mounting method. Fig.

【0012】図1において、このICキャリアは、絶縁
板1の表面に、ICの各リード21を個別に接続し得る
ように配列した第1パッド2を有し、絶縁板1の裏面
に、第1パッド2と同数であり先に述べた試験装置のI
C接続用端子31を個別に接触し得る間隔で配列した第
2パッド3と、第1パッド2同数であり上記ICを実装
する実装基板41の上記IC実装用接続端子42の配列
に整合させて配列した第3パッド4とを有し、第1パッ
ド2と第2パッド3と第3パッド4の各1個宛を1組と
して、各組内のパッド相互間が印刷配線5及びスルーホ
ール6で接続されてなっている。絶縁板の厚さは約1m
m程度である。
In FIG. 1, this IC carrier has a first pad 2 arranged on the surface of an insulating plate 1 so that each lead 21 of the IC can be individually connected, and on the back surface of the insulating plate 1, a first pad 2 is formed. The same number as 1 pad 2 and I of the above-mentioned test device
The second pads 3 in which the C connection terminals 31 are arranged at intervals so that they can be individually contacted with each other, and the second pads 3 having the same number as the first pads 2 are aligned with the arrangement of the IC mounting connection terminals 42 of the mounting board 41 on which the ICs are mounted. The third pad 4 is arranged, and each one of the first pad 2, the second pad 3, and the third pad 4 is set as one set, and the printed wiring 5 and the through hole 6 are provided between the pads in each set. It is connected with. The thickness of the insulating plate is about 1m
It is about m.

【0013】そして、製造されたICの各リード21の
先端が第1パッド2に半田付けで固定されてリード21
の変形を防止し、ICと一体になって試験部門に送られ
る。試験部門は、図2に示すように、絶縁板1の裏面側
でIC接続用接触子31を第2パッド3に接触させてI
Cの試験を行う。試験終了の後はICと一体になったま
まユーザに出荷される。
Then, the tips of the leads 21 of the manufactured IC are fixed to the first pad 2 by soldering to form the leads 21.
Deformation is prevented, and it is sent to the testing department together with the IC. As shown in FIG. 2, the testing department brings the IC connection contact 31 into contact with the second pad 3 on the back surface side of the insulating plate 1 and I
Test C. After the test, it is shipped to the user while being integrated with the IC.

【0014】ユーザにおけるICの実装は、図3に示す
ように、リード21の先端部を切断することなく第3パ
ッド4を実装基板41のIC実装用接続端子42に接続
して行う。この接続ではバンプ43を介在させて第2パ
ッド3などが実装基板41の表面に接触しないようにす
る。これにより、実装の際にもリード21の保護が維持
されて従来例の場合に生じるトラブルが防止される。ま
た、リード21を切断する技術を持たないユーザもこの
ICを受け入れることができるようになる。
As shown in FIG. 3, the user mounts the IC by connecting the third pad 4 to the IC mounting connection terminal 42 of the mounting substrate 41 without cutting the tip portions of the leads 21. In this connection, the bumps 43 are interposed so that the second pad 3 and the like do not come into contact with the surface of the mounting substrate 41. As a result, the protection of the leads 21 is maintained even during mounting, and troubles that occur in the case of the conventional example are prevented. Also, a user who does not have a technique for cutting the leads 21 can accept this IC.

【0015】更に以上のことから明らかなように、試験
の際の接触に用いる第2パッド3をICの直下にも配列
することができるので、絶縁板1は従来例の絶縁板11
よりも小さくすることが可能である。また、ユーザ側で
は、IC実装用接続端子42の配列がICのリード21
の配列に制約されることがなくなり、実装基板41の設
計自由度が増加する。なお、リード21を切断する技術
を持つユーザは、ICキャリアを介在させないでICを
実装する従来形態の実装にすることも可能である。
Further, as is apparent from the above, since the second pad 3 used for contact in the test can be arranged immediately below the IC, the insulating plate 1 is the insulating plate 11 of the conventional example.
Can be smaller than. Further, on the user side, the arrangement of the IC mounting connection terminals 42 is such that the leads 21 of the IC are arranged.
Is not restricted by the arrangement, and the degree of freedom in designing the mounting board 41 is increased. It should be noted that a user having a technique of cutting the leads 21 can also adopt a conventional form of mounting the IC without interposing the IC carrier.

【0016】[0016]

【発明の効果】以上説明したように本発明によれば、狭
ピッチリードのパッケージにしたICのリードを保護す
るICキャリアに関し、該ICの試験に用い得ると共
に、該ICの実装の際にリードの切断を不要にさせるよ
うにすることが可能になって、リード切断後のリード曲
がりによる実装トラブルが排除されると共に、リード切
断の技術を持たないユーザにも当該ICが受け入れられ
るようになる効果があり、更には、当該ICキャリアの
構成により、ICキャリアの小型化や実装基板設計自由
度の増加といった効果もある。
As described above, the present invention relates to an IC carrier for protecting the leads of an IC packaged in a narrow pitch lead, which can be used for testing the IC, and at the time of mounting the IC. It is possible to eliminate the need for disconnecting the lead wire, eliminate the mounting troubles caused by bending the lead wire after lead cutting, and allow the user who does not have lead cutting technology to accept the IC. In addition, the configuration of the IC carrier has an effect of reducing the size of the IC carrier and increasing the degree of freedom in designing the mounting board.

【図面の簡単な説明】[Brief description of drawings]

【図1】 ICキャリアの実施例の側面図と上面図と下
面図
FIG. 1 is a side view, a top view, and a bottom view of an embodiment of an IC carrier.

【図2】 IC試験方法の実施例を説明するための側面
FIG. 2 is a side view for explaining an example of an IC test method.

【図3】 IC実装方法の実施例を説明するための側面
FIG. 3 is a side view for explaining an example of an IC mounting method.

【図4】 ICキャリアの従来例を説明するための側面
FIG. 4 is a side view for explaining a conventional example of an IC carrier.

【符号の説明】[Explanation of symbols]

1,11 絶縁板 2,12 第1パッド(ICのリード固定用) 3,13 第2パッド(試験用) 4 第3パッド(実装用) 5,15 印刷配線 6 スルーホール 17 スリット 21 ICのリード 31 試験装置のIC接続用接触子 41 実装基板 42 IC実装用接続端子 43 バンプ 1, 11 Insulating plate 2, 12 First pad (for fixing IC lead) 3,13 Second pad (for test) 4 Third pad (for mounting) 5,15 Printed wiring 6 Through hole 17 Slit 21 IC lead 31 IC connection contact for test equipment 41 Mounting board 42 IC mounting connection terminal 43 Bump

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 絶縁板の表面に、ICの各リードを個別
に接続し得るように配列した複数の第1パッドを有し、
該絶縁板の裏面に、該ICを試験する試験装置のIC接
続用接触子を個別に接触し得る間隔で配列した第2パッ
ドと、該ICを実装する実装基板の該IC実装用接続端
子の配列に整合させて配列した第3パッドとを有し、該
第1パッドと該第2パッドと該第3パッドの各1個宛を
1組として、各組内のパッド相互間が印刷配線及びスル
ーホールで接続されてなることを特徴とするICキャリ
ア。
1. A plurality of first pads arranged on the surface of an insulating plate so as to be able to individually connect the leads of the IC,
On the back surface of the insulating plate, the second pads in which the IC connection contacts of the test device for testing the IC are arranged at intervals so that they can be individually contacted, and the IC mounting connection terminals of the mounting board on which the IC is mounted. A third pad arranged so as to match the arrangement, and each one of the first pad, the second pad and the third pad is set as one set, and printed wiring is provided between the pads in each set. An IC carrier characterized by being connected through through holes.
【請求項2】 ICを請求項1記載のICキャリアの第
1パッドに接続した状態で、前記試験装置のIC接続用
接触子を該ICキャリアの第2パッドに接触させて、該
ICの試験を行うことを特徴とするIC試験方法。
2. A test of the IC by contacting an IC connection contact of the test device with a second pad of the IC carrier with the IC connected to the first pad of the IC carrier according to claim 1. An IC test method comprising:
【請求項3】 ICを請求項1記載のICキャリアの第
1パッドに接続した状態で、該ICキャリアの第3パッ
ドを前記実装基板の該IC用接続端子に接続させて、該
ICを該実装基板に実装することを特徴とするIC実装
方法。
3. The IC is connected to the first pad of the IC carrier according to claim 1, and the third pad of the IC carrier is connected to the IC connection terminal of the mounting substrate to connect the IC. An IC mounting method comprising mounting on a mounting board.
JP20581992A 1992-08-03 1992-08-03 Ic carrier and method of testing and mounting ic Withdrawn JPH0653373A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20581992A JPH0653373A (en) 1992-08-03 1992-08-03 Ic carrier and method of testing and mounting ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20581992A JPH0653373A (en) 1992-08-03 1992-08-03 Ic carrier and method of testing and mounting ic

Publications (1)

Publication Number Publication Date
JPH0653373A true JPH0653373A (en) 1994-02-25

Family

ID=16513230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20581992A Withdrawn JPH0653373A (en) 1992-08-03 1992-08-03 Ic carrier and method of testing and mounting ic

Country Status (1)

Country Link
JP (1) JPH0653373A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060080424A (en) * 2005-01-05 2006-07-10 삼성전자주식회사 Memory card mounting multi-chip package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060080424A (en) * 2005-01-05 2006-07-10 삼성전자주식회사 Memory card mounting multi-chip package

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19991005