JPH0651816A - Programmable controller - Google Patents

Abstract

PURPOSE:To perform stop and reset processing for any arbitrary process part easily for a user by designating one reset object process among processes at least and executing the reset processing to the designated reset object process. CONSTITUTION:A reset object process table to store the process number of the reset object process is stored in a memory to be read/written by the user. The leading address of that table is designated by an operand, and how many process numbers of the reset object process stored in the table are reset is designated by the other operand. Namely, when the contact of a contact number 00012 is turned on, processes corresponding to process numbers 0010, 0015 and 0068 stored for 3H from 1000CH in the reset object process table, namely, processes 10, 15 and 60 are stopped and reset. Thus, a processing program is reset from a process information table corresponding to the process number.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
A programmable controller for sequentially executing processing corresponding to each process based on a user program described in the FC language), and particularly for enabling a reset process to be selectively executed for a plurality of designated processes or a designated chart. Programmable controller.

[0002]

2. Description of the Related Art In recent years, programmable controllers have come into widespread use, and these programmable controllers are now being used in complicated and sophisticated control fields.
Along with this, the programmable controller itself has become multifunctional and large in size, and various programming languages have been used for user programs.

However, in the conventional programmable controller, although various types of languages mainly used for logic control are used as programming languages, in response to the recent increase in size and complexity of the system. It is hard to say that is sufficiently compatible, and there is a problem that it cannot follow the general idea of software engineering from the viewpoint of quality control and reuse of programming languages.

Therefore, the IEC (International Electrot
echnical Commissin) has reviewed the programming language of the programmable controller and can express the process step motion in the description format of the conventional ladder language, and it is a process step language (Sequential Funct) that enables structured programming.
Ion Chart) (hereinafter referred to as SFC language),
The standard draft is summarized.

The SFC language is a kind of graphic language in which a program of a programmable controller is divided into a number of "processes", and one or more "processes" are associated with each "process" and plumbed. It is based on step-step control. The program in the SFC language is described by combining a "transition condition" inserted between each "process" and a "process" associated with each "process".

[0006] By the way, this kind of process-progressive language (SF
In a programmable controller that employs a user program written in C), the importance of fail-safe is paid attention as the system becomes larger and more complicated, and as the application itself becomes larger and more complicated, it accompanies it. In many cases, a self-diagnosis operation such as emergency stop is incorporated in the user program.

[0007]

By the way, in the user program written in the step-progressive language (SFC language), the entire program can be divided and systematized in process steps, and efficiency can be improved in design and maintenance work. However, since the process can be divided into process units, an application that suspends a plurality of processes that are independently executed according to a certain event at an arbitrary timing is required.

Further, when designing an application in which a plurality of independent processes are processed in parallel by one program, a method of programming these processes as independent charts has been proposed. In this case, a method of controlling in a user program the activation / deactivation of a process related to this program that regulates the execution / non-execution of the program for I / O control and data processing,
This is possible by operating (establishing / not establishing) the transition condition between steps.

However, in order to realize such an operation in the user program described in the conventional SFC language, the steps described independently are connected as a chart for the reset operation, and the emergency stop is monitored. The result must be included as a transition condition. This kind of language has advantages in terms of intelligibility and efficiency depending on how the description of the normal operation flow is graphically expressed. However, it is very difficult to add an operation for an emergency stop by connecting the steps that are not directly related to the normal operation to the normal operation flow by the method described above. Yes, it is almost impossible. Moreover, strictly speaking, it is difficult to realize simultaneous stopping and resetting for a plurality of processes for the same reason, only by assembling the chart.

Further, according to the above-mentioned conventional method, 1) it is not possible to stop and reset only one of the processes without stopping the entire execution of the program.

2) In order to stop the programs for I / O control and data processing due to some external factor,
The process itself must be deactivated. In other words, that process must be transitioned to the next process. For example, in the case of an emergency stop, the above conventional method does not mean that the process itself is stopped.

3) In order to express delicate and complicated control, the redundancy of the program is accompanied, and the high visibility, which is an advantage of the step-progressive language, is impaired. In other words, a program is required to monitor the emergency stop for all processes that require stop and reset. Further, in terms of the capacity of the program, the capacity for programming the redundant portion is increased, and an extra man-hour is required for that purpose. Further, the same problem occurs in terms of execution speed.

In view of this, the present invention is a programmable program that allows a user to easily implement stop and reset processing for an arbitrary process portion of a plurality of processes being processed in parallel without stopping the entire program. It is intended to provide a controller.

[0014]

In order to achieve the above-mentioned object, the invention of claim 1 is a step progress language (SFC language).
In a programmable controller that sequentially executes processing corresponding to each process based on the user program described by, the reset target process designating unit designating at least one reset target process among the processes, and the reset target process designating unit. Reset means for executing the reset process for the designated reset target process,
Is provided.

According to a second aspect of the present invention, in the programmable controller that sequentially executes the process corresponding to each process based on the user program described in the process step language (SFC language), the user programs are independent of each other. Dividing means for dividing into a plurality of charts, chart specifying means for specifying an arbitrary chart among the plurality of charts divided by the dividing means, and selective reset processing for the chart specified by the chart specifying means And a resetting means for executing.

[0016]

According to the invention of claim 1, the reset target process designating means designates an arbitrary reset target process among a plurality of processes, and the reset target process designates the reset target process designated by the reset target process designating means. Perform reset processing.

In the invention of claim 2, the user program is divided into a plurality of independent charts, an arbitrary chart is designated by the chart designating means by the chart designating means, and the resetting means is constituted by the resetting means. The reset process is selectively executed on the chart designated by the chart designation means.

[0018]

Embodiments of a programmable controller according to the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of a programmable controller according to the present invention. The programmable controller 100 shown in FIG.
PU (central processing unit) 11, four user program memories 1 to 4, I / O memory (input / output memory) 12,
The system program memory 13 and the work memory 14 are connected to each other, and the bus 10 is connected to an I / O (input / output circuit) 17 via an i / f (interface) 16.

Here, the user program memories 1 to 4 store user program information (1) to (4), and the user program information (1) stored in the user program memory 1 corresponds to each process. The user program information (2) including a plurality of process information tables and the start address (process information table vector) of each process information table and stored in the user program memory 2 includes a plurality of transition condition tables corresponding to each transition condition and The user program information (3) including the start address of each transition condition table (transition condition table vector) and stored in the user program memory 3 is a plurality of processing programs corresponding to the processing of each process and the start address of each processing program. (Processing program vector) and stored in the user program memory 4. That the user program information (4)
Includes a plurality of transition condition programs corresponding to each transition condition and the start address (transition condition program vector) of each transition condition program.

The I / O memory 12 stores the state of the I / O 17 input or output via the i / f 16, and the system program memory 13 includes the CPU 11
It stores the system program for controlling
The work memory 14 is used as a work area for controlling the entire programmable controller 100.

The CPU 11 is composed of a microprocessor and refers to the user program information (1) to (4) stored in the user program memories 1 to 4 and the state of the I / O 17 stored in the I / O memory 12. A desired programmable control is executed using the work area of the work memory 14 based on the system program stored in the system program memory 13.

Although the four memories 1 to 4 are provided as the user program memory in the configuration shown in FIG. 1, these may be combined into one.

Next, the detailed structure of the embodiment shown in FIG. 1 will be described. Before describing the detailed structure of the embodiment shown in FIG. 1, the process steps used in the programmable controller 100 of this embodiment will be described. A brief description will be given of an outline of the step-progressing program in the progressive language (SFC).

2 to 7 show a step progress language (SFC)
2 shows an example of a step progress type program according to the above.
FIG. 2 shows an overall chart of the step-progressing type program, and FIGS. 3 to 7 show partial detailed charts of the overall chart of the step-progressing type program.

A step-progressive language (SFC) is a program that has a number of "steps" (shown as A in FIG. 2) throughout the program.
Is a graphic language in which one "process" is divided into one or a plurality of "processes" and is programmed, and the process step control is basically used. That is, as shown in FIG. 2, a “transition condition” (which is indicated by C in FIG. 2) inserted between each “process” and each “process”.
A program is described by combining the "processing" associated with. In addition, in FIG. 2, “process” and “processing” are graphically displayed in a box shape,
The "transition condition" is graphically displayed by a horizontal line.

"Process" that graphically displays in the shape of a box
Has a logic state of active (active) or inactive (inactive). When the “process” is in the active state, the “processing” related to the “process” is sequentially executed. On the other hand, when the "process" is in the inactive state, the "processing" related to the "process" is not executed. If there is no "process" associated with the "process", the state is "waiting" until the "transition condition" associated with the "process" is established. Here, each “process” has a unique “process number”, and a plurality of “processes” having the same “process number” cannot be provided. Also,
There is no "process" without a "process number".

A "process" is related to a "process", and a "process" to which no "process" is related can be used as a "dummy process" in which no operation is performed even in the active state. The “process” is turned on / off according to the active state or inactive state of the “process” to which the “process” is related. This "process" also has a unique "process number",
Multiple "processes" having the same "process number" cannot be provided. Also, there is no "process" without a "process number".

There is only one "transition condition" between "process" and "process", and represents "connection condition" between "process" and "process". When the "transition condition" under the "process" in the active state is satisfied, the "process" in the active state becomes the inactive state,
The next "process" becomes active. In this way, the “transition condition” plays a role of controlling the flow of control from the “process” to the “process”. This "transition condition" also has a unique "transition condition number", and a plurality of "transition conditions" having the same "transition condition number" cannot be provided. Also,
There is no "transition condition" without a "transition condition number".

By the way, the entire chart shown in FIG. 2 includes steps 1 to 10 as "steps" and steps 1 to 11 as "processing". In FIG. 2, (a) to (e) As shown in "Process step operation", "Selective branch operation", "Parallel branch operation", "Parallel merge operation",
It includes "merging operation from selected branch".

Next, each of the above operations will be described with reference to the partial charts shown in FIGS.

FIG. 3 shows the details of the "step step operation" shown in FIG. 2 (a). In FIG.
When "process 1" is in the active state and "process 1" and "process 2" are being executed, if "transition condition 1" that is a transition condition from "process 1" to "process 2" is satisfied, Step progress from "step 1" to "step 2". That is, the "process 1" becomes inactive and the "process 2" becomes active instead. As a result, the execution of the "process 1" and the "process 2" related to the "process 1" is interrupted, and the execution of the "process 3" related to the "process 2" is started instead. Then, this "processing 3" is repeated until "step 2" becomes inactive.

FIG. 4 shows the details of the "selective branch operation" shown in FIG. 2 (b). In FIG.
When "process 2" is in the active state and "process 3" is being executed, "transition condition 2" or "process 2" to "process 4" which is a transition condition from "process 2" to "process 3" When the transition condition 3 which is the transition condition to
Selectively branch from "step 2" to "step 3" or "step 4". That is, when “transition condition 2” is satisfied, “step 2” becomes inactive, and instead “step 3”
Becomes active, execution of “Process 3” related to “Step 2” is interrupted, and execution of “Process 4” related to “Step 3” is started. This "processing 4" is repeated until "transition condition 4" is satisfied and "step 3" becomes inactive. When "transition condition 3" is satisfied, "step 2" becomes inactive, instead "step 4" becomes active, and execution of "process 3" related to "step 2" is interrupted. , "Process 5" related to "Process 4" is started to be executed. This "Process 5" is
This is repeated until the "transition condition 5" is satisfied and the "step 4" is in the inactive state.

FIG. 5 shows the details of the "parallel branch operation" shown in FIG. 2 (c). In FIG.
When “process 4” is in the active state and “process 5” is executed, when “transition condition 5” that is a transition condition from “process 4” to “process 5” and “process 6” is satisfied, Parallel branch from "step 4" to "step 5" and "step 6". That is, when “transition condition 5” is satisfied,
"Step 4" becomes inactive, and instead "Step 5" and "Step 6" become active at the same time, which interrupts execution of "Process 5" associated with "Step 4", Execution of “Process 6” related to “Process 5” and “Process 7” related to “Process 6” is started.
Then, the “process 6” is repeated until the “transition condition 6” is satisfied and the “step 5” is in the inactive state.
Further, the “process 7” is repeated until the “transition condition 7” is satisfied and the “process 6” is in the inactive state.

FIG. 6 shows the details of the "parallel merging operation" shown in FIG. 2 (d). In FIG.
The transition from “step 5” to “step 7” and the transition from “step 6” to “step 8” are the same as the transition from “step 1” to “step 2” shown in FIG. That is, when "process 5" is in the active state and "process 6" is being executed, if "transition condition 6", which is a transition condition from "process 5" to "process 7", is satisfied, "process 5" Becomes an inactive state, and instead the “process 7” becomes the active state, the execution of the “process 6” related to the “process 5” is interrupted, and the execution of the “process 8” related to the “process 7” is performed. Is started. Also, "Process 6" is in the active state,
When the "transition condition 7", which is the transition condition from the "process 6" to the "process 8", is satisfied while the "process 7" is being executed, the "process 6" becomes inactive, and instead the "process 7" is executed. 8 ”becomes active, execution of“ Process 7 ”related to“ Step 6 ”is interrupted, and execution of“ Process 9 ”related to“ Step 8 ”is started.

When "process 7" and "process 8" are in the active state and "process 8" and "process 9" are being executed, "process 7" and "process 8" to "process 9" are executed.
When the "transition condition 8" that is the transition condition to the step is satisfied, the "step 7" and the "step 8" are merged in parallel to the "step 9". That is, when the "transition condition 8" is satisfied, the "process 7" and the "process 8" are in the inactive state, and instead, the "process 9" is in the active state and the "process 7" is
Execution of “Process 8” related to “Process 8” and “Process 9” related to “Step 8” is interrupted, and execution of “Process 10” related to “Process 9” is started instead. This "Processing 10"
The execution of is repeated until the "transition condition 9" is satisfied and the "step 9" becomes inactive.

FIG. 7 shows the details of the "merging operation from selected branch" shown in FIG. 2 (e). In FIG. 7, when “process 3” is in the active state and “process 4” is executed, and when “process 9” is in the active state and “process 10” is executed, “process 3” is executed.
When the transition condition “Transition condition 4” that is the transition condition from the step to the “step 10” is satisfied or the “transition condition 9” that is the transition condition from the “step 9” to the “step 10” is satisfied, the “step 10”
To join. That is, when “transition condition 4” is satisfied,
"Process 3" becomes inactive, instead "Process 10" becomes active, execution of "Process 4" related to "Process 3" is interrupted, and "Process 11" related to "Process 10" is interrupted. Is started. Further, when the "transition condition 9" is satisfied, the "step 9" becomes the inactive state, and instead the "step 10" becomes the active state,
Execution of “Process 10” related to “Process 9” is interrupted,
Execution of “Process 11” related to “Process 10” is started. The execution of the "process 11" is repeated until the "transition condition 10" is satisfied and the "step 10" is in the inactive state.

The above is the outline of the step progress program in the step progress language (SFC) adopted in this embodiment. Next, the step progress program in the step progress language (SFC) will be described. A detailed configuration of the programmable controller 100 shown in FIG. 1 to be executed will be described.

FIG. 8 shows the contents of the user program information (1) stored in the user program memory 1 shown in FIG. As shown in FIG. 8, the user program information (1) includes the process information table vector 2
Process information table vector storage area 200 for storing 0
And a process information table storage area 230 for storing (n + 1) process information tables 23 corresponding to the respective processes.

FIG. 9 shows the process information table 2 shown in FIG.
3 shows details of No. 3. 9, in the process information table 23, the process number 24 of this “process”, the number of in-process processes 25 associated with this “process”, the process number, the AQ (action qualifier) code,
A plurality of pieces of processing information 26 corresponding to each “processing” including a combination of AQ additional information, the number of transition conditions 27 associated with this “step”, and a plurality of transition condition numbers 28 corresponding to each “transition condition” are written. ing. Further, in FIG. 9, numeral 29 is a binary display column, and in the case of a process which becomes active at the start of the program operation, "1" is written in advance in this binary display column 29. In addition, in FIG. 9, the binary display column 29 is provided corresponding to each process information table 23, but it is configured to provide another table in which only the processes that become active at the start of the program operation are collected. May be. The process information table 23 is read and processed in units of one process information table as needed when the program is executed.

FIG. 10 shows details of the process information table vector 20 shown in FIG. In FIG. 10, the process information table vector 20 contains (n + 1)
Start address 2 of each process information table 23
1 is written, and when the program is executed, the corresponding process information table 23 is read while referring to the start address 21 of each process information table written in this process information table vector 20.

FIG. 11 shows the contents of the user program information (2) stored in the user program memory 2 shown in FIG. As shown in FIG. 11, the user program information (2) includes a transition condition information table vector storage area 300 for storing the transition condition information table vector 30 and (m + 1) pieces of transition condition information corresponding to each transition condition. It comprises a transition condition information table storage area 330 for storing the table 33.

FIG. 12 shows details of the transition condition information table 33 shown in FIG. In FIG. 12, the transition condition information table 33 includes this "transition condition".
Transition condition number 34, the number of preceding processes 35 connected before this "transition condition", and the preceding process number 3 corresponding to each preceding process
6, the number of post-connection processes 37 connected after this "transition condition", and the post-connection process number 38 corresponding to each post-connection process are written. The transition condition information table 33 is read and processed in units of one transition condition information table as needed when the program is executed.

FIG. 13 shows details of the transition condition information table vector 30 shown in FIG. In FIG. 13, the transition condition information table vector 30 includes
The start address 31 of each of the (m + 1) transition condition information tables 33 is written, and at the time of program execution, referring to the start address 31 of each transition condition information table written in the transition condition information table vector 30, , The corresponding transition condition information table 33 is read.

FIG. 14 shows the contents of the user program information (3) stored in the user program memory 3 shown in FIG. As shown in FIG. 14, the processing program vector storage area 400 for storing the processing program vector 40 is included in the user program information (3).
And (p + 1) processing programs 4 corresponding to each processing
3 is stored in the processing program storage area 430.

FIG. 15 shows an example of the processing program 43 shown in FIG. In FIG. 15, the processing program 43 corresponding to each processing is described by a ladder chart or the like.

FIG. 16 shows the details of the processing program vector 40 shown in FIG. In FIG. 16, the start address 41 of each of the (p + 1) process programs 43 is written in this process program vector 40, and at the time of program execution, the start address of each process program written in this process program vector 40 is written. The corresponding processing program is read while referring to the address 41.

FIG. 17 shows the contents of the user program information (4) stored in the user program memory 4 shown in FIG. As shown in FIG. 17, the user program information (4) includes a transition condition program vector storage area 500 for storing the transition condition program vector 50 and (m + 1) transition condition programs 53 corresponding to each transition condition. It is composed of a transition condition program storage area 530 to be stored.

FIG. 18 shows details of the transition condition program 53 shown in FIG. In FIG.
The transition condition program 53 corresponding to each transition condition is described in a ladder chart or the like.

FIG. 19 shows details of the transition condition program vector 50 shown in FIG. In FIG. 19, the transition condition program vector 50 includes (m +
1) The start address 51 of each of the transition condition programs 53 is written, and during program execution,
While referring to the start address 51 of each transition condition program written in this transition condition program vector 50,
Read the corresponding transition condition program.

20 to 23 are the same as FIGS. 8 to 19 described above.
20 shows a specific example of the user program information (1) to (4) described above, and the user program information (1) to (4) shown in FIGS. 20 to 23 has been described with reference to FIGS. 2 to 7. It corresponds to a concrete program in the step progress language (SFC). Here, FIG. 20 shows the contents of the user program information (1), FIG. 21 shows the contents of the user program information (2), FIG. 22 shows the contents of the user program information (3), and FIG. 23 is the user program. The content of the information (4) is shown. Note that these contents are the user program information (1) described with reference to FIGS. 8 to 19.
It is the same as the contents of (4).

That is, the user program information (1) shown in FIG. 20 is composed of 10 process information tables corresponding to processes 1 to 10 and a process information table vector 20 storing the start address of each process information table. Has been done.

The user program information (2) shown in FIG. 21 corresponds to transition conditions 1-10.
Each of the transition condition information tables and the transition condition information table vector 30 storing the start address of each transition condition information table.

The user program information (3) shown in FIG. 22 is composed of 11 processing programs corresponding to processing 1 to processing 11 and a processing program vector 40 storing the start address of each processing program. .

The user program information (4) shown in FIG. 23 is composed of 10 transition condition programs corresponding to each "transition condition" and a transition condition program vector 50 storing the start address of each transition condition program. Has been done.

By the way, in this embodiment, a plurality of SFC "processes" are designated at the same time by the special instruction of the ladder program, and all the "processes" designated above as "processes" at the time of execution of this command are executed. It is configured to reset.

An example of this instruction specification is as follows. Mnemonic (opcode) ・ ・ ・ ・ ・ MRST (Multi-reset) Operand 1 ・ ・ ・ Reset target process Operand 2 ・ ・ ・ Reset target number FIG. 24 shows a specific example of the special instruction of this ladder program. It is a thing. In FIG. 24, “MRST” is a mnemonic (opcode), “1000” corresponds to the operand 1, and indicates the top address of the reset target process table that stores the process number of the reset target process described next, “# 0003” corresponds to operand 2 and indicates the number of processes to be reset.

Specifically, as shown in FIG. 25, a reset target process table for storing the process number of the reset target process is stored in the memory which can be read / written by the user. Then, the operand 1 specifies the start address of the reset target process table, and the operand 2
Then, the number of the process number of the reset target process stored in the reset target process table is specified.

In the example shown in FIGS. 24 and 25, when the contact of the contact number "00012" is turned on, the special instruction shown in FIG. 24 causes the reset target process table shown in FIG. Corresponding to the designated process numbers “0010”, “0015”, and “0060”, that is, process 10, process 15, and process 60.
It can be stopped and reset.

In this case, the data (process number) for the designated CH is sequentially read from the address of the reset target process table shown in FIG. 25 designated by the command shown in FIG. 24, and the "process" corresponding to this process number is set to non- While being activated, the process information table corresponding to the process number is read from the user program memory 1 shown in FIG. 1, and the processing programs shown in this process information table are sequentially reset.

With such a configuration, it is possible for the user to easily realize the stop and reset processing for an arbitrary process part of a plurality of processes processed in parallel without stopping the entire program. Become.

Further, in this embodiment, the SFC chart is divided into a plurality of independent charts by using the concept of "page", and the chart is reset on a page-by-page basis.

FIG. 26 is for explaining the concept of “page” adopted in this embodiment. As shown in FIG. 26, the SFC chart is distinguished by a virtual grouping of “page”. Each is divided into independent charts. By dividing the SFC chart by the concept of “page”, parallel processing of a plurality of independent SFC charts can be described.

In this way, when the concept of "page" is introduced and the SFC chart is grouped in "page" units, the user program information (1) shown in FIG. 8, that is, shown in FIG. The contents of the user program memory 1 are changed as shown in FIG.

That is, the process information table shown in FIG. 8 is summarized by the concept of "page" as shown in FIG. 27, and in addition to the process information table vector, process information indicating the start and end addresses of each page. A table page vector is provided.

Although not shown, the user program information (2) shown in FIG. 11, that is, the contents of the user program memory 2 shown in FIG. 1 is also a concept called a "page" as in the user program information (1). Is introduced, and is grouped in "page" units. That is, the transition condition information table shown in FIG. 11 is also grouped under the concept of “page”,
In addition to the transition condition information table vector, a transition condition information table page vector indicating the start and end addresses of each page is provided.

By the way, in this embodiment, the reset for each page is performed by executing the special instruction of the ladder program.

An example of this instruction specification is as follows. Mnemonic (opcode) ... PRST (page reset) Operand ... Page number to be reset FIG. 28 shows a specific example of the special instruction of this ladder program. In FIG. 28, “PRST” is a mnemonic (opcode), “10” corresponds to an operand, and indicates a page number to be reset.

In this case, all the "processes" included in the page designated by the operand are reset. That is, in the example shown in FIG. 28, when the contact with the contact number “00012” is turned on, all the “processes” included in the page 10 are reset by the special command shown in FIG.

That is, while reading the process information table stored in the corresponding page using the page vector of the page number designated by the instruction shown in FIG. 28, within the range of the corresponding page represented by the page vector, The "process" is deactivated, and the processing programs shown in the process information table are sequentially reset.

With such a configuration, the reset process can be performed in page units without stopping the entire program, and the stop and reset processes for arbitrary process parts of a plurality of processes being processed in parallel. Can be easily realized by the user.

FIG. 29 is a flow chart showing the overall processing procedure of the programmable controller 100 of this embodiment. When the program starts,
First, the power-on initial processing is executed (step 80),
Then, a predetermined common process is executed (step 82). If the user program can be operated (step 84) and it is the first operation (step 86), the user program operation initial process is executed (step 88),
Then, a user program operation process is executed (step 90). Then, the input / output circuit 17 is refreshed (step 92) and the process returns to the common process (step 82).

[0073]

As described above, according to the present invention,
Since the reset process can be executed in an arbitrary process or in an arbitrary chart unit, the following various effects can be obtained.

1) Without stopping the execution of the entire user program, only the arbitrary steps or independent chart portions of a plurality of processes processed in parallel are reset and stopped at arbitrary timing. It becomes possible to apply.

2) Since no process transition is involved, it is possible to stop only the relevant process without affecting the other processes.

3) Regardless of the active state of the steps included in the chart, the stop and reset are performed over the entire chart, so that it is easy to specify the step to be stopped and reset.

4) Further, when the reset means is provided as an instruction function capable of being executed at an arbitrary position in the program for I / O control and data processing,
Since it is not necessary to create an emergency stop monitoring program for each process, the good visibility, which is one of the merits of the process step language, is not impaired. In addition, a program that is difficult to describe at the step progress language level can be expressed as one command word, which is effective in reducing the capacity of the user program.

5) It is possible to prevent a reduction in the processing speed which is caused by the redundancy of the program in association with 4).

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of an embodiment of a programmable controller according to the present invention.

FIG. 2 is a diagram showing an example of an overall chart of a process step program in a process step language (SFC) adopted in the embodiment shown in FIG.

FIG. 3 is a partial detailed chart of the overall chart of the step advance program shown in FIG. 2, and is a diagram for explaining a “step advance operation”.

4 is a partial detailed chart of the overall chart of the step-progressing type program shown in FIG. 2, illustrating the "selective branch operation";

FIG. 5 is a partial detailed chart of the overall chart of the step-progressing type program shown in FIG. 2, and is a view for explaining “parallel branch operation”.

FIG. 6 is a partial detailed chart of the overall chart of the step-progressing type program shown in FIG. 2, illustrating the “parallel merging operation”;

FIG. 7 is a partial detailed chart of the overall chart of the step-progressing type program shown in FIG. 2, and is a view for explaining “merging operation from selected branch”.

8 is a diagram showing the contents of user program information (1) stored in the user program memory shown in FIG. 1. FIG.

9 is a diagram showing details of the process information table shown in FIG.

10 is a diagram showing details of the process information table vector shown in FIG.

11 is a diagram showing the contents of user program information (2) stored in the user program memory shown in FIG. 1. FIG.

12 is a diagram showing details of a transition condition information table shown in FIG.

13 is a diagram showing details of a transition condition information table vector shown in FIG.

14 is a diagram showing the content of user program information (3) stored in the user program memory shown in FIG. 1. FIG.

15 is a diagram showing details of the processing program shown in FIG.

16 is a diagram showing details of the processing program vector shown in FIG.

17 is a diagram showing the contents of user program information (4) stored in the user program memory shown in FIG. 1. FIG.

18 is a diagram showing details of the transition condition program shown in FIG.

19 is a diagram showing details of the transition condition program vector shown in FIG.

20 is a diagram showing a specific example of the user program information (1) shown in FIGS. 8 to 10. FIG.

FIG. 21 is a diagram showing a specific example of the user program information (2) shown in FIGS. 11 to 13.

22 is a diagram showing a specific example of the user program information (3) shown in FIGS. 14 to 16. FIG.

23 is a diagram showing a specific example of the user program information (4) shown in FIGS. 17 to 19. FIG.

FIG. 24 is a diagram showing a specific example of a special instruction of a ladder program when resetting is performed in “process” units.

FIG. 25 is a diagram showing an example of a reset target process table.

FIG. 26 is a diagram for explaining the concept of “page” adopted in this embodiment.

FIG. 27 is a diagram showing the contents of user program information (1) changed by the introduction of the concept of “page”.

FIG. 28 is a diagram showing a specific example of a special instruction of a ladder program when resetting is performed in “page” units.

FIG. 29 is a flowchart showing the overall processing procedure of the programmable controller of this embodiment.

[Explanation of symbols]

 1, 2, 3, 4 User program memory 10 Bus 11 CPU (central processing unit) 12 I / O memory 13 System program memory 14 Work memory 16 Interface (i / f) 17 Input / output circuit (I / O circuit)

Claims (2)

[Claims] 1. A programmable controller that sequentially executes processes corresponding to respective processes based on a user program written in a process step language (SFC language), and specifies at least one reset target process among the processes. A programmable controller comprising: reset target process designating means; and reset means for performing a reset process on the reset target process designated by the reset target process designating means. 2. A programmable controller for sequentially executing a process corresponding to each process based on a user program written in a process step language (SFC language), wherein the user program is divided into a plurality of independent charts. Means, a chart designating means for designating an arbitrary chart among a plurality of charts divided by the dividing means, and a resetting means for selectively performing a reset process on the chart designated by the chart specifying means, A programmable controller comprising: