JPH0646799B2 - Sync signal expander - Google Patents

Description

TECHNICAL FIELD The present invention relates to a sync signal expander for expanding the level of a sync signal included in a video signal.

[Conventional technology]

A video signal reproduced from a magnetic recording / reproducing device such as a VTR has its sync signal level contracted due to waveform distortion of a recording / reproducing system. If dubbing is repeated several times with such a video signal, inconveniences such as the occurrence of synchronization disturbance and the fact that a regular video signal cannot be obtained even if it does not reach that point occur. Therefore, in order to expand the sync signal and eliminate the inconvenience caused by the contraction of the sync signal, a sync signal expander is used.

Conventionally, for example, Japanese Patent Application Laid-Open No. 60-1 has been used as a synchronizing signal expander.
No. 86754 "Video sync signal expander" has been proposed.

This sync signal expander, as shown in FIG. 3, includes a feedback circuit 4 of an amplifier 2 installed in a video signal processing system.
By intentionally causing the sync signal in the video signal to shrink (sync error) in the sync error circuit (SC) 6, the negative feedback signal generation circuit 8 generates a negative feedback signal according to the output signal of SC6, The negative feedback signal and the original video signal are added by the adder 10. That is, the feedback circuit 4 constitutes a negative feedback circuit of the video signal, and its feedback ratio is β in the signal period representing only the video excluding the synchronization signal and β-x (<β) in the synchronization signal period. Since it is set, the video signal V applied through the capacitor 12
_IN is a video signal V _OUT whose sync signal level is expanded.
Is taken out as.

[Problems to be solved by the invention]

By the way, in this synchronizing signal expander, the video signal is taken out from the output point of the amplifier 2 and the video signal is fed back to the input side through the feedback circuit 4, but the signal level at the feedback point F is arbitrary. Since the black level of the video signal is not set to the threshold level, the amount of feedback to the amplifier 2 may become unstable due to fluctuations in the average video signal level (APL). In particular, the video signal amplifier 2
When the time constant circuit composed of a capacitor and a resistor is taken out from the output point of 1, the responsiveness of the feedback circuit 4 is dominated by the time constant, so that the followability of the feedback signal with respect to the video signal is reduced, and If such a feedback signal is added to the video signal, waveform distortion may occur.

Also, this sync signal expander has a complicated circuit configuration,
Moreover, since the expansion level of the sync signal is set to a constant level, the level correlation with the signal portion representing the image excluding the sync signal is lost, which causes inconvenience such that only the sync signal is emphasized.

In view of this, the present invention has a simple structure for stably expanding the sync signal level and for expanding the level according to the original sync signal level so as not to impair the correlation with the signal level representing an image. It is intended to provide a sync signal expander.

[Means for solving problems]

As illustrated in FIG. 1, the sync signal expander of the present invention receives a video signal from which a direct current component is removed by a capacitor (14), and uses a voltage source (20) to generate a pedestal potential V _P.
A clamp circuit (18) for setting a synchronization signal to the first transistor (26), and a first resistor (3) on the collector side.
0), the first constant current source (34) is connected to the differential pair formed by connecting the second transistor (28) in parallel with the second resistor (32) interposed in series on the emitter side. A differential amplifier in which the video signal is input to the base of the first transistor from the clamp circuit and the pedestal potential is set from the voltage source to the base of the second transistor. A third transistor (36) having a base and a collector commonly connected to the (expansion circuit 22) and the second transistor, and a second constant current source (42) connected to the emitter side, and the first transistor. The transistor includes a fourth transistor (38) having a base and a collector connected in common and an emitter side connected to a third constant current source (44). A second differential amplifier formed by common emitter with a third resistor (40) (amplifier 24)
And a video signal output in which the level of the synchronization signal is extended from the collector side of the second and third transistors with reference to the pedestal potential.

[Work]

In the sync signal expander of the present invention, for example, in the signal portion V _V that exceeds the pedestal potential V _P (the signal portion that represents the image excluding the synchronization signal V _S ), the first transistor 26 is in the conductive state and the second transistor 28 is in the conductive state. Is in the cutoff state, and in the portion of the synchronization signal V _S , the first transistor 26 is in the cutoff state and the second transistor 28 is in the conductive state. The operation of the first and second transistors 26 and 28 is performed as an amplifying operation of the differential amplifier, and the second
Since the transistor 28 of the second transistor 28 constitutes an amplifier having a constant gain, the conduction state of the second transistor 28 is the synchronization signal V
The amplification operation is performed at the _S level, and the level of the synchronization signal V _S is extended by the amplification operation. Then, the synchronization signal V
_Since the expansion rate X of _S is set to a constant value by a constant gain, the level of the expanded sync signal V _S ′ corresponds to the level of the original sync signal V _S , and is a signal representing an image. The correlation with the level of V _V is not impaired.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the sync signal expander of the present invention.

Video signal V _IN from which DC component is removed through the capacitor 14
Is added to the clamp circuit 18 from the input terminal 16,
An ideal pedestal potential V voltage source 20 which is set to _P, after the black level of the video signal V _IN is set to the pedestal voltage V _P, the extension of the synchronization signal V _S is achieved.

This synchronizing signal expander is provided with an expansion circuit 22 composed of a first differential amplifier installed on the output side of the clamp circuit 18, and an amplification circuit 2 composed of a second differential amplifier in the subsequent stage.
It is equipped with 4.

The expansion circuit 22 constitutes a differential amplifier including a first transistor 26, a second transistor 28, a first resistor 30, a second resistor 32, and a first constant current source 34. Is an amplifier in which a constant amplification gain is set by resistors 30 and 32 on the emitter and collector sides, and a voltage source 20 is provided at its base.
Is set to a constant pedestal potential V _P. Therefore, the decompression circuit 22 causes the transistor 26 to be in the conductive state, the transistor 28 to be in the disconnected state, and the synchronous state in the signal portion V _V (the signal portion representing the image excluding the synchronization signal V _S ) that exceeds the pedestal potential V _P of the video signal V _IN. In the portion of the signal V _S , the transistor 26 is in the cutoff state, and the transistor 28 is
Becomes conductive. The operation of each of the transistors 26 and 28 is performed as an amplifying operation of the differential amplifier, and the transistor 28 constitutes an amplifier having a constant gain. Therefore, the conduction state of the transistor 28 is the level of the synchronization signal V _S. The amplification operation is performed, and the level of the synchronization signal V _S is extended by the amplification operation.

Further, the amplifier circuit 24 includes the resistor 30 in common as a load resistor, and the third and fourth transistors 36, 38,
The differential amplifier is composed of a third resistor 40 and second and third constant currents 42 and 44. Transistor 36
A pedestal potential V _P is applied from the voltage source 20 to the base of, and a video signal V _IN is applied from the clamp circuit 18 to the base of the transistor 38. Therefore, the amplifier circuit 24 amplifies and outputs the video signal V _IN set to the pedestal potential V _P by the clamp circuit 18.

Therefore, at the output terminal 46, the output of the expansion circuit 22 and the output of the amplifier circuit 24 are obtained, and both outputs are added and taken out.

Therefore, assuming that the resistance values of the resistors ₃₀ and ₃₂ are R ₃₀ and R ₃₂ , the expansion gain G _S of the expansion circuit 22 is G _S ≈R ₃₀ / R ₃₂ (1), and only the expansion circuit 22 outputs When the the V _SO, output V _{SO is, V SO = G S · V} S ≒ (R 30 / R 32) · V iN becomes (2).

Further, assuming that the resistance value of the resistor 40 is R ₄₀ , the amplifier circuit 24
The amplification gain G _{A of the above} is G _A ≈R ₃₀ / R ₄₀ (3), and _assuming that the output of only the amplifier circuit 24 is V _VO , the output V _VO is V _VO = G _A · V _IN ≈ ( R ₃₀ / R ₄₀ ) ・ V _IN (4)

Therefore, the output V _OUT taken out from the output terminal 46 is
Is V _OUT = {(R ₃₀ / R ₃₂ ) + (R ₃₀ / R ₄₀ )} · V _IN (5), and the expansion rate X is X = V _OUT / V _VO = {(R ₃₀ / R ₃₂ ) + (R ₃₀ / R ₄₀ )} / (R ₃₀ / R ₄₀ ) = 1 + R ₄₀ / R ₃₂ (6), which is a constant value determined by the resistance values R ₄₀ and R ₃₂ .

In this way, the expansion rate X of the synchronization signal V _S is set to a constant value by a constant gain, so the level of the expanded synchronization signal V _S ′ corresponds to the level of the original synchronization signal V _S. Therefore, the correlation with the level of the signal V _V representing an image is not damaged.

In such a synchronizing signal expander, the amplification gain G _A of the amplifier circuit 24 is set to 1 and the input terminal 16 is connected to the A of FIG.
When the video signal V _IN shown in FIG. 2 is applied, a video signal output V _OUT obtained by expanding the synchronizing signal V _S is obtained at the output terminal 46, as shown in B of FIG. In this case, ΔV
_S represents the extension width of the synchronization signal _{V S} that is extended by extension rate _{X (V S '-V S)} .

Further, since the decompression circuit 22 can share the resistor 30 with the amplification circuit 24 and also can share the voltage source 20 on the clamp circuit 18 side, which is an essential means in the processing system of the video signal V _IN , the existing circuit is used. And can be easily configured.

〔The invention's effect〕

As described above, according to the present invention, the synchronization signal detected from the video signal with reference to the pedestal potential is expanded with a constant gain. Therefore, it is possible to stably expand the synchronization signal level with a simple configuration. In addition, the sync signal can be expanded according to the original sync signal level without impairing the correlation with the signal level representing an image.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a sync signal expander of the present invention, FIG. 2 is a view showing expansion of a sync signal by the sync signal expander shown in FIG. 1, and FIG. 3 is a conventional sync signal. It is a block diagram which shows an expander. 14 ... Capacitor 18 ... Clamp circuit 20 ... Voltage source 22 ... Expansion circuit (first differential amplifier) 24 ... Amplification circuit (second differential amplifier) 26 ... First transistor 28 ... Second transistor 30 ... First resistor 32 ... Second resistor 34 ... First constant current source 36 ... Third transistor 38 ... Fourth transistor 40 ... Third resistor 42 ... … Second constant current source 44 …… Third constant current source

Claims (1)

[Claims] 1. A clamp circuit for receiving a video signal from which a direct current component is removed by a capacitor and setting a synchronizing signal to a pedestal potential by a voltage source, a first transistor, a first resistor on the collector side, and a first resistor on the emitter side. A first constant current source is connected to a differential pair formed by connecting a second transistor in parallel with a second resistor interposed in series to flow an operating current, and the operating current is supplied to the base of the first transistor. The video signal is input from the clamp circuit,
A first differential amplifier in which the pedestal potential is set from the voltage source to the base of the second transistor and a base and a collector are commonly connected to the second transistor, and a second constant amplifier is provided on the emitter side. A third transistor to which a current source is connected; a fourth transistor in which a base and a collector are commonly connected to the first transistor and a third constant current source is connected to the emitter side. And a second differential amplifier in which the emitter of the fourth transistor is shared by a third resistor, and the synchronization is based on the pedestal potential from the collector side of the second and third transistors. A synchronizing signal decompressor characterized by extracting a video signal output whose signal level is decompressed.