JPH0349503Y2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field] This invention relates to a level adjustment circuit for video signals, and in particular to a video synchronization signal expander that expands a synchronization signal included in a video signal to a predetermined level. It is related to.

[Background technology and its problems]

Video signals reproduced from magnetic recording and reproducing devices (VTRs), etc., are subject to distortion in the recording/reproducing system, nonlinear characteristics of demodulation circuits, and dynamic range characteristics of amplifiers, clamp circuits, etc. There is a "sink blockage" in which the signal level shrinks.

When such a sink clog occurs, for example, the first
As shown in the figure, it is composed of an amplifier 1, a clamp circuit 2, and a clip circuit 3.
A sink that automatically controls the video signal level using the synchronization signal level clipped by
When the video signal [A] causing the sink jam is input to the AGC circuit, the gain of amplifier 1 will increase, so the white level of the output video signal [B] will be higher than the predetermined level. A phenomenon occurs.

Then, when such a video signal [B] is modulated by the FM modulation circuit 4 and recorded again, the frequency deviation becomes excessive, causing a deterioration of the S/N ratio and the occurrence of a moiré phenomenon.

Furthermore, even if the image is clipped at the white level, there is a problem in that the image becomes smeary and the waveform characteristics such as Kpd deteriorate.

[Purpose of invention]

This idea was made in view of the actual situation, and it is a video synchronization signal expander that corrects synchronization blockage of the synchronization signal included in the video signal so that a constant V/S ratio can always be obtained. This is what we provide.

[Summary of the idea]

In this invention, a negative feedback circuit is constructed by an amplifier that amplifies a video signal, a clamp circuit that clamps the video signal, and a circuit that clips a synchronization signal at a predetermined level from the signal level clamped by the clamp circuit. However, the amount of feedback to the amplifier is controlled by the output signal obtained from the clip circuit so that the amount of feedback is reduced only during the synchronization signal period.

Therefore, even if there is a synchronization blockage in the input video signal, the synchronization signal part can be expanded according to the amount of compression, so at least the output of this video synchronization signal expander can maintain synchronization at a predetermined level. A video signal with a signal can be obtained.

Furthermore, when this video signal is input to the sync AGC circuit, a video signal having a constant V/G ratio (V: picture level, S: sync level) can be obtained from the sync AGC circuit.

〔Example〕

FIG. 2 shows a block diagram of a video synchronizing signal expander showing an embodiment of this invention, in which 10 is a video signal input terminal, 11 is an adder circuit, 12 is an amplifier, 13 is a clamp circuit, and 14 is a 15 is a negative feedback voltage setting circuit; and 16 is an output terminal.

In this block diagram, as shown in FIG. 3, the input video signal Vin is provided in a clamp circuit 13 so that the pedestal level P is constant at the output side of the amplifier 12. Then, it is clipped at clip level C in the clip circuit 14, and the synchronization signal component S shown with diagonal lines is clipped. The negative feedback signal setting circuit 15 sets a negative feedback voltage corresponding to the level of the clipped synchronizing signal component S.
Since ef is supplied to the adder circuit 11, the smaller the clip value of the synchronizing signal component S, the smaller the feedback amount (-
K) becomes smaller, and the gain in this amplification system becomes larger.

Therefore, a video synchronization signal having a predetermined synchronization signal level (e _H ) is obtained from the output terminal 16, as shown by the video signal Vout in FIG.

In this case, the synchronization signal is expanded regardless of the average video signal level (APL) of the input video signal, so a predetermined V/S ratio can be given to the video signal that is causing the sync jam. .

In this circuit, it is preferable to set the clip level C so that a clipped synchronization signal component S is always obtained, but when a video signal having a synchronization signal greater than a predetermined value is input, the feedback rate is If the gain G of the amplifier 12 is set to a constant value (β), the gain G of the amplifier 12 can be set to G=A/1+A(β−x) (where x is a feedback factor proportional to the amount of sink clogging,
A is the gain of amplifier 12).

FIG. 4 is a block diagram showing still another embodiment of this invention, in which the same parts as in FIG. 2 are given the same symbols.

17 is an average value detection circuit for detecting the DC average value of the video signal, 18 is a DC amplifier circuit, and 19 is a set voltage setting circuit.

In this embodiment, the average video signal level (APL) is detected from the video signal clamped by the clamp circuit 13 in the average value detection circuit 17,
The above-mentioned clip circuit 1 is connected using a voltage value obtained by amplifying this average video signal level (APL) by an appropriate value.
The clip level C of 4 is set.

To further explain this point, as shown in FIG. 5, the standard video signal Vr has a constant synchronization level _eH , but the white level of the image portion varies.

Therefore, its average video signal level (APL)
is at the level shown by the dotted line.

When recording and reproducing such signals, sync jams are generally likely to occur, but these sync jams often occur around the average video signal level (APL) as shown in the video signal Vin. The synchronization signal components S ₃ and S ₄ having a higher white level than the components S ₁ and S ₂ have a greater sync jam.

Therefore, in the embodiment shown in FIG. 4, when such a video signal Vin is input, the average value detection circuit 17
The clip level C of the clip circuit 14 is determined by referring to the average video signal level (APL) output from the clip circuit 14.
change. That is, the video signal in FIG.
As seen in Vout, the clip level C is set to be large in the parts where the white level is high, so the parts of the sync signal components S ₃ and S ₄ are higher than the parts of the sync signal components S ₁ and S ₂ . The amount of clipping becomes smaller.

Therefore, in areas where the white level is high, the amount of feedback is −
K becomes smaller and the overall gain of the amplifier 12 increases. Therefore, a video signal Vout having a synchronization signal equal to that of the standard video signal Vr is obtained from the output terminal 16.

The set voltage setting circuit 19 is provided to set the value of the clip level C depending on the state of sink clogging.

In the above embodiment, a case has been described in which the clamp circuit 13 aligns the pedestal level P of the video signal. However, the clamp circuit 13 clamps the peak of the synchronization signal and clips the synchronization signal component using the pedestal level P as a reference. , the feedback amount (-K) may be set based on the clipped voltage value.

Further, the clamp circuit 13 may be configured to be connected to the input terminal 10 side.

[Effect of idea]

As explained above, the video sync signal expander of this invention detects the level of the sync signal of the video signal using a clamp circuit and a clip circuit, and controls the amount of feedback to the amplifier based on the detected value. Therefore, there is an effect that it is possible to easily adjust a video signal with a sync jam to a predetermined V/S ratio.

Therefore, it is possible to prevent deterioration of the waveform characteristics of the recording/reproducing system caused by sync jam.

In addition, by combining it with a sink AGC circuit and a synchronization signal isolator circuit, it is possible to correct the V/S ratio to a constant value and to operate stably even when the threshold level fluctuates. It has the advantage of being

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram for explaining the operation of the sink AGC circuit, Fig. 2 is a block diagram showing an embodiment of the video synchronization signal expander of this invention, and Fig. 3 is a circuit diagram for explaining the operation of the sync AGC circuit.
FIG. 4 is a block diagram showing another embodiment of the invention, and FIG. 5 is a waveform diagram explaining the operation of FIG. 4. In the figure, 11 is an adder circuit, 12 is an amplifier, 13 is a clamp circuit, 14 is a clip circuit, and 15 is a negative feedback voltage setting circuit.

Claims (1)

[Scope of utility model registration request] A clamp circuit that clamps the video signal and a clip circuit that clips a synchronization signal from the signal clamped by the clamp circuit are provided in the feedback path of the amplifier that amplifies the video signal, and the output of the clip circuit is used to power the amplifier. A video synchronization signal expander characterized in that the amount of feedback to the video signal is reduced only during the synchronization signal period.