JPH0645471A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH0645471A
JPH0645471A JP4194427A JP19442792A JPH0645471A JP H0645471 A JPH0645471 A JP H0645471A JP 4194427 A JP4194427 A JP 4194427A JP 19442792 A JP19442792 A JP 19442792A JP H0645471 A JPH0645471 A JP H0645471A
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
soldered
base stem
cap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4194427A
Other languages
Japanese (ja)
Inventor
Kenji Watanabe
謙二 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4194427A priority Critical patent/JPH0645471A/en
Publication of JPH0645471A publication Critical patent/JPH0645471A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To reduce the whole area of a hybrid integrated circuit device to enhance the packaging density of the device by loading a base stem and a cap or the two sides of the base stem with two hybrid integrated circuit substrates. CONSTITUTION:A hybrid integrated circuit substrate 4 is soldered to a base stem 2, and a lead 5 soldered to a connecting terminal pattern 14 is soldered to a connecting terminal 8 of an external circuit board 7. Further, the surface of the substrate 4 is loaded with a transistor 10 and a capacitor 11 connected together using a strip line 20, and a resistor 12 is formed between the strip line 20 and the pattern 14. On the other hand, the upper surface of the base stem 2 is loaded with the back of a cap 1 for microwave shutting, another hybrid integrated circuit substrate 3 is soldered on to the cap 1, and further a lead 6 is soldered to the pattern 8 of the board 7, while in similar to the board 4 the surface of the board 3 is loaded with a transistor, capacitor, and resistor. Thus, the packaging density of the device can be improved, a predetermined heat dissipation effect can be achieved, and also the high frequency coupling can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は混成集積回路装置に係わ
り、特にマイクロ波用混成集積回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a microwave hybrid integrated circuit device.

【0002】[0002]

【従来の技術】従来のマイクロ波用混成集積回路装置の
構造は図3に示すように、ベースステム2の上に混成集
積回路基板(例えば、アルミナ基板等の誘電体基板)4
が半田付けされており、混成集積回路基板4の接続端子
パターン14に半田付けされたリード5が外部回路基板
7の接続端子パターン8に半田付けされ、更にベースス
テム2の上面には内部で発生するマイクロ波を遮断する
為のキャップ1が取り付けられている。また混成集積回
路基板4の表面上ではトランジスタ(Tr)16,17
およびコンデンサ18がストリップライン20で接続さ
れて搭載され、ストリップライン20と接続端子パター
ン14との間に抵抗19が形成されている。
2. Description of the Related Art The structure of a conventional hybrid integrated circuit device for microwaves is, as shown in FIG. 3, a hybrid integrated circuit substrate (for example, a dielectric substrate such as an alumina substrate) 4 on a base stem 2.
Are soldered, the leads 5 soldered to the connection terminal patterns 14 of the hybrid integrated circuit board 4 are soldered to the connection terminal patterns 8 of the external circuit board 7, and are internally generated on the upper surface of the base stem 2. A cap 1 for shutting off microwaves is attached. Further, on the surface of the hybrid integrated circuit board 4, transistors (Tr) 16, 17 are provided.
A capacitor 18 is connected and mounted by a strip line 20, and a resistor 19 is formed between the strip line 20 and the connection terminal pattern 14.

【0003】また図4に示す従来技術の場合は、表面に
上記回路部品を搭載した一対の混成集積回路基板4の基
板裏面メタライズ21どうしを半田付けすることによっ
て全体の面積を小さくして実装密度の向上を図ったもの
である。
Further, in the case of the conventional technique shown in FIG. 4, the entire surface area is reduced by soldering the backside metallizations 21 of the pair of hybrid integrated circuit boards 4 having the above-mentioned circuit components mounted on the front surface, thereby reducing the mounting density. It is intended to improve.

【0004】[0004]

【発明が解決しようとする課題】上記図3に示す従来の
マイクロ波用混成集積回路装置では、同一平面上で回路
を構成するために更に面積を小さくすることは困難であ
った。一方、更に面積を小さくする為に、図4に示すよ
うに一対の混成集積回路基板の裏面どうしを貼り合わせ
たものは、マイクロ波特に約1GHz以上の周波数の動
作ではうまく接地がとれず特性が不安定になったり、発
熱の大きいトランジスタ等の半導体素子を使う場合には
放熱の点で使用できないという問題が生じた。
In the conventional hybrid integrated circuit device for microwaves shown in FIG. 3, it is difficult to further reduce the area because the circuits are formed on the same plane. On the other hand, in order to further reduce the area, as shown in FIG. 4, the one in which the back surfaces of a pair of hybrid integrated circuit substrates are bonded together has a characteristic that the ground cannot be properly grounded in the operation of microwaves, especially at a frequency of about 1 GHz or more. When the semiconductor element such as a transistor that becomes unstable or generates a large amount of heat is used, there is a problem that it cannot be used in terms of heat dissipation.

【0005】[0005]

【課題を解決するための手段】本発明の特徴は、ベース
ステムとキャップとを有する特にマイクロ波用の混成集
積回路装置において、前記ベースステムに第1の混成集
積回路基板を搭載し、前記キャップに第2の混成集積回
路基板を搭載した混成集積回路装置にある。
A feature of the present invention is that in a hybrid integrated circuit device having a base stem and a cap, particularly for microwaves, a first hybrid integrated circuit substrate is mounted on the base stem, and the cap is provided. In the hybrid integrated circuit device, the second hybrid integrated circuit board is mounted.

【0006】本発明の他の特徴は、ベースステムとキャ
ップとを有する特にマイクロ波用の混成集積回路装置に
おいて、前記ベースステムの上面と下面にそれぞれ第1
および第2の混成集積回路基板を搭載した混成集積回路
装置にある。
Another feature of the present invention is a hybrid integrated circuit device having a base stem and a cap, particularly for microwaves.
And a hybrid integrated circuit device equipped with a second hybrid integrated circuit board.

【0007】[0007]

【実施例】次に図面を用いて本発明を説明する。The present invention will be described below with reference to the drawings.

【0008】図1は本発明の第1の実施例のマイクロ波
用混成集積回路装置を示す図であり、図1(a)は外観
斜視図、図1(b)は図1(a)をX−X’部で切断し
矢印Aの方向を視た断面図、図1(c)は図1(a)を
a−b−c−d部で切断し下方向(ベースステム方向)
を視た平面図である。
FIG. 1 is a diagram showing a hybrid integrated circuit device for microwaves according to a first embodiment of the present invention. FIG. 1 (a) is an external perspective view, and FIG. 1 (b) is FIG. 1 (a). A cross-sectional view taken along the line XX ′ and viewed in the direction of arrow A. FIG. 1C is a cross-sectional view taken along the line ab-cd of FIG.
It is the top view which looked at.

【0009】ベースステム2の上に第1の(ベースステ
ム側の)混成集積回路基板4が半田付けされており、混
成集積回路基板4の接続端子パターン14に半田付けさ
れたリード5が外部回路基板7の接続端子パターン8に
半田付けされ、また混成集積回路基板4の表面上ではト
ランジスタ(Tr)10およびコンデンサ11がストリ
ップライン20で接続されて搭載され、ストリップライ
ン20と接続端子パターン14との間に抵抗12が形成
されている。一方、ベースステム2の上面に内部で発生
するマイクロ波を遮断する為に取り付けられているキャ
ップ1の裏面(下面には第2の(キャップ側の)混成集
積回路基板3が半田付けされており、第1の混成集積回
路基板4と同様に、混成集積回路基板3の接続端子パタ
ーンに半田付けされたリード6が外部回路基板7の接続
端子パターン8に半田付けされ、また第2の混成集積回
路基板3の表面上ではトランジスタおよびコンデンサが
ストリップラインで接続されて搭載され、ストリップラ
インと接続端子パターンとの間に抵抗が形成されてい
る。
The first (base stem side) hybrid integrated circuit board 4 is soldered on the base stem 2, and the leads 5 soldered to the connection terminal patterns 14 of the hybrid integrated circuit board 4 are external circuits. Soldered to the connection terminal pattern 8 of the substrate 7, and on the surface of the hybrid integrated circuit substrate 4, the transistor (Tr) 10 and the capacitor 11 are connected and mounted by the strip line 20, and the strip line 20 and the connection terminal pattern 14 are mounted. A resistor 12 is formed between them. On the other hand, the back surface of the cap 1 attached to the upper surface of the base stem 2 for blocking microwaves generated inside (the second (cap side) hybrid integrated circuit board 3 is soldered to the lower surface). Similarly to the first hybrid integrated circuit board 4, the leads 6 soldered to the connection terminal patterns of the hybrid integrated circuit board 3 are soldered to the connection terminal patterns 8 of the external circuit board 7, and the second hybrid integrated circuit board On the surface of the circuit board 3, transistors and capacitors are connected and mounted by strip lines, and resistors are formed between the strip lines and the connection terminal patterns.

【0010】このマイクロ波用混成集積回路装置の設計
製造において、電力が小さく発熱の小さい半導体素子を
有する回路(例えば、送信用増幅器の場合は前段部、受
信用増幅器の場合は初段部)を第2の混成集積回路基板
3に構成してキャップ1に半田付けし、電力が大きく発
熱の大きい半導体素子を有する回路を第1の混成集積回
路基板4に構成してベースステム2に半田付けし、第1
の混成集積回路基板4からのリード5と第2の混成集積
回路基板3からのリード6とが近接重畳しないようにた
がいに反対側面に取り出すことにより、リード端子間の
高周波結合が発生しないようにしている。
In the design and manufacture of this hybrid integrated circuit device for microwaves, a circuit having a semiconductor element with low power and low heat generation (for example, a front stage part in the case of a transmission amplifier, a first stage part in the case of a reception amplifier) is 2 is formed on the hybrid integrated circuit board 3 and soldered to the cap 1, and a circuit having a semiconductor element with large power and large heat generation is formed on the first hybrid integrated circuit board 4 and soldered to the base stem 2. First
The lead 5 from the hybrid integrated circuit board 4 and the lead 6 from the second hybrid integrated circuit board 3 are taken out on the opposite side so that they do not closely overlap each other so that high frequency coupling between lead terminals does not occur. ing.

【0011】次に本発明の本発明の第2の実施例のマイ
クロ波用混成集積回路装置を図2を参照して説明する。
図2(a)は外観斜視図であり、図2(b)は図2
(a)をX−X’部で切断し矢印Aの方向を視た断面図
である。
Next, a microwave hybrid integrated circuit device according to a second embodiment of the present invention will be described with reference to FIG.
2 (a) is an external perspective view, and FIG. 2 (b) is shown in FIG.
It is sectional drawing which saw (a) by the XX 'part and looked at the direction of the arrow A.

【0012】表面上にトランジスタおよびコンデンサが
ストリップラインで接続されて搭載され、ストリップラ
インと接続端子パターンとの間に抵抗が形成されている
第1の混成集積回路基板4の裏面メタライズ部をベース
ステム2の上面に半田付けし、同様に表面上にトランジ
スタおよびコンデンサがストリップラインで接続されて
搭載され、ストリップラインと接続端子パターンとの間
に抵抗が形成されている第2の混成集積回路基板15の
裏面メタライズ部をベースステム2の下面に半田付け
し、ベースステム2の上面には内部で発生するマイクロ
波を遮断する為のキャップ1が取り付けられている。そ
してこの実施例では、両方の混成集積回路基板4,15
の接続端子パターンに共通に半田付けされたリード22
が外部回路基板7の接続端子パターン8に半田付けされ
ている。
A base metallization portion of the back surface metallized portion of the first hybrid integrated circuit board 4 on which transistors and capacitors are connected and mounted by strip lines on the front surface and a resistor is formed between the strip lines and the connection terminal pattern. The second hybrid integrated circuit board 15 which is soldered to the upper surface of 2 and is similarly mounted with the transistor and the capacitor connected by the strip line on the surface, and the resistor is formed between the strip line and the connection terminal pattern. The back surface metallized portion is soldered to the lower surface of the base stem 2, and the cap 1 for blocking the microwave generated inside is attached to the upper surface of the base stem 2. And in this embodiment, both hybrid integrated circuit boards 4, 15 are
22 commonly soldered to the connection terminal pattern of
Is soldered to the connection terminal pattern 8 of the external circuit board 7.

【0013】[0013]

【発明の効果】以上説明したように、本発明では第1お
よび第2の混成集積回路基板をベースステムとキャップ
に、もしくはベースステムの表裏両面にそれぞれ搭載し
たものであるから、全体の面積が縮小し実装密度が向上
しかつ所定の放熱効果を得ることができる。
As described above, according to the present invention, the first and second hybrid integrated circuit boards are mounted on the base stem and the cap, or on the front and back surfaces of the base stem, respectively. The size can be reduced, the packaging density can be improved, and a predetermined heat radiation effect can be obtained.

【0014】さらに、図1に示す第1の実施例では各混
成集積回路基板からのリードがたがいに反対方向に取り
出しているから高周波の結合をより防止することがで
き、一方、図2に示す第2の実施例では両混成集積回路
基板をベースステムの表裏両面に搭載したものであるか
ら接地をより確実にとることができより安定な高周波特
性とすることができる。
Furthermore, in the first embodiment shown in FIG. 1, since the leads from each hybrid integrated circuit board are taken out in the opposite direction, the high frequency coupling can be further prevented, while the one shown in FIG. In the second embodiment, since both hybrid integrated circuit boards are mounted on both front and back surfaces of the base stem, grounding can be ensured more reliably and more stable high frequency characteristics can be obtained.

【0015】本発明によれば、携帯電話のセットの小型
化に応じ、使用する部品の小型化の要請に答えて増幅器
用のモジュールの縮小化を図ることができる。
According to the present invention, the module for the amplifier can be downsized in response to the request for downsizing of the parts to be used in accordance with the downsizing of the set of the mobile phone.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す図である。FIG. 1 is a diagram showing a first embodiment of the present invention.

【図2】本発明の第2の実施例を示す図である。FIG. 2 is a diagram showing a second embodiment of the present invention.

【図3】従来技術を示す図である。FIG. 3 is a diagram showing a conventional technique.

【図4】他の従来技術を示す図である。FIG. 4 is a diagram showing another conventional technique.

【符号の説明】[Explanation of symbols]

1 キャップ 2 ベースステム 3,4,15 混成集積回路基板 5,6,22 リード 7 外部回路基板 8 外部回路基板の接続端子パターン 10,16,17 トランジスタ 11,18 コンデンサ 12,19 抵抗 14 混成集積回路基板の接続端子パターン 20 ストリップライン 21 基板裏面メタライズ部 1 Cap 2 Base Stem 3, 4, 15 Hybrid Integrated Circuit Board 5, 6, 22 Lead 7 External Circuit Board 8 External Circuit Board Connection Terminal Pattern 10, 16, 17 Transistor 11, 18 Capacitor 12, 19 Resistor 14 Hybrid Integrated Circuit Board connection terminal pattern 20 Stripline 21 Backside metallization part

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H05K 1/18 G 9154−4E ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location H05K 1/18 G 9154-4E

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ベースステムとキャップとを有する混成
集積回路装置において、前記ベースステムに第1の混成
集積回路基板を搭載し、前記キャップに第2の混成集積
回路基板を搭載したことを特徴とする混成集積回路装
置。
1. A hybrid integrated circuit device having a base stem and a cap, wherein a first hybrid integrated circuit board is mounted on the base stem, and a second hybrid integrated circuit board is mounted on the cap. Hybrid integrated circuit device.
【請求項2】 ベースステムとキャップとを有する混成
集積回路装置において、前記ベースステムの上面と下面
にそれぞれ第1および第2の混成集積回路基板を搭載し
たことを特徴とする混成集積回路装置。
2. A hybrid integrated circuit device having a base stem and a cap, wherein first and second hybrid integrated circuit boards are mounted on an upper surface and a lower surface of the base stem, respectively.
JP4194427A 1992-07-22 1992-07-22 Hybrid integrated circuit device Withdrawn JPH0645471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4194427A JPH0645471A (en) 1992-07-22 1992-07-22 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4194427A JPH0645471A (en) 1992-07-22 1992-07-22 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH0645471A true JPH0645471A (en) 1994-02-18

Family

ID=16324423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4194427A Withdrawn JPH0645471A (en) 1992-07-22 1992-07-22 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0645471A (en)

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Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19991005