JPH0638493Y2 - IGBT drive circuit - Google Patents
IGBT drive circuitInfo
- Publication number
- JPH0638493Y2 JPH0638493Y2 JP387289U JP387289U JPH0638493Y2 JP H0638493 Y2 JPH0638493 Y2 JP H0638493Y2 JP 387289 U JP387289 U JP 387289U JP 387289 U JP387289 U JP 387289U JP H0638493 Y2 JPH0638493 Y2 JP H0638493Y2
- Authority
- JP
- Japan
- Prior art keywords
- igbt
- voltage
- circuit
- transistor
- coil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
【考案の詳細な説明】 （産業上の利用分野） 本考案はIGBTの駆動回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial application field) The present invention relates to an IGBT drive circuit.
（従来技術と解決すべき問題点） 高い順方向電圧と大きいターンオフ電流をもち高電圧回
路のスイッチング素子として利用される別名IGBT（insu
lated−gate bipolar transistor）と称されるバイポー
ラ型MOS FET（以下IGBTと称す）の代表的な駆動回路と
して、従来第１図および第２図に示す如き方形波交流電
圧を駆動信号とする回路が用いられている。しかしこれ
らの回路には一長一短がある。(Problems to be solved with the prior art) Another name of IGBT (insu) which has a high forward voltage and a large turn-off current and is used as a switching element of a high voltage circuit.
2. Description of the Related Art As a typical drive circuit of a bipolar type MOS FET (hereinafter referred to as “IGBT”) called a “lated-gate bipolar transistor”, a circuit using a square wave AC voltage as a drive signal as shown in FIG. 1 and FIG. It is used. However, these circuits have advantages and disadvantages.
即ち第１図の回路はドライブトランス（１）の１次巻線
N1に駆動信号である方形波交流電圧を印加して２次巻線
N2に方形波交流電圧と相似した電圧を発生させ、これを
抵抗（２）を介してIGBT（３）のゲートに加えて駆動す
るものである。しかしこの回路では駆動信号のデューテ
ィが小さくなると、IGBT（３）をオフする際の逆バイア
ス電圧が低くなってターンオフ時間が長くなるため、IG
BT（３）における損失が大となる欠点がある。That is, the circuit of FIG. 1 is the primary winding of the drive transformer (1).
Applying a square wave AC voltage as a drive signal to N 1
A voltage similar to the square wave AC voltage is generated in N 2 , and this voltage is applied to the gate of the IGBT (3) via the resistor (2) and driven. However, in this circuit, when the duty of the drive signal becomes small, the reverse bias voltage at the time of turning off the IGBT (3) becomes low and the turn-off time becomes long.
There is a drawback that the loss in BT (3) is large.
即ち駆動用方形波交流電圧を示す第３図においてTONを
オン時間、TOFFをオフ時間として繰返し周期Ｔ＝TON＋T
OFFとすれば、第３図（ａ）のようにデューティTON/Tが
大きい場合にはIGBT（３）をオフさせる際充分大きな電
圧を印加でき、簡単な回路により確実な駆動を行いうる
利点がある。That is, in FIG. 3 showing the driving square wave AC voltage, T ON is the ON time and T OFF is the OFF time, and the repetition cycle is T = T ON + T.
If turned OFF , a sufficiently large voltage can be applied when turning off the IGBT (3) when the duty T ON / T is large as shown in Fig. 3 (a), and reliable driving can be performed with a simple circuit. There is.
しかしその一方第３図（ｂ）に示すようにTON/Tが小さ
くなった場合には、ドライブトランス（１）の１次コイ
ルN1に印加される方形波交流電圧の正側と負側の電圧時
間積は等しくなるため、必然的に正側の電圧に対して負
側の電圧レベルは低くなる。このためIGBT（３）のオフ
時ゲート逆バイアス電圧が低くなりターンオフ時の電力
損失が大となる欠点をもつ。On the other hand, when T ON / T becomes smaller as shown in FIG. 3 (b), the positive and negative sides of the square wave AC voltage applied to the primary coil N 1 of the drive transformer (1). Since the voltage-time products of the above are equal, the voltage level on the negative side is inevitably lower than the voltage on the positive side. For this reason, the gate reverse bias voltage when the IGBT (3) is off becomes low, and there is a drawback that the power loss at the time of turn-off becomes large.
また第２図の回路はドライブトランス（１）の１次巻線
N1に加えられた方形波交流電圧に相似した波形の電圧
を、抵抗（４）を介してトランジスタ（５）のベースに
加えてオンオフさせる。そしてトランジスタ（５）のオ
ン時にオンする電界効果トランジスタ（６）（以下FET
と称す）のオンにより、直流電源（７）の電圧を抵抗
（８）を介してIGBT（３）のゲートに印加してこれをオ
ンさせる。一方トランジスタ（５）のオフ時にはFET
（６）をオフ、電界効果型トランジスタ（９）（以下FE
Tと称す）をオンとして、電源（10）の電圧をIGBT
（３）のゲートに逆バイアス電圧として加えてこれをオ
フとし、IGBT（３）のオンオフを繰り返す方法である。The circuit shown in Fig. 2 is the primary winding of the drive transformer (1).
A voltage having a waveform similar to the square wave AC voltage applied to N 1 is applied to the base of the transistor (5) via the resistor (4) and turned on and off. A field effect transistor (6) (hereinafter referred to as FET) which is turned on when the transistor (5) is turned on.
The voltage of the DC power supply (7) is applied to the gate of the IGBT (3) through the resistor (8) to turn it on. On the other hand, when the transistor (5) is off, FET
Turn off (6), field effect transistor (9) (hereinafter FE
(T) is turned on and the voltage of the power supply (10) is set to the IGBT.
In this method, a reverse bias voltage is applied to the gate of (3) to turn it off, and the IGBT (3) is repeatedly turned on and off.
この回路では第１図のようにIGBT（３）のオンオフに必
要となる電圧は、２次巻線N2に誘起された２次電圧から
得ることなく電源（７），（10）によって与えられ、前
記第１図の回路図のようにデューティTON/Tに関係しな
い。従って第４図（ａ）（ｂ）に示すようにIGBT（３）
のゲートに加えられる電圧は、常に一定電圧レベルであ
るので確実な駆動を行いうる。In this circuit, the voltage required to turn on and off the IGBT (3) as shown in Fig. 1 is given by the power supplies (7) and (10) without being obtained from the secondary voltage induced in the secondary winding N 2. , It does not relate to the duty T ON / T as in the circuit diagram of FIG. Therefore, as shown in Fig. 4 (a) and (b), the IGBT (3)
Since the voltage applied to the gate of the device is always at a constant voltage level, reliable driving can be performed.
しかしこの回路は第１図の駆動回路に比べて２つの直流
電源（７）（10）を必要とするばかりか、回路的にも複
雑である難点がある。However, this circuit not only requires two DC power supplies (7) and (10) as compared with the drive circuit shown in FIG. 1, but also has a drawback that the circuit is complicated.
（考案の目的） 本考案は比較的簡単な回路構成により、オン時における
損失を少なくしながら確実にIGBTをオンオフ制御できる
駆動回路の提供を目的とするものである。(Object of the Invention) An object of the present invention is to provide a drive circuit having a relatively simple circuit configuration and capable of reliably controlling the on / off of an IGBT while reducing the loss at the time of on.
（問題点を解決するための本考案の手段） 本考案の特徴とするところはオン期間にIGBTに印加する
ための逆バイアス電圧をIGBTのオン期間にコンデンサに
充電して作っておき、このコンデンサの充電電圧により
充分なバイアス電圧をIBGTに印加できるようにして、確
実なIGBTのオフ動作が行われるようにした点にある。次
に実施例により本考案を詳細に説明する。(Means of the present invention for solving the problem) The feature of the present invention is that the reverse bias voltage for applying to the IGBT during the ON period is charged in the capacitor during the ON period of the IGBT to make the capacitor. The point is that a sufficient bias voltage can be applied to the IBGT by the charging voltage of, and the off operation of the IGBT is surely performed. Next, the present invention will be described in detail with reference to examples.
（実施例） 第５図は本考案の一実施例回路図（第１図，第２図と同
一符号部分は同等部分を示す）である。図において
（１）はドライブトランジスタ、N1は１次巻線である第
１コイル、N2,N3,N4は２次巻線である第2,第3,第４コイ
ルで、その極性は図中「・」印で示す通りである。（1
1）は抵抗、（12）はダイオード、（３）はIGBT、（1
3）はダイオード、（14）は抵抗、（15）はコンデン
サ、（16）は抵抗、（17）はトランジスタ、（18）は抵
抗、（19）はFETである。次にその動作について説明す
る。(Embodiment) FIG. 5 is a circuit diagram of an embodiment of the present invention (the same reference numerals as those in FIGS. 1 and 2 denote the same portions). In the figure, (1) is a drive transistor, N 1 is a first coil that is a primary winding, and N 2 , N 3 and N 4 are second, third and fourth coils that are secondary windings, and their polarities are Is as indicated by the "." Mark in the figure. (1
1) is resistance, (12) is diode, (3) is IGBT, (1
3) is a diode, (14) is a resistor, (15) is a capacitor, (16) is a resistor, (17) is a transistor, (18) is a resistor, and (19) is a FET. Next, the operation will be described.
ドライブトランス（１）に、第１図中に示す方形波交流
電圧が印加されると、第2,第3,第４コイルN2,N3,N4には
第１コイルN1に印加された電圧と相似な波形の電圧がそ
れぞれ発生する。When the square wave AC voltage shown in FIG. 1 is applied to the drive transformer (1), it is applied to the first coil N 1 to the second, third and fourth coils N 2 , N 3 and N 4. The generated voltage is similar to the generated voltage.
そこで第１コイルN1に加えられた電圧が正極性のとき、
第４コイルN4に発生した電圧は抵抗（16）を介してトラ
ンジスタ（17）のベースに印加されてこれをオンとし、
FET（19）をオフ状態に保つ。一方第２コイルN2に生じ
た電圧は、抵抗（11）とダイオード（12）を介してIGBT
（３）のゲートに加えられてこれをオンとする。また第
３コイルN3に生じた電圧は、抵抗（14）とダイオード
（13）を介してコンデンサ（15）に加えられ、これを図
中の極性で充電する。従って第１コイルN1に加えられた
駆動電圧が正であってIGBTがオンしている期間コンデン
サ（15）は充電される。Therefore, when the voltage applied to the first coil N 1 has a positive polarity,
The voltage generated in the fourth coil N 4 is applied to the base of the transistor (17) via the resistor (16) to turn it on,
Keep FET (19) off. On the other hand, the voltage generated in the second coil N 2 is transferred to the IGBT via the resistor (11) and the diode (12).
It is added to the gate of (3) to turn it on. Further, the voltage generated in the third coil N 3 is applied to the capacitor (15) via the resistor (14) and the diode (13) to charge it with the polarity shown in the figure. Therefore, the capacitor (15) is charged while the driving voltage applied to the first coil N 1 is positive and the IGBT is on.
次に第１コイルN1に加えられる駆動用方形波交流電圧が
負の期間において、第４コイルN4に生じた電圧は、抵抗
（16）を介してトランジスタ（17）のベースに加えられ
てこれをオフとする。このためコンデンサ（15）の充電
電圧が、抵抗（18）を介してFET（19）のゲートに加え
られてこれをオンとする。その結果コンデンサ（15）の
充電電圧によりIGBT（３）のゲート・エミッタ間にIGBT
（３）を逆バイアスする充分な電圧が一気に印加され、
IGBT（３）を急激にオフとする。Next, during a period in which the driving square wave AC voltage applied to the first coil N 1 is negative, the voltage generated in the fourth coil N 4 is applied to the base of the transistor (17) via the resistor (16). Turn this off. Therefore, the charging voltage of the capacitor (15) is applied to the gate of the FET (19) via the resistor (18) to turn it on. As a result, the IGBT between the gate and emitter of the IGBT (3) is charged by the charging voltage of the capacitor (15).
A sufficient voltage to reverse bias (3) is applied all at once,
The IGBT (3) is turned off rapidly.
即ち本考案ではIGBT（３）のオン期間中にコンデンサ
（15）を充電しておき、これによりIGBT（３）のオフに
必要とされる充分なレベルの逆バイアス電圧を供給する
ようにしているので、第６図（ｂ）に示すようにデュー
ティTON/Tが小さい場合にも確実なIGBT（３）のオンオ
フ駆動が可能となり、IGBTにおけるターンオフ電力損失
の低減が可能となる。That is, in the present invention, the capacitor (15) is charged during the ON period of the IGBT (3) so that the reverse bias voltage of a sufficient level required for turning off the IGBT (3) is supplied. Therefore, as shown in FIG. 6B, the on / off drive of the IGBT (3) can be performed reliably even when the duty T ON / T is small, and the turn-off power loss in the IGBT can be reduced.
（考案の効果） 以上のように本考案によれば、簡単な回路で駆動方形波
交流電圧のデューティサイクルに関係なくIGBTを確実に
オンオフ駆動でき、しかも電力損失を大幅に低減できる
すぐれた効果を有する。(Effect of device) As described above, according to the present invention, it is possible to reliably drive the IGBT on and off with a simple circuit regardless of the duty cycle of the driving square-wave AC voltage, and to significantly reduce power loss. Have.
【図面の簡単な説明】 第１図および第２図は従来の回路例図、第３図および第
４図はその動作説明用の波形図、第５図は本考案の一実
施例回路図、第６図は本考案の動作説明用の波形図であ
る。 （１）……ドライブトランス、N1……１次巻線、N2,N3、
N4……２次巻線である第2,第3,第４巻線、（２）（４）
（８）（11）（14）（16）……抵抗、（３）……IGBT、
（６）（９）（19）……FET、（17）……トランジス
タ、（７）（10）……直流電源、（12）（13）……ダイ
オード、（15）……コンデンサ。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 and FIG. 2 are examples of a conventional circuit, FIGS. 3 and 4 are waveform diagrams for explaining the operation thereof, and FIG. 5 is a circuit diagram of an embodiment of the present invention. FIG. 6 is a waveform diagram for explaining the operation of the present invention. (1) …… Drive transformer, N 1 …… Primary winding, N 2 , N 3 ,
N 4 ...... Second, second, third, and fourth windings, (2) (4)
(8) (11) (14) (16) …… Resistance, (3) …… IGBT,
(6) (9) (19) …… FET, (17) …… transistor, (7) (10) …… DC power supply, (12) (13) …… diode, (15) …… capacitor.
───────────────────────────────────────────────────── フロントページの続き (72)考案者 大橋 靖生 東京都千代田区内幸町１丁目１番６号 日 本電信電話株式会社内 (72)考案者 鍬田 豊 東京都千代田区内幸町１丁目１番６号 日 本電信電話株式会社内 (56)参考文献 特開 昭62−137915（ＪＰ，Ａ) 実開 昭59−193027（ＪＰ，Ｕ) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuo Ohashi 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation (72) Inventor Yutaka Kuda 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation (56) References JP-A-62-137915 (JP, A) Practical use Sho-59-193027 (JP, U)
Claims (1)
る１次巻線である第１コイルと２次巻線である第2,第3,
第４コイルとを備えたドライブトランスと、 前記第２コイル間に直列に抵抗と前記方形波交流電圧の
正極性時順方向となるダイオードとIGBTのゲート・エミ
ッタ間が接続された第１回路と、 前記第４のコイルに抵抗を介してベース・エミッタ間が
接続されコレクタが抵抗を介して前記第１回路のIGBTの
エミッタ側に接続されたトランジスタと、 該トランジスタのエミッタ側にソースが、コレクタ側に
ゲートがそれぞれ接続され、かつドレインが前記第１回
路のIGBTのゲートに接続されたFETとよりなる第２回路
と、 前記第３コイル間に直列に抵抗と前記方形波交流電圧の
正極性時順方向となるダイオードとコンデンサが接続さ
れ、かつ該コンデンサの正極性の一端が前記第１回路の
IGBTのエミッタに接続され、他端が前記第２回路のトラ
ンジスタのエミッタ側に接続された第３回路とを備え、 前記方形波交流電圧の正極性電圧により前記トランジス
タと前記IGBTをオンすると共にこのオン期間中前記コン
デンサを充電し、方形波交流電圧の負極性時に前記トラ
ンジスタをオフして前記FETをオンし、前記IGBTのゲー
トの電位を下げると共に前記コンデンサの充電電圧を逆
バイアス電圧として、前記IGBTのエミッタに印加して該
IGBTをオフさせるようにしたことを特徴とするIGBT駆動
回路。1. A first coil which is a primary winding to which a square wave AC voltage which is a drive signal is applied, and second and third secondary windings,
A drive transformer including a fourth coil; a first circuit in which a resistor and a diode that is in a forward direction when the square wave AC voltage is positive and a gate and an emitter of the IGBT are connected in series between the second coil; A transistor having a base and an emitter connected to the fourth coil through a resistor and a collector connected to the emitter side of the IGBT of the first circuit via a resistor; and a source on the emitter side of the transistor and a collector. A second circuit having a gate connected to each side and a drain connected to the gate of the IGBT of the first circuit, and a second circuit, and a resistor and a positive polarity of the square wave alternating voltage in series between the third coil. The diode and the capacitor, which are in the forward direction of time, are connected, and one end of the positive polarity of the capacitor is connected to the first circuit.
A third circuit connected to the emitter of the IGBT and having the other end connected to the emitter side of the transistor of the second circuit, turning on the transistor and the IGBT by the positive voltage of the square wave AC voltage, and The capacitor is charged during the ON period, the transistor is turned off when the square-wave AC voltage is negative, the FET is turned on, the potential of the gate of the IGBT is lowered, and the charging voltage of the capacitor is set as a reverse bias voltage. Apply to the emitter of IGBT
An IGBT drive circuit characterized in that the IGBT is turned off.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP387289U JPH0638493Y2 (en) | 1989-01-19 | 1989-01-19 | IGBT drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP387289U JPH0638493Y2 (en) | 1989-01-19 | 1989-01-19 | IGBT drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0295938U JPH0295938U (en) | 1990-07-31 |
| JPH0638493Y2 true JPH0638493Y2 (en) | 1994-10-05 |
Family
ID=31205892
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP387289U Expired - Lifetime JPH0638493Y2 (en) | 1989-01-19 | 1989-01-19 | IGBT drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0638493Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4784018B2 (en) * | 2001-08-20 | 2011-09-28 | サンケン電気株式会社 | Semiconductor switch gate drive circuit |
-
1989
- 1989-01-19 JP JP387289U patent/JPH0638493Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0295938U (en) | 1990-07-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |