JPH0740785B2 - Multi-channel inverter circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device including a power amplifier for driving a motor and other actuators in addition to a circuit system, and more particularly to improving the power efficiency of these devices, The present invention relates to a suitable means for reducing the size, weight, and economy.

[Conventional technology]

A conventional DC / DC converter device is disclosed in JP-A-54-14.
No. 0153 publication and Hasegawa “Switching regulator design know-how” (published by CQ Publishing) Section 5.4 Specific example of multiple power supply circuit As shown in FIG. 5-16 on page 154 to FIG. 5-20 on page 157, Efforts have been made to stabilize multiple DC outputs. From a large perspective, in the conventional design and development, the power supply device and the amplifier and other devices that are powered by the power supply and are operated separately from each other were made separately, and improvements were made in each field. I came. Therefore, as in the present invention,
There is no idea that the two are integrated and regarded as a new device for improvement.

[Problems to be solved by the invention]

The above-mentioned conventional DC / DC converter device is used exclusively for obtaining direct current or pulsating current output of one polarity. In the case of modulating the signal independently of other outputs, another DC / DC converter for modulation, an inverter, a power amplifier, or the like was connected to the output side. Therefore, when a large number of output channels are independently modulated, the size of the whole is increased and at the same time, the price is significantly increased.

An object of the present invention is to time-divide the output of a single DC / DC converter device to supply power to each of a large number of output channels to make it multi-channel, and at the same time, appropriately set each time-division time width according to each output. The modulation is to obtain multi-channel output independent of each other. Although an application based on this idea has already been filed by the same applicant, the present invention particularly relates to the above-mentioned time width modulation method and provides a more economical and practical means.

[Means for solving problems]

The above object can be achieved by distributing the output of the DC / DC converter (switching regulator power supply circuit) to a plurality of loads via the switching circuit and controlling the switching time width of the switching circuit. First, it will be described that the present invention can be applied to all DC / DC inverter circuits. Conventional circuit systems are classified and shown in the left column of FIG. In principle, these can be integrated into two types of circuit configurations shown in FIGS. 4 and 5 (i). FIG. 4 is a principle diagram of (b), (c) and (d) of FIG.
The figure is (a), (d), (f), (g), (h) of FIG.
FIG. In both figures, the smoothing capacitor C ₀ and the load R are connected from the primary power source V ₁₁ via the inductance L and the switch S _1.
The output current i ₀ flows through the load circuit composed of _L and _L. In FIG. 3 (e), this L is absent, but in this case, the secondary winding inductance of the transformer functions equivalent to this L. Since the operation of FIGS. 4 and 5 is similar, FIG. 4 will be described. The inductance L acts to receive energy from the input V ₁₁ during the period when the contact of the switch S ₁ is in contact with 1, and to discharge this energy toward the output V ₀ during the period when it is in contact with 2. Therefore, switch S ₁ is ON and OF
When the F time width is changed, the amount of energy transmitted to the inductance L changes, so the output V ₀ also changes. That is,
The output cannot be controlled without the inductance L.

From the operating principle of the DC / DC inverter circuit,
Figure like Figure 1, also to Figure 5 modified as FIG. 2, the output current i ₀ is distributed to a plurality of loads by the switch S _2, ON time switch S ₂ is in contact with the contacts By controlling the width and the duty factor, it is possible to obtain multi-channel output. The right column of FIG. 3 also shows the case where a switch S ₂ is provided for each circuit system to provide multiple channels. In order to control the output voltage of each channel, means for properly controlling this switch S ₂ is required. At the same time, it is necessary to control the switch S ₁ to supply the full load with just enough power.

FIG. 6 shows an example of application to a flyback type as an example of the basic configuration of the present invention. The switching circuits 5 to 7 correspond to the respective contacts of the switch S ₂ . R _{L 1 to} R _{L 3} are load impedances of the respective channels. C _{01 to} C ₀₂ are smoothing capacitors that smooth the output voltages V _{01 to} V ₀₄ . The ON time widths of the switching circuits 5 to 7 are the input signals V _{1 to} V _{3 respectively.}
Controlled by. For example, the switching circuit 5
_Conducts when the output voltage V ₀₁ is lower than V ₁ and capacitor C ₀₁
Is charged and the output voltage V ₀₁ rises, and shuts off when V ₁ exceeds V ₁ . Further, thereafter, the switching circuit 5 continues to be in the cut-off state until the switching circuits 6 and 7 and the diode 4 are sequentially turned on. In this way, the switching circuit 5
The operations from 1 to 7 and the diode 4 are sequentially conducted in a cyclic manner.

When the capacitors C ₀₁ to C ₀₃ are charged, the remaining energy flows through the diode 4 and charges the capacitor C ₀₄ . Therefore, the capacitor C ₀₄ terminal voltage V ₀₄ is an index indicating the excess or deficiency of the cycle energy required to charge each channel. Therefore, the output voltage V ₀₄ is connected to the coupling circuit 1
If it is transmitted to the control circuit 2 of the primary switching element S ₁₁ via the control loop to form a control loop for keeping the output voltage V ₀₄ constant, the capacitors C _{01 to} C ₀₃ are always charged without any shortage.

Next, the secondary switching circuits 5 to 7 will be described.

FIG. 7 is a circuit diagram of the principle. Compared to Fig. 6, the primary side circuit, switching circuit 7, and subsequent circuits are
Omitted. L is the secondary coil inductance. When the primary switch S ₁₁ is turned off, a positive voltage v _L is generated at the L end. When this voltage v _L is less than the input voltage V ₁ , the comparator A ₁ generates a signal to close the switch S ₂₁ .
In the opposite case, switch S ₂₁ is open. When the switch S ₁₁ is closed, a current flows from the secondary coil inductance L via the diode D ₁ and charges the capacitor C ₀₁ , so that the output voltage V ₀₁ starts to rise. Ignoring the forward voltage of the diode D _1, the switch S ₁ is closed, so the voltage v
_{L is} also equal to the output voltage V ₀₁ . If the output voltage V ₀₂ is higher than V _{01, the} diode D ₂ is cut off regardless of the operation of the switch S ₂₂ . Due to the rise of the output voltage V ₀₁ , the output of the comparator A ₁ is inverted and the switch S ₁₁ is cut off.
At this time, the voltage v _L jumps up to make the diode D ₂ conductive because the current is cut off. Therefore, the voltage v _L is clamped to the output voltage V _02, and the switch S ₂₂ is also turned off due to the charging of the capacitor C ₀₂ .
Through the above operation, the channels are sequentially turned on from the one having the lowest input voltage, and finally the channel having the highest input voltage is charged. The ON time width of the switches S ₁₂ and S ₂₂ is automatically determined as the time until the output voltage V ₀₁ reaches V ₂₁ , for example.

The main points of the present invention described above are as follows: 1. An output channel switch circuit that automatically charges the output smoothing capacitor by the required amount according to the input voltage. 2. Monitors the charging completion of all output channels to determine the total supply energy. Proper supply control method 3. This means that it can be applied to all DC / DC inverter circuits.

[Action]

In the above-described principle circuit of the present invention shown in FIGS. 1, 2, 6, and 7, each of the multi-channel output circuits sequentially and automatically supplies the required amount of power, and supplies power to all channels. Since the amount is controlled so as not to be insufficient, each channel output can be controlled independently of each other.

As a result, as described in the embodiments, it becomes easy to configure the channel output circuit to be push-pull and obtain an AC output.

That is, by applying the present invention to a conventional DC / DC converter (switching power supply circuit) circuit, its function can be expanded to a multi-channel device including a DC and AC amplification function in addition to a stabilized DC power supply.

〔Example〕

Hereinafter, a specific circuit of the output switching circuit used in the present invention will be described with reference to FIGS. 8 and 9.

FIG. 7 shows a concrete example of the output switching circuit.
For convenience, the forward voltage between the base and emitter of the diode D ₁ and the transistors Q ₂ and Q ₃ (about 0.7 v) is ignored. Voltage v
_{Since the} transistor Q ₃ is cut off while _L is lower than the input voltage V ₁ , the base current of the transistor Q ₂ flows through the resistor R ₁ . If the resistance value of the resistor R ₁ is set to be appropriately low, the transistor Q ₂ will be saturated, and its collector-emitter voltage V _CE will be substantially zero. That is, the transistor Q ₂ operates as a switching element to be turned on. Therefore, V ₀₁ and v _L are equal.
When v _L increases and exceeds V ₁ , transistor Q ₃ conducts,
As a result, the transistor Q ₂ is cut off. Capacitor C ₁
Is a capacitor element that actually prevents the transistor Q ₂ from malfunctioning due to pulse noise superimposed on v _L.

FIG. 9 is a diagram showing the static characteristic measurement results of FIG. The measurement was performed when the input voltage V ₁ was 5v and 10v.

For V ₁ = 5v, V ₀₁ increases linearly with v ₁ while v _L is low, indicating that transistor Q ₂ is in the ON state. When v _L becomes about 5.5v, V ₀₁ plummets toward zero. That is, it indicates that the transistor Q ₂ is cut off. The same applies when V ₁ is 10v.

FIG. 10 shows a case where an enhancement type P-channel MOS transistor is used in place of the bipolar transistor Q ₂ shown in FIG. V _GG denotes a power supply for the gate bias of the transistors Q _4, when the transistor Q ₃ is OFF, and serves to keep the transistor Q ₄ to the ON state. The operation of the transistor Q ₃ is the same as in the case of FIG.

FIG. 11 shows a case where the bipolar transistor Q _{3 of} FIG. 10 is replaced with a P-channel enhancement type MOS transistor Q ₅ of the same kind. The transistor Q _{6 is} also a MOS transistor of the same kind, and a resistor R ₃ and V _GG generate a threshold voltage between its drain and source electrodes. As a result, the source voltage of the transistor Q ₅ (cathode voltage of the diode D ₁₎ just reaches V _1, the transistor Q ₅ is turned on, and cuts off the transistor Q ₄ by short-circuiting between the source and gate of the transistor Q ₄ , Operates similarly to the case of FIG. This circuit
Suitable as a MOS / IC circuit.

FIG. 12 is an embodiment of the present invention in which the present invention is applied to an automatic flyback DC.DC converter.

The primary power source V ₁₁ is switched by the transistor 8 via the primary winding 3-1 of the transformer 3. Reference numeral 2 is a base current control circuit for the transistor 8 and controls the base current by interposing a current control transistor Q ₅ between the winding 3-2 and the base of the transistor 8. Also, the transistor Q ₅ is controlled by the transistor Q ₆ .

Three channels are provided for output. V ₀₁ is a positive DC output,
V ₀₂ is a negative DC output and v ₀₃ is an AC output. In order to obtain positive and negative output voltages, two secondary windings 3-3 with opposite polarities are provided.
And 3-4 are provided. Each output switching circuit is the first
The configuration of the figure is the same. In the AC output circuit, two switching circuits perform push-pull operation. The positive half-wave of v ₀₃ is obtained by the switching circuit via diode D _3, and the negative half-wave is obtained by the switching circuit via diode D ₄ . That is, the two switching circuits perform class B push-pull operation. The function performed by the rectifying circuit and the coupling circuit 1 via the diode 4 in FIG. 6 is as shown in FIG.
The winding 3-5 is substituted. That is, the voltage V of FIG.
₀₄ is a voltage-converted form, which is obtained by rectifying the 3-5 terminal voltage. This is V ₀₄ ′. This V ₀₄ ′ is applied to the base of the transistor Q ₅ via the Zener diode 9.
As a result, V ₀₄ ′ is controlled so that it is almost always fixed at the Zener voltage. In other words, V _{04 in} FIG. 6 is V _{1 to} V
Regardless of whether it is ₃ etc., it works the same as being constantly maintained at a constant level.

FIG. 13 is an operation waveform diagram of FIG. 3 Ke of the load impedance _{R L} 1 _{to R L 3} is each a 10 [Omega. The waveform on the upper side of FIG. 7A is the secondary winding voltage v ₄ , and the waveform on the lower side is the overlapping of the channel currents i _{1 to} i ₃ . In FIG. (A), the waveform when the _{V 01 = 1, V 02 =} -3v, v 03 = 7v.

v ₄ when the waveform is negative, the diodes D ₁ to D ₄ of the secondary side is cut off, during which the primary switch element 8 is ON.
When 8 is turned off, v ₄ is inverted in the positive direction, and the channel with the lowest input voltage is made conductive first, and then flows in the order of the magnitude of the input voltage. In this case, i ₁ , i ₂ , i ₃ flow in this order.

FIG (b) is v ₀₃ when a sine wave input and the rectangular wave v ₃
It is a waveform. At this time, V ₀₁ and V ₀₂ are the same as in (a), + 1v,
It is kept at -3v. From this, it can be seen that DC and AC were arbitrarily obtained from the outputs of the three channels.

It goes without saying that the same operation can be obtained even if the number of channels is increased or decreased as necessary and FETs or other elements are used for each switching transistor. Also, the number of secondary windings may be increased and a plurality of output channels may be connected to any of them as required.

FIG. 14 is a diagram showing the results of measuring the input / output characteristics. v ₀₃ changes substantially linearly with respect to positive and negative changes of v ₃ , and the gain is about 1.
The bending near the origin is similar to the crossover distortion of the conventional class B push-pull circuit, and can be improved by the same means as in the case of class B push-pull. Further, it can be seen that the other channel outputs V ₀₁ , V _02, etc. are not affected by the change in v ₀ .

FIG. 15 is a view showing the result of frequency characteristic measurement of v ₀₃ . The high cutoff frequency is determined by the smoothing capacitor C ₀₃ and the load resistance R _{L 3} . In this case, decreasing C ₀₃ increases the passband width. FIG. 15 shows that the output channel can be used as an AC power amplifier.

The power efficiency of this experimental circuit was about 70%. This value is comparable to that of a normal switching regulator power supply, and shows that the present invention achieves multi-channel DC / AC without impairing the power efficiency of the conventional DC / DC converter device. .

As described above, FIGS. 12 to 15 explain the embodiment of the present invention using the flyback type DC / DC converter.

As already described, the circuit configurations of (b) and (c) of FIG. 3 perform the same principle operation as the above-mentioned flyback type.
The embodiment of the present invention shown in FIGS. 12 to 15 can be applied to the whole.

(A), (d), (f) of FIG. 3 belonging to FIG.
In the cases of (g) and (h), unlike the case of FIG. 4, the output current continuously flows as shown in FIG.

As an example of such a circuit, (g) of FIG. 3 will be taken up, and a second embodiment of the present invention will be described below with reference to FIG.

In FIG. 16, the inductances L ₁ and L ₂ correspond to L in FIG. 2 (b). The magnitude of each input current is
If V ₁ , V ₂ , and V ₃ are large in this order, the channel current is switched and flows in the order of i ₁ , i ₂ , and i ₃ . As in the case of FIG. 12, it is necessary to return to the beginning and repeat after this switching is completed. At this time, unlike the case of FIG. 12, the L ₁ and L ₂ currents always flow continuously, so that this one-step repetition is not automatically performed. The method is to instantly turn on after all channels have been turned on.
Alternatively, the terminals L ₁ and L ₂ may be momentarily short-circuited after _one cycle, and the voltages v ₆ and v ₇ at the terminals L ₁ and L ₂ may be lowered. In FIG. 16, the latter method is implemented. For example, V ₀₄ is set to a voltage higher than V ₁ and v ₃ , so that D ₅ conducts after i ₁ and i ₃ flow. This diode current passes through C ₀₄ and drives transistor Q ₄ . Q ₄ is at all times, cut off.
As a result, v ₆ decreases, and D ₁ conducts and returns to the initial state of repeated conduction during this process. The same applies to the operation of the transistor Q ₅ . Q ₄ and Q ₅ need only conduct as much as necessary to reduce v ₆ and v _7, etc., and are not necessarily completely saturated.

Although the above two embodiments include the concept of the present invention without exception, the circuit configurations as shown in FIGS. 17 to 18 will be given below as an embodiment in which the above embodiments are slightly simplified.
FIG. 19 is a conventional example with respect to FIG. In Figure 19, v _L
The DC voltage V ₀ obtained by rectifying is used as the power source for the amplifiers A ₃ , A _4, etc. Usually, the magnitude of V ₀ is set to be larger than the maximum value of each output V ₀₁ , V _02, etc. As a result, V ₀₁ , V _02, etc. are V ₀
When it is significantly lower than the power consumption, the power consumption in A ₁ , A _2, etc. is significantly higher than the power output to the loads R _{L 1} , R _{L 2,} etc., and the power efficiency is extremely low.

FIG. 17 improves such low power efficiency. That is, for example, when A ₁ is energized, a voltage drop occurs due to the inductance L and V _L decreases. This V _L is the V of the adjacent channel
_If it is lower than ₀₂ , the diode D ₂ is cut off. When the capacitor C ₀₁ is charged and i ₁ decreases, V _L increases and i ₂ decreases.
Begin to run.

In the meantime, the point that i ₁ also continues to flow is different from the description of the present invention up to FIG. 15, but since _VL also changes following each output voltage V ₀₁ , V _02, etc., comparing with FIG. Power efficiency is considerably improved.

FIG. 18 shows the case where emitter followers are used as A ₁ and A ₂ in FIG. While transistor Q ₆ is saturated, v
_L becomes almost equal to V _01, and the charging of capacitor C ₀₁ progresses.
As i ₂₁ decreases, v _L rises, causing transistor Q ₇ to conduct.

It should be noted that the diode 8 and the diode 6 in FIG.
The circuits relating to the diode D ₃ in the figure, the diode D _{5 in} FIG. 11 and the like can be similarly applied.

〔The invention's effect〕

According to the present invention, a conventional DC / DC converter (switching regulator power supply circuit) can be made to have multiple channels of direct current and alternating current.

In other words, PWM (pulse width modulation) type DC and AC power amplifiers with multiple channels are highly efficient, compact, and lightweight.
And a highly economical device.

INDUSTRIAL APPLICABILITY The present invention can be effectively applied to a power amplifier that drives a DC power source, a motor, and various actuators. For example, in fields such as devices such as VTRs and VDDs, various robots, electronic devices for automobiles that require many servo amplifier circuits and actuator drive circuits in addition to circuit systems, power efficiency is good, so there is little heat dissipation problem, small size, The advantages of light weight improve many implementation issues and increase design freedom. Needless to say about economy.

Another advantage is that standardization of the device is easy. That is, since the output channel switch circuit automatically performs the opening / closing operation by itself without depending on the control signal from the other, the number of output channels can be freely increased or decreased. Therefore, many applications can be covered with the combination of the standardized main body and the unitized output channel switch circuit, and the economic effect due to the standardization can be expected.

Further, as an example of a simple effect, it is possible to easily make the output voltage of a commercially available DC stabilized power supply device positively and negatively variable and further increase the power supply to increase its commercial value.

[Brief description of drawings]

FIG. 1 is a basic circuit configuration diagram of one embodiment of the present invention, FIG. 2 is a basic circuit configuration diagram of another embodiment of the present invention, and FIG. 3 is a classification of conventional methods and an example of application of the present invention to them. Comparison diagrams, FIGS. 4 and 5 are principle circuit diagrams of FIG. 3, FIG. 6 is a diagram showing an application example of the present invention, and FIG. 7 is a principle circuit configuration diagram of the switching circuit of FIG. FIG. 8 is a diagram showing a concrete example of the switching circuit of the present invention, FIG. 9 is a diagram showing the static characteristic measurement result of FIG. 8, and FIG. 10 is another concrete example of the present invention. FIG. 11, FIG. 11 is a diagram showing still another specific embodiment of the present invention, and FIG. 12 is a self-excited flyback type of the present invention.
Circuit diagram of one embodiment applied to a DC / DC converter, FIG. 13 is an operation waveform diagram of FIG. 12, FIG. 14 is an input / output static characteristic measurement result diagram of FIG. 12, and FIG. 15 is a frequency characteristic measurement result. FIG. 16, FIG. 16 is a circuit diagram of another embodiment of the present invention, FIGS. 17 and 18 are circuit diagrams of yet another simplified embodiment of the present invention, and FIG. 19 is a conventional diagram for FIG. It is a circuit diagram of. V ₁₁ …… Primary power supply, S ₁ …… Primary switching element, 3 …… Transformer, 6 …… Secondary switching circuit, V _{1 to} V ₃ …… Input signal voltage, C _{01 to} C ₀₅ etc. …… Smoothing capacitor , _{RL 1 to RL 3,} etc .... Load, V _{01 to} V _03, etc .... Output voltage, A _{1 to} A _2, etc .... Comparator, D _{1 to} Dn, etc .... Diode, Q ₁ , Q ₂ ,, ... Etc .... Transistor, i _{2 to} i ₃ etc .. Secondary switch current, v _L , v _{4 to} v ₇ etc .... Voltage applied to the secondary switch, S ₂ …… Required for DC / DC inverter operation Switch, L ₁ ...... Inductance required for DC / DC inverter operation, A ₁ , A _2, etc .... Amplifier.

Claims (4)

[Claims] 1. A primary switching circuit turns on and off a primary power source to supply energy from the primary power source to an impedance element during the on period, and outputs of the impedance elements are connected in parallel during the off period. A multi-channel inverter configured to supply a plurality of rectifier circuits to each rectifier circuit, connect a load circuit including a smoothing capacitor and a load to each rectifier circuit, and rectify and smooth the output of the impedance element to each load. In the circuit, a secondary switching circuit is provided between the rectifier circuit and the load circuit, and each of the secondary switching circuits is set with a reference level equal to the voltage level to be applied to the load connected thereto. The input or output level of the rectifier circuit connected thereto is ON for a period of time equal to or lower than the reference level, and A peak value detection circuit for detecting the output level of the impedance element as a peak value when all of the secondary switching circuits are turned off is provided, and the primary switching circuit is controlled by the peak value detection circuit to detect the peak value. A period during which the primary power supply is turned on is set so that the peak value detected by the circuit becomes a constant level that exceeds any of the reference levels set in the respective secondary switching circuits. A multi-channel inverter circuit, characterized in that the supply of the output of the impedance element is stopped in the order of smaller load of the reference level set in the secondary switching circuit, every time the primary power supply is turned off. 2. A primary switching circuit turns on and off a primary power source at a constant cycle to supply energy from the primary power source to an impedance element, and outputs of the impedance element to a plurality of rectifier circuits connected in parallel with each other. A multi-channel inverter circuit for supplying and rectifying and smoothing the output of the impedance element to each load by connecting a load circuit including a smoothing capacitor and a load to each rectifier circuit. A secondary switching circuit is provided between the load circuit and the load circuit, and each of the secondary switching circuits has a reference level set equal to the voltage level to be applied to the load connected to the secondary switching circuit and is connected to the reference level. The rectifier circuit is turned on during a period when the input or output level of the rectifier circuit is below the reference level, and each of the secondary switching circuits And a peak value detection circuit that detects the output level of the impedance element as a peak value when the impedance element is turned off, and the peak value detection circuit is controlled by the peak value detection circuit. Means for setting the output level to a level lower than any of the reference levels set in the respective secondary switching circuits, and the impedance elements in the order of load having the smaller reference level set in the secondary switching circuits. A multi-channel inverter circuit characterized in that the operation of stopping the supply of output is repeated. 3. A primary switching circuit turns on and off the primary power supply to supply energy from the primary power supply to the impedance element during the on period, and the outputs of the impedance elements are connected in parallel during the off period. A multi-channel inverter configured to supply a plurality of rectifier circuits to each rectifier circuit, connect a load circuit including a smoothing capacitor and a load to each rectifier circuit, and rectify and smooth the output of the impedance element to each load. In the circuit, an amplifying circuit in which the rectifying circuit is connected to a power supply terminal and the load circuit is connected to an output terminal is provided between the rectifying circuit and the load circuit, and the amplifying circuit is connected to the amplifying circuit. A reference level equal to the voltage level to be applied to the load is set, and the input or output level of the rectifying circuit connected to this is set. A peak value detection circuit for detecting the output level of the impedance element as a peak value when the amplifier circuit is turned on for a period equal to or less than a reference level and all of the amplifier circuits are turned off is provided, and the primary switching circuit is the peak value detection circuit. The primary power-on period is set so that the peak value detected by the peak value detection circuit becomes a constant level that exceeds any of the reference levels set in the amplifier circuits. A multi-channel inverter circuit, characterized in that the supply of the output of the impedance element is stopped in the order of increasing load of the reference level set in the amplifier circuit, every time the primary power supply is turned off by the primary switching circuit. . 4. A plurality of rectifier circuits in which the primary power supply is switched on and off at a constant cycle by a primary switching circuit to supply energy to the impedance element, and the outputs of the impedance elements are connected in parallel with each other. A multi-channel inverter circuit for supplying and rectifying and smoothing the output of the impedance element to each load by connecting a load circuit including a smoothing capacitor and a load to each rectifier circuit. An amplifier circuit in which the rectifier circuit is connected to the power supply terminal and the load circuit is connected to the output terminal, respectively, between the load circuit and the load circuit, and each of the amplifier circuits has a voltage to be applied to the load connected thereto. A reference level equal to the level is set, and the rectifier circuit connected to the level is turned on for a period of time equal to or lower than the reference level. And a peak value detection circuit that detects the output level of the impedance element as a peak value when all of the amplifier circuits are turned off, and the peak value detection circuit controls the peak value detection circuit to detect the peak value. And a means for setting the output level of the impedance element to a level lower than any of the reference levels set in the respective amplifier circuits, and the reference level set in the amplifier circuit is set in order from the smallest load. A multi-channel inverter circuit characterized in that the operation of stopping the supply of the output of the impedance element is repeated.