JPH0638456B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an interlayer insulating film for a multilayer wiring.

[Conventional technology]

Conventionally, a silicon nitride film formed by a plasma CVD method has been used as an interlayer insulating film of a multilayer wiring.

[Problems to be Solved by the Invention] The interlayer film of the silicon nitride film formed by the conventional plasma CVD method described above has the following drawbacks.

In the conventional plasma CVD method, the film forming temperature is performed at 300 ° C. or higher. Therefore, a compressive stress is generated in the aluminum wiring due to the difference in the coefficient of thermal expansion from the underlying silicon substrate, and this causes a protrusion called a hillock. There was a drawback that it would occur. Further, in order to avoid hillock generation, when grown at a low temperature, the film becomes fragile, resulting in weak moisture resistance and mechanical strength. Further, when the plasma nitride film is grown directly on the aluminum, there is a drawback that the nitride film swells and is broken by the gas pressure from the surface of the aluminum film during the heat treatment of the subsequent step.

[Means for solving problems]

The method for manufacturing an interlayer insulating film of the present invention has the following method in order to solve the problems of the prior art.

Plasma C is used to prevent hillocks on the first aluminum wiring.
According to the VD method, SiH ₄ and N at a low temperature of 200 ° C. or lower
₂ O is introduced to form a silicon oxide film. Next, in order to improve flatness, spin-on glass is spin-coated on the entire surface and baked at 450 ° C.

Further, SiH ₄ and NH ₃ are introduced at a high temperature of 300 ° C. or higher on the entire surface by plasma CVD to form a solid and dense silicon nitride film having good moisture resistance.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a vertical sectional view of an embodiment of the present invention. An insulating film 2 made of a silicon oxide and a phosphorus glass layer is formed on the main surface of a P-type silicon substrate 1 to have a thickness of about 1.0 μm, and an aluminum wiring 3 of a first layer is formed thereon to have a thickness of about 1 μm. (Fig. 1a) Next, plasma chemical vapor deposition (C
VD) SiH ₄ 100sccm, N ₂ O 1150s
ccm is introduced, and high frequency plasma of 380 kHz is 0.07.
A silicon oxide film 4 having a thickness of 0.5 μm is formed with a power of W / cm ² at a temperature of 200 ° C. or lower (FIG. 1b). Then, a spin coat of Lindove spin-on glass 5 is spin-coated to taper the stepped portion at 350 ° C. 3 each in a nitrogen atmosphere at 450 ° C
Bake for 0 minutes. The heat treatment at this time also serves as an alloy process of aluminum and silicon. (FIG. 1c) Further, SiH ₄ was deposited on the entire main surface by plasma chemical vapor deposition at 150 sccm,
Introducing 450 sccm of NH ₃ and 450 sccm of N ₂ ,
A silicon nitride film 6 is formed to a thickness of 0.5 μm at a temperature of 300 ° C. or higher with a power of 7 W / cm ² (FIG. 1d). Then, a second layer of aluminum wiring 7 is formed to a thickness of about 1.0 μm.

〔The invention's effect〕

As described above, the present invention has the following four effects. First, since the interlayer insulating film has a two-layer structure of an upper layer nitride film and a lower layer oxide film, it is possible to absorb manufacturing variations when forming through holes. That is, in order to improve the step coverage of the second layer aluminum wiring in forming the through hole, the step portion is formed by a combination of isotropic etching and anisotropic etching. At this time, CF ₄ and O ₂
In the isotropic etching, the etching rate of the nitride film and the oxide film has a selection ratio of 10 times or more. Therefore, even if the etching rate of the upper nitride film varies, the etching can be stopped at the lower oxide film surface. Can absorb manufacturing variations.

Next, in order to form the lower oxide film at a low temperature of 200 ° C. or lower,
The thermal stress applied to the entire silicon substrate during film growth can be reduced. Therefore, the compressive stress applied to the aluminum wiring on the substrate can be reduced, and the occurrence of hillocks can be significantly suppressed.

Further, when the lower insulating film is a nitride film as in the conventional method, a blistering phenomenon of the nitride film occurs due to a reaction between the nitride film and aluminum or a gas blown into the aluminum during the heat treatment in the subsequent step. As in the present invention, since the lower layer is an oxide film and is a low-temperature formed film of 200 ° C. or less, it is porous, so that during the heat treatment of spin-on-glass baking in the next step, aluminum in the surface or surface outgas is generated in the oxide film. It can diffuse through and prevent blistering.

Further, since the upper nitride film is formed at a high temperature of 300 ° C. or higher, it can be a film that is hard and dense and has excellent moisture resistance.

[Brief description of drawings]

1 (a) to 1 (e) are longitudinal sectional views of an embodiment of the present invention. 1 ... Silicon substrate, 2 ... Silicon oxide film, 3 ... First layer aluminum wiring, 4 ... Lower layer plasma CVD oxide film, 5 ... Spin-on glass, 6 ... Upper layer plasma CV
D nitride film, 7 ... Second layer aluminum wiring.

Claims (1)

[Claims] 1. After forming a first wiring electrode, a silicon oxide film is formed on the surface by a plasma CVD method at a temperature of 200 ° C. or lower, a spin-on-glass film is spin-coated, heat treated and baked, and A method of manufacturing a semiconductor device, comprising forming a silicon nitride film at a temperature of 300 ° C. or higher by a plasma CVD method.