JPH06338441A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To provide a semiconductor device in which a highaccuracy and fine pattern is formed with good efficiency without increasing manufacturing costs and without any difficulty in manufacturing a reticle and to provide the manufacturing method of the semiconductor device. CONSTITUTION:A photoresist film 14 which has been formed on a semiconductor substrate 11 is exposed via a first reticle 17, in which the width of light-shielding parts 18 used to form a minimum and in which the light-shielding parts 18 and the light-transmitting parts 19 have been formed at the same pitch. Then, the photoresist film is exposed via a second reticle 20 having light-shielding parts 28 whose width is at the width or higher of the light-shielding parts 18 and at an integral multiple or lower of the width or lower of the light-shielding parts 18. After that, the photoresist film is developed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device having a fine pattern and a method for forming the fine pattern.

[0002]

2. Description of the Related Art Conventionally, as a method of forming a fine pattern on a semiconductor substrate, a lithography technique using a reduction projection exposure apparatus has been performed. In this reduction projection exposure method, a predetermined pattern formed on a reticle is transferred to a photoresist coated on a semiconductor substrate through a reduction projection lens and then developed to obtain a fine pattern.

By the way, in recent years, the miniaturization of devices has progressed more and more, and the demand for forming fine patterns at the resolution limit level has increased. Generally, the limit of this theoretical resolution is the numerical aperture (Numerical Aperture:
"NA") is NA, and the wavelength of the light source used is λ, λ / NA for coherent illumination and λ / 2NA for incoherent illumination. Therefore, in order to improve the resolution limit, a method of decreasing the wavelength λ of the light source used or increasing the NA can be considered, but this method is difficult to perform. Further, when a fine pattern at the resolution limit level is formed by reduction projection exposure, there is a problem that dimensional variation in an isolated pattern becomes particularly large. Therefore, it is necessary to absorb this dimensional variation as a design margin, but if this is done, there is a problem that the performance of the semiconductor device is significantly reduced.

Therefore, by providing a shifter for changing the phase of transmitted light by 180 degrees in the light-shielding portion of the reticle, the diffracted light having no phase shift passing through the light transmitting portion of the reticle and the 180-degree phase passing through the phase shifter are provided. Phase shifter methods such as interfering with the diffracted light with a shift, zeroing the light intensity of the light blocking part of the reticle, improving the contrast of the light irradiated on the photoresist on the wafer, and improving the resolution of the fine pattern are available. Has been done.

However, this phase shifter method has a problem that it is difficult to form a phase shifter capable of giving an accurate phase change to transmitted light. further,
There is a problem that the technology is not yet involved because it is still in the development stage of the technology for manufacturing the reticle used for the phase shifter method and the technology for correcting the defects of the reticle. In addition, if there is a boundary between the phase shifters of 0 degree and 180 degrees in the light transmitting portion of the reticle, the diffracted light from the shifter portion and the portion without the shifter interfere, and the photoresist on the wafer is irradiated at the boundary portion. The generated light intensity becomes zero, and there is a problem that the unnecessary photoresist formed in this portion remains. Further, there is a problem that the reticle manufacturing cost is higher than the conventional reticle manufacturing cost, which is not practical.

Then, "NIKKEI MICRODEVICES" November 1991, 73-
As described in “Page 77”, by deforming the shape of the light blocking portion of the light incident on the illumination lens into a donut shape,
Noise on the wafer, which is caused by diffraction by the reticle, is 0
An annular illumination method has been introduced in which the secondary component is removed, and only the light that is involved in image formation is extracted to improve the resolution (critical resolution).

[0007]

However, the above-mentioned annular illumination method can use an existing reticle and has an effective NA.
However, although the resolution limit can be improved, there is a problem that the throughput is significantly reduced due to the decrease in illuminance. The present invention has an object to solve such a conventional problem, and a semiconductor in which a highly accurate fine pattern is efficiently formed without increasing the manufacturing cost and difficulty in manufacturing the reticle. It is an object of the present invention to provide a device and a method for manufacturing this semiconductor device.

[0008]

To achieve this object, the present invention provides a semiconductor device in which a desired pattern is formed on a semiconductor substrate, in which the space width of the pattern is an odd multiple of the line width. The present invention provides a semiconductor device having at least one pattern.

In the layer to be patterned formed on the semiconductor substrate, the width of the light-shielding portion forming the minimum pattern is the same as the width of the light-transmitting portion, and the light-shielding portion and the light-transmitting portion are formed at the same pitch. Exposing through the exposed first reticle, and after the exposure, a second reticle on which at least one light-shielding portion having a width of the light-shielding portion of the minimum pattern or more and an integer multiple of the light-shielding portion width is formed. Exposing through
The present invention provides a method for manufacturing a semiconductor device including:

[0010]

Since the semiconductor device according to the present invention is formed with the minimum pattern in which the space width of the pattern is an odd multiple of the line width, the minimum pattern can be formed by line and space. Here, as shown in FIGS. 2 and 3, the inventor of the present invention,
The pattern formed by line and space is
Compared to the pattern formed as an isolated pattern, the finished dimension (CD; Critic) against the focus position fluctuation (DEFOCUS)
We have found that the fluctuation of al Dimension) is significantly small. Therefore, even if the minimum pattern is an isolated pattern, the same dimensional accuracy as that of the pattern formed by the line and space can be obtained. In addition, FIG. 2 shows the focus position variation (DE
FIG. 3 is a diagram showing the relationship between the FOCUS) and the finished dimension (CD), and FIG. 3 is a diagram showing the relationship between the focus position variation (DEFOCUS) of the pattern formed by the isolated pattern and the finished dimension (CD).

Further, according to the method of manufacturing a semiconductor device of the present invention, the layer to be patterned is exposed through the first reticle, so that the layer to be patterned is exposed by line and space. , Line and space patterns are formed. Further, after this exposure, by exposing through the second reticle, an unnecessary pattern (line portion) of the line and space pattern is exposed. Therefore, unnecessary patterns are removed and only necessary patterns are formed with high accuracy in a developing process performed later. Therefore, even if the minimum pattern is an isolated pattern, the same dimensional accuracy as that of the pattern formed by the line and space can be obtained.

The developing step may be performed after exposure using the first reticle and further after exposure using the second reticle, and after exposure using the first reticle and the second reticle. You may carry out collectively after the exposure using. When the film to be patterned is a negative type, the light blocking portion and the light transmitting portion of the reticle may be replaced with each other.

Further, according to the annular illumination method (deformed illumination method),
The present invention is also applicable to the annular illumination method because the improvement in the resolution and the depth of focus can be achieved by using the reticle in which the repeating pattern such as the line and space is formed.

[0014]

Embodiments of the present invention will now be described with reference to the drawings. 1 (1) to 1 (4) are partial plan views showing a part of a manufacturing process of a semiconductor device according to the present invention, and FIGS. 1 (5) to 1 (8) are a manufacturing process of a semiconductor device according to the present invention. It is a partial cross section figure which shows a part.

In the steps shown in FIGS. 1 (1) and 1 (5), a field oxide film 12 is formed on a semiconductor substrate 11 which has been subjected to desired processing, and an active region 1 and an element isolation region 2 are formed on the semiconductor substrate 11. To do. Next, after a gate oxide film is formed, various impurities are injected, and a diffusion process is performed, a polycrystalline silicon film 13 is formed as a gate electrode forming material on the field oxide film 12 and the semiconductor substrate 11. Then, a photoresist film 14 having a film thickness of about 1 μm is formed on the polycrystalline silicon film 13. In this example, as a photoresist (positive type), “PFI-26 (trade name);
Made by Sumitomo Chemical Co., Ltd.

Next, in the steps shown in FIGS. 1 (2) and 1 (6), as the pattern for forming the minimum pattern, the width of the light shielding portion 18 and the width of the light transmitting portion 19 are the same (1: 1). That is, the photoresist film 14 is exposed through the first reticle 17 in which the light blocking portions 18 and the light transmitting portions 19 are formed at the same pitch. In the present embodiment, “NSR2005i8A (trade name); manufactured by Nikon” was used as an exposure device, and exposure was performed at NA = 0.50 and exposure amount = 220 mJ / cm ² . Through this step, the photoresist film 14
An exposed portion 15 and an unexposed portion 16 were formed by line and space.

Next, in the steps shown in FIGS. 1C and 1C, the unexposed portion 16 obtained in the steps shown in FIGS. 1B and 1C is used as a mask without being removed in the subsequent developing step. Part)
Of these, the necessary part (patterning done in a later step,
A second light-shielding portion 28 is formed at a position corresponding to a portion desired to be used as a mask, the light-shielding portion 28 having a width not less than the width of the light-shielding portion 18 of the minimum pattern and not more than an integral multiple of the width of the light-shielding portion 18.
The photoresist film 14 is exposed through the reticle 20 of FIG. By this exposure, the exposed portion 15 and the unexposed portion 26 were formed on the photoresist film 14. The exposure conditions at this time were the same as the exposure conditions performed in the steps shown in FIGS. 1B and 1C. Then, post-exposure baking was performed at 110 ° C. for 60 seconds.

Next, in the steps shown in FIGS. 1 (4) and (8), the photoresist film 14 obtained in the steps shown in FIGS. 1 (3) and (7) is developed to remove the exposed portion 15. A resist pattern including the unexposed portion 26 is formed. Since the unexposed portion 26 is formed by the line and space, it has highly accurate dimensional stability. In this example, "NMD-3 (trade name); manufactured by Tokyo Ohka Kogyo Co., Ltd." was used as a developing solution, and development was performed for 60 seconds. Then, using this resist pattern as a mask, the polycrystalline silicon film 13 is etched to form a gate electrode 21.

Through the above steps, the adjacent gate electrodes 2
The gate electrode 21 having a pattern in which the space width between 1 is 3 times (the odd times) the width of the gate electrode 21 was formed. In this embodiment, after the exposure using the first reticle, the exposure using the second reticle is continuously performed.
After that, the development was performed collectively, but not limited to this, the first
The development may be performed after the exposure using the reticle, the exposure may be performed using the second reticle, and the development may be further performed.

In this embodiment, the baking process is performed after the exposure using the second reticle. However, the present invention is not limited to this, and the baking process is performed using the first reticle. You may go later. In this embodiment, the space width between the adjacent gate electrodes 21 is
Although the method of forming the gate electrode 21 having a pattern having a width three times the width of the pattern has been described, the present invention is not limited to this, and the minimum pattern in which the space width of the pattern is an odd multiple of the line width is not limited to the type of element. Needless to say, the present invention can be applied to the case of manufacturing the provided semiconductor device.

Further, this embodiment is an example, and the exposure apparatus and the developing solution used may be changed as desired, and when a negative type photoresist is used, it may be changed to a light-shielding portion of the reticle. The light transmitting portion may be replaced. next,
Regarding the isolated pattern (minimum pattern) formed by the method for manufacturing a semiconductor device according to this example, the relationship between the focus position variation (DEFOCUS) and the finished dimension (CD) was investigated for each exposure amount. The exposure dose is 220 mJ.
/ Cm ² , 230 mJ / cm ² , 240 J / cm ² , 2
It was set to 50 J / cm ² . The result is shown in FIG.

As shown in FIG. 4, the isolated pattern formed by the method for manufacturing a semiconductor device according to this embodiment has a reduced variation in the finished dimension (CD) with respect to the variation in the focus position (DEFOCUS) even if it is the smallest pattern. It can be confirmed that a highly accurate isolated pattern in which variation in accuracy is suppressed is formed.

[0023]

As described above, in the semiconductor device according to the present invention, since the space width of the pattern is a minimum pattern which is an odd multiple of the line width, the minimum pattern is formed by line and space. Can be formed. Therefore, even in the case of an isolated fine pattern, it is possible to greatly suppress the dimensional variation, like the pattern formed by the line and space. As a result, it is possible to efficiently obtain a highly precise fine pattern without increasing the manufacturing cost and causing difficulty in manufacturing the reticle.

According to the method of manufacturing a semiconductor device of the present invention, the layer to be patterned is exposed through the first reticle to form a line and space pattern on the layer to be patterned, and then the second pattern is formed. By exposing through the reticle, it is possible to expose an unnecessary pattern of the line and space pattern. Therefore, only the necessary pattern can be formed with high accuracy after the developing process performed later. Therefore, even if the minimum pattern is an isolated pattern, the same dimensional accuracy as that of the pattern formed by the line and space can be obtained. As a result, without increasing the manufacturing cost and difficulty in manufacturing the reticle,
A highly accurate fine pattern can be efficiently manufactured.

[Brief description of drawings]

1 (1) to (4) are partial plan views showing a part of a manufacturing process of a semiconductor device according to the present invention, and (5) to (8).
FIG. 6 is a partial cross-sectional view showing a part of the manufacturing process of the semiconductor device according to the present invention.

FIG. 2 is a diagram showing a relationship between a focus position variation (DEFOCUS) of a pattern formed by lines and spaces and a finished dimension (CD).

FIG. 3 is a diagram showing a relationship between a focus position variation (DEFOCUS) of a pattern formed by an isolated pattern and a finished dimension (CD).

FIG. 4 is a diagram showing a relationship between a focus position variation (DEFOCUS) of an isolated pattern formed in an embodiment of the present invention and a finished dimension (CD).

[Explanation of symbols]

 1 Active Area 2 Element Isolation Area 11 Semiconductor Substrate 12 Field Oxide Film 13 Polycrystalline Silicon 14 Photoresist Film 15 Exposed Area 16 Unexposed Area 17 First Reticle 18 Light-Shielding Area 19 Light Transmission Area 20 Second Reticle 21 Gate Electrode 26 Unexposed area 28 Light-shielding area

Claims (2)

[Claims] 1. A semiconductor device having a desired pattern formed on a semiconductor substrate, comprising at least one minimum pattern having a pattern space width that is an odd multiple of a line width. 2. A patterning layer formed on a semiconductor substrate, wherein a width of a light-shielding portion forming a minimum pattern is the same as a width of a light-transmitting portion, and the light-shielding portion and the light-transmitting portion are formed at the same pitch. Exposing through the exposed first reticle, and after the exposure, a second reticle on which at least one light-shielding portion having a width of the light-shielding portion of the minimum pattern or more and an integer multiple of the light-shielding portion width is formed. And a step of exposing through the method.