JPH06332752A - Computer system - Google Patents

Abstract

PURPOSE:To exactly detect an abnormality that a requested operation mode is not executed, and to quickly switch to the requested operation mode. CONSTITUTION:In an operation mode switching part 13 and a mode discrimination signal outputting part 14, a jumper line or a resistance is connected with 13a and 14a sides, and then a high level signal is inputted to the MODA port and PJ0 port of a MPU 2. Then, the MPU 2 is arithmetic-executed by the program of an outside ROM 3. At that time, when the abnormality that the MPU 2 is arithmetic-executed by the program of an inside ROM 35 occurs, the program of the ROM 35 is executed. However, the PJ0 port is the high level, the inversion of a WDC signal from a PJ1 port is not operated, and a reset signal is outputted from an abnormality detecting circuit 10 to the MPU 2. Afterwards, the high level signal is inputted to the MODA port again, and the operation can be switched to the normal operation in which the MPU 2 is arithmetic-executed by the outside ROM 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention switches between a mode for operating according to a program stored in a storage device in a one-chip microcomputer and a mode for operating according to a program stored in a storage device outside the microcomputer. A computer device that can be used.

[0002]

2. Description of the Related Art In recent years, a computer device for controlling a vehicle has a program memory device (ROM), a data temporary memory device (RAM),
Central processing unit (CPU), input / output device, etc.
Chips tend to consist of microcomputers.

By the way, generally, a computer device is often changed in design such as a program. However, since changing the one-chip microcomputer means changing the design of the mask, it is impossible to change it in a short period of time. Therefore, conventionally, an R for storing the program outside the one-chip microcomputer has been used.
An OM (hereinafter referred to as an external ROM) is provided to cope with frequent design changes, and when the design change of the one-chip microcomputer is completed, the external ROM is removed and switched to the one-chip microcomputer for use. When a further design change is required, the external ROM storing the program after the design change is provided again.

[0004]

However, as described above, the one-chip microcomputer and the external ROM are used together, and the one-chip microcomputer stores the program before the design change (program A), and the external ROM is stored in the external ROM. When the program after the design change (program B) is stored, the following problem occurs.

That is, even if the CPU performs the arithmetic processing according to the program A whose design has not been changed, the program does not run away because it was operated by this program before the design change. Therefore, although the control amount is actually set on the basis of the program A, there is a risk that the actuator is driven by determining that the control amount is set by the program whose design has been changed. That is, in the conventional device, the control amount is calculated by the internal ROM program of the one-chip microcomputer or the external ROM is used.
It was not possible to determine what was asked in.

In Japanese Patent Publication No. 63-62776, a register stores data instructing an operation mode such as whether only a one-chip microcomputer from the outside of the computer or an external ROM is used together. A method is disclosed in which data is compared with data corresponding to the operation mode in the ROM to determine whether the program is controlled according to a requested program.

However, even if such a method is used, there are the following problems. That is, internal ROM and external R
If the OM and the OM exist at the same time, the program after the design change is stored in the external ROM.
I want to calculate only according to the internal program. However, even if the register value changes for some reason and the program in the internal ROM is executed, the register value continues to store an incorrect value until the power is turned off. External RO because a certain value always matches
An abnormality that the M program is not executed cannot be detected.

Therefore, the present invention has been made in order to solve such a problem. For example, there is a demand that an internal ROM program is used for calculation even though an external ROM program is set for calculation. It is an object of the present invention to provide a device capable of accurately detecting an abnormality that the operation mode is not executed and immediately returning to the operation in the requested operation mode.

[0009]

In order to achieve the above object, the present invention provides a computer device including a program storage device, a temporary data storage device, a central processing unit, and an input / output device, in which the operation mode of the computer is changed. An output means for outputting a corresponding mode identification signal, a determination means for inputting the mode identification signal and constantly determining whether or not this signal matches the operation mode currently being executed, and a determination means for determining a mismatch. And a switching means for switching the computer to an operation mode corresponding to the mode identification signal when the computer is operated.

[0010]

According to the configuration of the computer device of the present invention described above, the discriminating means always discriminates whether or not the operation mode corresponding to the mode identification signal matches the operation mode currently being executed. Therefore, even if an abnormality occurs in which the operation mode that does not correspond to the mode identification signal is executed by the computer for some reason, the determination means determines that the two do not match. Then, the switching means switches to the operation mode corresponding to the mode identification signal.

Therefore, the abnormality that the requested operation mode is not being executed is accurately detected, and the requested operation mode is immediately switched to.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment in which the present invention is applied to a vehicle control device will be described below with reference to the drawings. External R
FIG. 2 is a diagram showing a hardware configuration in a mode of operating according to a program stored in the OM (extended multiplex mode). FIG. 2 shows a hardware configuration in a mode of operating according to a program stored in a one-chip microcomputer (single chip mode). It is a figure which shows a hardware constitution.

In FIG. 1, 1 is an electronic control unit (EC
U), and the ECU 1 is composed of the following parts. Reference numeral 2 is a one-chip microcomputer (hereinafter referred to as MPU) which is a main part of the ECU 1. As shown in FIG. 3, the MPU 2 executes an operation such as an input port 31 for inputting a signal from a sensor described later, an A / D converter 32 for converting an analog signal into a digital signal, a fuel injection amount and the like. Central processing unit (CPU) 33, RAM 34 for temporarily storing control data and the like, CPU 3
Internal ROM 3 for storing programs for calculation in 3
5, an output port 36 that outputs a drive signal to an actuator or the like described later. The programs stored in the internal ROM 35 are old programs whose design has not been changed.

Reference numeral 3 denotes an external ROM that stores a program to be calculated by the CPU 33, and the latest program after design change is stored in the external ROM 3. In this embodiment, this program is $ C000- $ FF
It is assumed to be stored in the address area of the FF. Then, the MPU 2 is connected to the external ROM 3 via the address bus 21.
A request signal is sent to the inside of the MPU 2 from the external ROM 3 via the data bus 22 and an arithmetic program corresponding to the request signal is sent.
To the external ROM3 by sending to the port D of
The control amount can be calculated according to the program in the.

Reference numerals 4 and 6 denote input buffers. The input buffer 4 inputs, for example, an analog signal such as the output of the airflow sensor 5, removes noise and the like, and inputs the analog signal to the A / D converter 32 in the MPU 2. Further, the input buffer 6 receives, for example, a digital signal from the idle switch 7 or the like, removes noise or the like, and inputs the digital signal to a gate 16 described later. Reference numeral 8 denotes an output buffer. The output buffer 8 converts the drive signal from the MPU 2 into a large current signal and outputs it to various actuators such as the injector 9.

An abnormality detection circuit 10 detects an abnormality of the MPU 2. The abnormality detection circuit 10 has a high level when the rectangular pulse (WDC signal) output from the MPU 2 is fixed at a high level or a low level for a certain period or longer. Emit a signal,
The MPU 2 is reset via the OR circuit 11. 12
Is a reset circuit, and the reset circuit 12 resets the MPU 2 by outputting a high level signal for a certain period (for example, 60 ms) when the power is turned on.

Reference numeral 13 denotes an operation mode switching section for switching the operation mode depending on whether a jumper wire or a resistor is connected to the 13a side or the 13b side. Specifically, when a jumper wire or a resistor is connected to the 13a side, a high level signal is input to the MODA terminal of MPU2, and when it is connected to the 13b side, a low level signal is input. Then, the MPU 2 detects the input state of the MODA terminal at the end of the reset operation of the MPU 2 which will be described later, detects the operation mode, and performs the arithmetic processing according to the program in the internal ROM 35 or the program in the external ROM 3. Is switched by hardware. In this embodiment, the relationship between the operation mode and the operation mode switching unit 13 is defined as shown in FIG.

Here, in FIG. 1, since the input state of the MODA terminal is at a high level, the MPU 2 judges that it is in the extended multiplex mode, and switches to the operation of reading the program to the external ROM 3 in terms of hardware. Further, the computer device of this embodiment has a configuration for effectively using the port D of the MPU 2 without making it an empty port even when the extended multiplex mode is changed to the single chip mode shown in FIG. Next, this configuration will be described.

In FIG. 1, reference numeral 14 is a mode determination signal output unit, which is connected to a jumper wire or a resistor in 14a in the case of the extended multiplex mode and 14b in the case of the single chip mode. And MPU2 is port P
The input state of J0 is detected and used for the abnormality determination processing described later. Reference numeral 15 is a decoder, and the decoder 15 switches the outputs of the ports CS1 and CS2 based on the address signal from the MPU 2 input via the address bus 21.

Reference numeral 16 is a gate. The gate 16 inputs a digital signal as described above, and also has a data bus 22.
This signal is output to the port D of the MPU 2 via. 1
Reference numeral 7 denotes a gate opening / closing switching unit, which connects a jumper wire or a resistor to 17a in the case of the extended multiplex mode and 17b in the case of the single chip mode. And
By connecting a jumper wire or a resistor to 17a, the gate open / close switching unit 17 can switch the operating state of the gate 16 according to the state of the port CS2 of the decoder 15.

The operation of the decoder 15 will now be described. In this embodiment, as described above, the program in the external ROM 3 is stored in the addresses $ C000 to $ FFFF. The address of the gate 16 is set to $ 2000. If the address value output from the MPU 2 is in $ C000 to $ FFFF, the decoder 15
The port CS1 becomes low level, the port CS2 becomes high level, the gate 16 is closed, the external ROM 3 becomes ready for data output, and the port D receives the program from the external ROM 3.

When the address value output from the MPU2 becomes $ 2000, the port CS1 becomes high level and the port CS2 becomes low level, the gate 16 is opened, and the external ROM 3 becomes the data output prohibited state. Then, signals from sensors that generate digital signals are input to the port D. Therefore, the program from the external ROM 3 and the signals from the sensors are input to the port D according to the address value output from the MPU 2.

By the way, the above-mentioned apparatus includes the MPU.
There are two programs, a program before design change stored in the internal ROM 35 in the internal storage unit 2 and a program after design change stored in the external ROM 3. Further, even if the CPU 33 does not run away even if the program before the design change is read and the arithmetic processing is executed, the engine is not controlled by the optimum control data obtained by the program after the design change. The anomaly cannot be found.

The point which solves such an abnormality is the most characteristic of the present invention, and this abnormality determination processing will be described with reference to the flowcharts shown in FIG. 5 and FIG. FIG. 5 shows a program stored in the external ROM 3, which is started every predetermined time (for example, 4 ms).
In step 101, the signal input to the PJ0 port of MPU2 is read, and in step 102, step 1
It is determined whether or not the input signal level read in 01 is high. That is, in the case of extended multiplex mode,
As shown in FIG. 1, the jumper wire or the resistor is connected to the 14a side, and a high level signal is always input to the PJ0 port.

Therefore, if the input signal level is high, it is judged to be normal and the routine proceeds to step 103, where PJ1
Inverts the WDC signal output from the port. on the other hand,
When it is determined in step 102 that the input signal level is not high, the process of step 103 is not executed and this routine ends. FIG. 6 shows a program stored in the internal ROM 35. Therefore, when operating normally in extended multiplex mode, that is, external R
This routine is not activated while the program in the OM3 is being read and is being processed. However, for some reason, the program in the internal ROM 35 is changed to C
When the PU 33 reads, this routine is executed every predetermined time.

In step 201, the signal input to the PJ0 port of the MPU 2 is read, and in step 202, it is determined whether the input signal level read in step 201 is low level. That is, this routine is originally activated in the single chip mode, and in the single chip mode, the jumper wire or the resistor is connected to the 14b side as shown in FIG. 2 (details will be described later). A low-level signal is always input to the PJ0 port, an affirmative decision is made in step 201, the operation proceeds to step 203, and the WDC signal output from the PJ1 port is inverted.

However, when this routine that is not originally started in the extended multiplex mode of FIG. 1 is executed, a high level signal is input to the PJ0 port, so a negative determination is made in step 202, This routine ends without executing the inversion processing of step 203. As a result, the WDC signal is not inverted, and if this state continues for a predetermined period or longer, a high level signal is output from the abnormality detection circuit 10 and the MPU 2 is reset. When the reset process is completed, the MPU 2 reads the value of the MODA port again. In the case of FIG. 1, since the MODA port is at a high level, the program (program after design change) in the external ROM 3 is read by hardware. The operation switches to. Therefore, after returning to normal, the abnormality determination routine shown in FIG. 5 starts to be executed, and the routine in FIG. 6 is not executed.

The above-described processing will be described in more detail by taking as an example the case where the output characteristic from a certain sensor is switched and the program design is changed accordingly. When calculated by the program before the design change, the fuel injection amount slightly shifts due to the shift in the output characteristics of the sensor, but the engine starts, so the driver does not notice the abnormality. However, in reality, this abnormality may cause deterioration of emission, and it is necessary to immediately switch to a program after design change capable of setting an optimum fuel injection amount. In response to such a request, in the device shown in the present embodiment, even if the program before the design change is executed, a negative determination is made in step 202 of FIG. 6, so that the MPU 2 is turned on again after the power is turned off. It is possible to immediately shift to the program after the design change without waiting for the reset operation.

Next, the single chip mode will be described with reference to FIG. Generally, with the completion of a new MPU in which the program after design change is stored in the internal ROM,
Switching from the extended multiplex mode shown in to this single-chip mode. Note that the same components as those in FIG. 1 are denoted by the same reference numerals, and since they have already been described, the description thereof is omitted here.

In FIG. 2, the jumper wire or the resistance of the operation mode switching section 13 is connected to the 13b side. The mode determination output unit 14 is also connected to the 14b side. This allows MPU2 MODA port and PJ
The 0 port goes to a low level state. Therefore, at the end of the reset process after the power is turned on, the MPU detects that the MODA port is at the low level and starts executing the arithmetic process by the program in the internal ROM 35.

Further, by switching to the single chip mode, the external ROM 3 and the decoder 15 are no longer necessary and are therefore deleted, and the jumper wire or the resistor of the gate open / close switching unit 17 is connected to the 17b side. As a result, a low level signal is always input to the CS2 port of the gate 16 and the gate 16 maintains the open state. Then, only the digital signal input through the gate 16 is input to the port D of the ROM 3, and the portion used as the data bus in the extended multiplex mode is used as a general-purpose input port.

That is, conventionally, as shown in FIG. 7, port D
Was an empty port when switching from extended multiplex mode to single-chip mode. However, in the device of this embodiment, this port is utilized as an input port for digital signals when in the single-chip mode, so it does not become an empty port in this way, and the input port of the MPU 2 is effectively utilized. be able to.

Further, in this embodiment, the decoder 15 operates in the extended multiplex mode so that the data bus 2
Since the signal from the sensor is transferred to the MPU 2 by using 2, it can be implemented without changing the printed circuit board even when switching to the single chip mode. The abnormality determination process in the single chip mode is the same as that shown in FIG.

[0034]

According to the configuration and operation of the computer apparatus of the present invention described above, the discriminating means always discriminates between the operating mode corresponding to the mode identification signal and the operating mode currently being executed. When it is determined that they do not match, the switching means switches to the operation mode corresponding to the mode identification signal.

Therefore, it is possible to accurately detect an abnormality that the requested operation mode is not being executed and to immediately switch to the requested operation mode.

[Brief description of drawings]

FIG. 1 is a diagram showing a hardware configuration in an extended multiplex mode according to an embodiment.

FIG. 2 is a diagram showing a hardware configuration in a single chip mode in this embodiment.

FIG. 3 is a diagram showing an internal configuration of a one-chip microcomputer.

FIG. 4 is a diagram showing a relationship between an operation mode and a MODA port.

FIG. 5 is a flowchart showing an operation of abnormality determination processing.

FIG. 6 is a flowchart showing the operation of abnormality determination processing.

FIG. 7 is a diagram showing a change in circuit configuration associated with a change from the conventional extended multiplex mode to the single chip mode.

[Explanation of symbols]

 1 Electronic Control Unit (ECU) 2 1 Chip Microcomputer 3 External ROM 10 Abnormality Detection Circuit 14 Mode Judgment Signal Output Unit 35 Internal ROM

Claims (1)

[Claims] 1. A computer device comprising a program storage device, a data temporary storage device, a central processing unit, and an input / output device, and an output means for outputting a mode identification signal corresponding to an operation mode of the computer; A determination means for inputting a signal and constantly determining whether or not this signal matches the operation mode currently being executed; and, when the determination means determines that the signals do not match, the operation of the computer corresponding to the mode identification signal A computer device, comprising: switching means for switching to a mode.