JP2003196256A - Electronic control unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic control unit (ECU) capable of certainly rewriting a control program in each microcomputer regardless of the type of each of a plurality of microcomputers. <P>SOLUTION: This ECU 1 is provided with two microcomputers 5 and 7 each having a flash memory 19, and those microcomputers 5 and 7 communicate with a memory writing device 3 by sharing a communication line 23. Just after the operation is started, when a command signal FCP to be commonly inputted from the memory writing device 3 through a signal line 25 different from the communication line 23 is changed from a low state to a high state, each microcomputer 5 and 7 measures the high level time of the signal FCP, and when the measured value is a time specific to its own device, the microcomputer judges that its own device is the target of data writing. Then, respective microcomputers 5 and 7 exchange their judgement results in the output levels of output ports D1 and D2, and when those judgement results are not contradictory, the microcomputer which judges that its own device is the target of data writing executes processing to update the writing data from the memory writing device 3 and write the updated data in the memory 19. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic control device having a plurality of microcomputers, and more particularly to an electronic control device capable of rewriting control programs and control data contained in each microcomputer.

[0002]

2. Description of the Related Art Conventionally, for example, as an electronic control unit for automobiles, EEPR in which data can be electrically rewritten
A microcomputer having a non-volatile memory such as an OM or a flash EEPROM (hereinafter referred to as a flash memory) is provided, and the control program and control data for vehicle control stored in the non-volatile memory can be rewritten even after being supplied to the market. It has been put into practical use.

That is, in this type of electronic control unit, the microcomputer normally controls a control target such as an engine according to a control program and control data constituted by data stored in a non-volatile memory. Execute the process. On the other hand, when the data (control program or control data) in the non-volatile memory is rewritten (or when the data is newly written), a memory writing device as an external device separately prepared in the electronic control device. Are connected, whereby the memory writing device and the microcomputer are connected via a communication line. Then, when the microcomputer determines that the predetermined write execution condition is satisfied, it receives the write data (that is, the data forming the new control program or control data) transmitted from the memory writing device. Then, a writing process such as updating and writing the write data in the nonvolatile memory is executed. Therefore, according to such an electronic control device, even if a situation in which the operation content (control content) has to be changed for some reason after being supplied to the market, it is possible to easily cope with the situation.

Further, in recent years, in this type of electronic control device, a plurality of microcomputers have been mainly installed due to the complicated control contents. In such an electronic control device, a plurality of electronic control devices are installed. It is required that the control program and control data be writable for each of the microcomputers.

Therefore, in order to satisfy the above-mentioned requirements, it is necessary to configure each of the microcomputers mounted on the electronic control unit so as to perform data communication with the memory writing device by sharing one communication line. It is necessary to be able to selectively specify the microcomputer to be written (that is, the microcomputer to execute the writing process) in which the write data from the writing device should be written in the nonvolatile memory. For example, Japanese Patent No. 3137012
The write voltage required to write data to the non-volatile memory (predetermined voltage higher than the power supply voltage for normal operation)
Is supplied only to the microcomputer to be written, and when each microcomputer detects that the write voltage is supplied to itself, the microcomputer executes the write process assuming that the write execution condition is satisfied. It is described that it is configured.

[0006]

However, in recent years, there have been microcomputers that do not require a special write voltage when writing data to a non-volatile memory (hereinafter referred to as microcomputers that do not require a write voltage). For the electronic control device in which at least one microcomputer which does not require a write voltage is mounted, the above-mentioned Patent No. 31 is used.
The technique described in No. 37012 cannot be applied.

Therefore, an object of the present invention is to provide an electronic control device capable of surely rewriting the control program and control data in each microcomputer regardless of the type of microcomputer provided.

[0008]

Means for Solving the Problems and Effects of the Invention The electronic control unit according to claim 1 made to achieve the above object is a microcomputer having an electrically rewritable non-volatile memory. Is provided, and each of the microcomputers is configured to share one communication line and perform data communication with an external memory writing device.

Then, each microcomputer normally operates according to a control program and control data composed of data stored in its non-volatile memory.
A control process for performing a predetermined function is executed, whereby the control operation of the electronic control unit is performed.

Further, each microcomputer, when judging that the write execution condition is satisfied, receives the write data transmitted from the external memory writing device through the communication line and stores the write data in the non-volatile memory. A writing process for updating and writing is executed. Particularly, in the electronic control unit according to claim 1, a binary amplitude command signal is commonly input to each microcomputer from the memory writing unit via a signal line different from the communication line. .

Then, each of the microcomputers performs a measuring process for measuring a duration time (hereinafter, also referred to as a pulse width of the command signal) in which the command signal has a specific logic level, and a time measured by the measuring process. , Whether or not the time is a predetermined specific time for itself and indicates that the user is a microcomputer to be written in which the write data from the memory writing device should be written in the nonvolatile memory. If a positive determination is made in the determination processing, it is determined that the write execution condition is satisfied (that is, it is determined that the microcomputer to be written is). The above writing process is executed.

According to the electronic control unit of the first aspect, the writing target microcomputer is controlled by the pulse width of the command signal commonly output from the memory writing unit to the respective microcomputers through the signal line. It can be specified as an alternative. Therefore, each microcomputer has one
Despite sharing one communication line, it is possible to surely write appropriate data to the nonvolatile memory of the desired microcomputer, and the effect can be obtained regardless of the type of microcomputer. .

Further, in the technique described in the above-mentioned Japanese Patent No. 3137012, in order for each microcomputer to judge whether or not the write voltage is supplied to itself, in general, a write voltage supply line to itself is supplied. Will be A / D converted and monitored. For that purpose, an A / D converter is provided outside each microcomputer, or an A / D port (for details,
Although an input port capable of A / D converting an input signal by a built-in A / D converter is used, according to the electronic control unit of claim 1, such an A / D converter or A / D converter is used. This is very advantageous because the D port is unnecessary.

Incidentally, when an identification code indicating any one of the microcomputers is transmitted from the memory writing device through the communication line, the microcomputer corresponding to the identification code executes the writing process. It is also possible. However, in the case of this method, each microcomputer has to perform data communication with the memory writing device other than the time of executing the writing process, and the program of the relatively complicated communication process increases accordingly. Will end up. Furthermore, a program for a microcomputer of an electronic control unit having only one microcomputer (that is,
When trying to divert a program that does not need to determine whether or not the microcomputer is a writing target microcomputer, the portion to be changed becomes complicated and many.

On the other hand, according to the electronic control device of the first aspect, each microcomputer determines whether or not it is the microcomputer to be written without performing data communication with the memory writing device. It is possible to make a judgment and avoid the above problems. Moreover, even if a low-pass filter having a relatively large voltage smoothing effect is provided on the input line connected to the input terminal of the microcomputer for inputting the command signal from the memory writing device, each microcomputer does not write to itself. Whether or not it is a microcomputer (that is, whether or not the pulse width of the command signal is its own time) can be accurately determined, and due to the influence of noise, a microcomputer different from the original write target will be It is possible to easily prevent the writing process from being executed.

Next, in the electronic control unit according to the second aspect, in the electronic control unit according to the first aspect, each microcomputer sends a determination result notification signal indicating a determination result of the determination process to another microcomputer. It is designed to output. And furthermore, each microcomputer
When a positive determination is made in the determination processing, and based on the determination result notification signal from the other microcomputer, it is confirmed that the other microcomputer has not made a positive determination in the determination processing (that is, other The writing process is executed when the microcomputer confirms that the writing execution condition is not satisfied).

According to the electronic control device of the second aspect, the microcomputer A which is the original writing target is erroneously determined by the microcomputer due to the influence of noise or the like.
It is possible to reliably prevent the microcomputer B different from that from accidentally writing the write data for the microcomputer A from the memory writing device into its own nonvolatile memory.

In other words, due to the influence of noise or the like, not only the microcomputer A that is the original writing target but also the other microcomputers B are positive from the microcomputer A to the microcomputer B when a positive determination is made in the above determination process. That both the determination result notification signal to the microcomputer B and the determination result notification signal from the microcomputer B to the microcomputer A are affirmative in the determination processing (that is,
It means that the user has determined that he is the microcomputer to be written). Then, when a logical contradiction occurs in the determination result notification signals from the respective microcomputers A and B as described above, the microcomputers A and B
This is because neither of them performs the writing process.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. First, FIG. 1 shows an electronic control unit (hereinafter referred to as an ECU) mounted on a vehicle to control an engine.
1) and a memory writing device 3 connected to the ECU 1 when rewriting or newly writing a control program or control data relating to engine control built in the ECU 1. 3 is a block diagram showing the overall configuration of the memory rewriting system of FIG.

As shown in FIG. 1, the ECU 1 is a single-chip microcomputer (hereinafter, referred to as a main microcomputer or simply a microcomputer) that executes a control process for controlling the engine based on various sensor signals indicating the operating state of the engine. 5), a single-chip microcomputer (hereinafter referred to as a sub-microcomputer or simply microcomputer) 7 that executes control processing for detecting an abnormality in the electronic throttle in cooperation with the main microcomputer 5, and a battery 9 mounted on the vehicle. From vehicle ignition switch 1
The power supply circuit 13 receives the voltage VIG supplied via 1 and supplies a power supply voltage VDD (5 V in this embodiment) for operation to both the microcomputers 5 and 7.

In the power supply circuit 13, both microcomputers 5 and 5 are operated from when the ignition switch 11 is turned on to start outputting the power supply voltage VDD until a predetermined time when the power supply voltage VDD is considered stable. It also has a so-called power-on reset function, which outputs a reset signal to 7.

The main microcomputer 5 includes a well-known CPU 15 that operates according to a program, a nonvolatile mask ROM that stores a program executed by the CPU 15 and data referred to when the program is executed.
17 and a flash memory 19, a RAM 21 for temporarily storing the calculation result of the CPU 15, etc., an I / O port (not shown) for inputting and outputting signals, and the like.

Although not shown, the sub-microcomputer 7 is also provided with a CPU 15, a mask ROM 17, a flash memory 19, a RAM 21, an I / O port, etc., like the main microcomputer 5. Here, the flash memory 19 is a nonvolatile ROM capable of electrically rewriting data (specifically, erasing and writing of data).

In the main microcomputer 5, the control program and control data for controlling the engine are already stored in the flash memory 19, and the sub microcomputer 7
Then, the control program and control data for electronic throttle monitoring (for abnormality detection) are already stored in the flash memory 19.

Further, in the present embodiment, the flash memory 19 of the sub-microcomputer 7 is capable of writing data in the state where a predetermined write voltage (for example, 13.5V in this embodiment) VPP is supplied. However, the flash memory 19 of the main microcomputer 5 can write data without supplying such a write voltage VPP.

On the other hand, the mask ROM 17 is a non-volatile ROM in which data cannot be rewritten.
A boot program to be executed immediately after the reset (initialization) of the microcomputers 5 and 7 is released is stored in the memory 17. Note that, instead of the mask ROM 17, a non-volatile ROM in which data can be electrically rewritten like the flash memory 19 may be used as long as the data rewriting is prohibited.

In such an ECU 1, the CPU 15 of each of the microcomputers 5 and 7 starts the execution of the boot program in the mask ROM 17 immediately after the reset is released, and when the memory writing device 3 is not connected, the CPU 15 normally executes the boot program. The boot program calls the control program in the flash memory 19 (in the case of the main microcomputer 5, the control program for controlling the engine, and in the case of the sub microcomputer 7, the control program for monitoring the electronic throttle), each Performs control processing to fulfill the function.

The CPU 15 of each of the microcomputers 5 and 7 is
When the execution of the boot program is started, if it is determined that the mode is the data write mode as described later, the boot program continues to be executed without calling the control program in the flash memory 19 If it is determined that the target microcomputer, the flash memory 1
A writing process for rewriting the current data stored in 9 into the write data (data forming a new control program and control data) subsequently transmitted from the memory writing device 3 is performed.

On the other hand, the memory writing device 3 includes a CPU, RO
A known microcomputer provided with M, RAM and the like is configured as a main part, and is connected to the ECU 1 as an external device via a connector (not shown). At the time of this connection, the memory writing device 3 sets the operation mode of the serial communication line 23 as a communication line and the operation modes of both the microcomputers 5 and 7 in the ECU 1 to the ECU 1, as shown in FIG. In addition, the signal line 25 for the command signal FCP for designating any one of the two microcomputers 5 and 7 as a data writing target, and the memory writing device 3 from the memory writing device 3 to the sub-microcomputer 7 described above. Write voltage VPP
It has three connection lines with the power supply line 27 for supplying the.

The microcomputers 5 and 7 of the ECU 1 share the one serial communication line 23 and share the memory writing device 3 with each other.
And data communication. A command signal FCP having a binary amplitude output from the memory writing device 3 to the signal line 25 is commonly input to each of the microcomputers 5 and 7 via the signal line 25. Furthermore, the sub-microcomputer 7 has a write voltage VP output from the memory writing device 3 to the power supply line 27.
P is supplied through the power supply line 27.

In the memory rewriting system of this embodiment, when rewriting (or newly writing) the control program and control data of any one of the microcomputers 5 and 7 mounted on the ECU 1, the memory writing device is used. Three
Is the level of the command signal FCP output to the signal line 25,
The operation is performed as shown in FIG. In the following, the case of rewriting the control program and the control data will be described, but the same applies to the case of newly writing the control program and the control data.

That is, the memory writing device 3 has a predetermined time T after the ignition switch 11 is turned on.
After w, the command signal FCP is changed from the low level (Low) to the high level (H
By setting i), the operation mode of both microcomputers 5 and 7 is set to the data write mode. The time Tw is set to be longer than the time from when the ignition switch 11 is turned on until the microcomputers 5 and 7 of the ECU 1 start operating.

In the case of rewriting only the control program and control data of the main microcomputer 5 of the two microcomputers 5 and 7 (that is, when only the main microcomputer 5 is the data writing target), the two stages of FIG. As you can see,
The high level time (hereinafter, also referred to as a pulse width) of the command signal FCP is set to T1 (200 ms in this embodiment).

Further, when only the control program and control data of the sub-microcomputer 7 are rewritten (that is, only the sub-microcomputer 7 is the data writing target), as shown in the third row of FIG. The high level time of the FCP is set to T2 (500 ms in this embodiment).

On the other hand, when the control program and control data of the main microcomputer 5 are rewritten, and then the control program and control data of the sub-microcomputer 7 are continuously rewritten with the ignition switch 11 kept on (sequential to both microcomputers 5 and 7) (When writing), the high level time of the command signal FCP is set to T as shown in the fourth row of FIG.
3 (700 ms in this embodiment), and after that, when the rewriting of the control program and control data of the main microcomputer 5 is completed, the command signal FCP is set to T2 (= 50) again.
0 ms) for a high level.

Further, the memory writing device 3 sends the write data to the serial communication line 23 after setting the command signal FCP to the high level for a certain period of time (either T1, T2 or T3) as described above. As a result, the write data is written in the write target microcomputer. Further, when the sub-microcomputer 7 is targeted for data writing, the memory writing device 3 writes the write voltage VP to the sub-microcomputer 7 via the power supply line 27.
Supply P.

Next, the processing executed by each of the microcomputers 5 and 7 of the ECU 1 will be described with reference to the flow charts of FIGS. FIG. 3 is a flowchart showing the processing executed by the main microcomputer 5, and the processing of steps (hereinafter, simply referred to as “S”) S105 to S190 is executed by the boot program in the mask ROM 17, and S195 is executed. The process of is executed by the control program in the flash memory 19. FIG. 4 is a flowchart showing the processing executed by the sub-microcomputer 7, the processing of S205 to S290 is the mask ROM.
It is executed by the boot program in 17 and S295
The process of is executed by the control program in the flash memory 19.

In the ECU 1, when the ignition switch 11 is turned on, each of the microcomputers 5 and 7
The power-on reset function of the power supply circuit 13 starts the operation from the initial state. When the main microcomputer 5 starts operating, C of the main microcomputer 5
PU15 performs the process of FIG.

That is, the CPU 15 of the main microcomputer 5 is
First, the execution of the boot program stored in the mask ROM 17 is started. First, in S105, the command signal FCP input from the memory writing device 3 via the signal line 25.
Is a low level, and if an affirmative decision is made in S105, it is checked in a succeeding S110 whether the command signal FCP from the memory writing device 3 has become a high level within a predetermined time. judge. If the memory writing device 3 is connected to the ECU 1 at the time when the ignition switch 11 is turned on and the memory writing device 3 sets the command signal FCP to the high level as shown in FIG. If so, an affirmative determination is made in S110.

Then, if an affirmative decision is made in S110, it is decided that the data writing mode is in effect, and the flow proceeds to S120, in which the pulse width (high level time) TH of the command signal FCP is measured. Next, in S130, the CPU 15 of the main microcomputer 5 indicates that the pulse width TH of the command signal FCP measured in S120 indicates that the main microcomputer 5 is a data writing target T1 or T3.
Or not.

When an affirmative determination is made in step S130 that the pulse width TH is T1 or T3, it is determined that the main microcomputer 5 is a data write target, and the process proceeds to step S140. Then, in S140, the output level of the output port D1 of the main microcomputer 5 is set to logic 1 (= high level), and in the subsequent S150, the output port D of the sub-microcomputer 7 is set.
It is determined whether or not the output level of 2 is logic 1 (= high level).

As shown in FIG. 1, the main microcomputer 5
Is connected to the input port of the sub-microcomputer 7, and the output port D2 of the sub-microcomputer 7 is connected to the input port of the main microcomputer 5. When it is determined in S150 that the output level of the output port D2 is logical 1 (that is, the output levels of both the output port D1 of the main microcomputer 5 and the output port D2 of the sub-microcomputer 7 are logical 1). If there is, S160
Then, the write data (data forming the control program or control data) transmitted from the memory writing device 3 via the serial communication line 23 is received, and the received data is updated in the flash memory 19. Then, a writing process such as writing is performed.

Upon completion of this writing process, in the next S165, it is determined whether or not the pulse width TH of the command signal FCP measured in S120 is T1, and the pulse width TH is T1.
If so (S165: YES), the operation is stopped as it is. Further, when it is determined in S165 that the pulse width TH is not T1 (S165: NO), it means that the pulse width TH measured in S120 is T3, and at this time, the main microcomputer 5 does not have the pulse width TH. Since the writing process in (3) is completed, it is determined that the sub-microcomputer 7 is the data writing target this time, and the process proceeds to S170. Then, in S170, the output level of the output port D1 is set to logic 0 (= low level), and then the operation is stopped.

On the other hand, in S130, the pulse width TH is T
When a negative determination is made that it is not 1 or T3, the main microcomputer 5 is not a data writing target (in other words,
It is determined that the sub-microcomputer 7 is the data writing target), and the process proceeds to S175. Then, in this S175,
The output level of the output port D1 of the main microcomputer 5 is set to logic 0 (= low level), and in the subsequent S180, the output level of the output port D2 of the sub-microcomputer 7 is set to logic 0 (= low level).
Low level).

Here, when it is determined in S180 that the output level of the output port D2 is logic 0 (that is, the output port D1 of the main microcomputer 5 and the sub-microcomputer 7).
If both output levels of the output port D2 and the output port D2 are logic 0), the operation is stopped as it is.
When it is determined that the output level of the output port D2 is not 0 (logic 1) at 0, “the main microcomputer 5 determines that the sub-microcomputer 7 is a data write target,” , The sub-microcomputer 7 has determined that it is not the data write target ”, and the process proceeds to S190. And this S190
At, the error notification is transmitted to the memory writing device 3 through the serial communication line 23, and then the operation is stopped.

If it is determined in S150 that the output level of the output port D2 is not logic 1 (logic 0), "the main microcomputer 5 is determined to be the data write target. Regardless, the sub-microcomputer 7 also determines that it is the target of data writing ", and in this case also, the process proceeds to S190 without executing the writing process in S160. Transition. Then, after the error notification is transmitted to the memory writing device 3 via the serial communication line 23, the operation is stopped.

When an error notification is sent from the main microcomputer 5 in S190, the memory writing device 3 displays a warning or the like indicating the occurrence of an abnormality on the display unit provided in the device 3. Become. On the other hand, the first S105
In case of negative determination (that is, when the operation is started when the ignition switch 11 is turned on, the command signal F is already output.
If CP is at a high level) or if a negative determination is made in S110 (that is, if the command signal FCP does not go to a high level within a predetermined time), it is determined that the normal mode is set and the flash is performed. Jump to the control program in the memory 19. As a result, the control program written in the flash memory 19 is activated,
After that, as shown in S195, a control process for controlling the engine is executed.

Therefore, after the control program and the control data from the memory writing device 3 are written in the flash memory 19 in the writing process of S160, if the ignition switch 11 is turned off and then turned on again, the writing is performed. The control program will be started.

Further, when the sub-microcomputer 7 starts operating with the ignition switch 11 turned on, the CPU 15 of the sub-microcomputer 7 executes the processing shown in FIG. That is,
The CPU 15 of the sub-microcomputer 7 is also a mask ROM first.
The execution of the boot program stored in 17 is started. First, in S205, it is determined whether or not the command signal FCP input from the memory writing device 3 via the signal line 25 is at a low level. If an affirmative decision is made in S205,
In subsequent S210, the command signal F from the memory writing device 3 is sent.
It is determined whether CP has become high level within a predetermined time.

If an affirmative decision is made in S210, it is decided that the data writing mode is in effect, and the flow proceeds to S220, in which the pulse width TH of the command signal FCP is set.
To measure. Next, the CPU 15 of the sub-microcomputer 7
At 230, it is determined whether the pulse width TH of the command signal FCP measured at S220 is T2 or T3,
When an affirmative determination is made that the pulse width TH is T2 or T3, the pulse width TH measured in S220 is T2, which indicates that the sub-microcomputer 7 is a data write target, in the subsequent S240. Or not.

When an affirmative determination is made in step S240 that the pulse width TH is T2, it is determined that the sub-microcomputer 7 is a data write target, and the flow advances to step S250. Then, in S250, the output port D of the sub-microcomputer 7
The output level of 2 is set to logic 0 (= low level), and the subsequent S
At 260, it is determined whether the output level of the output port D1 of the main microcomputer 5 is logic 0 (= low level).

When it is determined in S260 that the output level of the output port D1 is logic 0 (that is, the output levels of both the output port D2 of the sub-microcomputer 7 and the output port D1 of the main microcomputer 5 are logic 0). If it is)
In step S270, write data (control program or data forming control data) transmitted from the memory writing device 3 via the serial communication line 23 is received.
A writing process such as updating and writing the received data in the flash memory 19 is executed. Then, when this writing process is completed, the operation is stopped.

If it is determined in S260 that the output level of the output port D1 is not logic 0 (logic 1), "the sub-microcomputer 7 is determined to be the data write target. Regardless, the main microcomputer 5 also determines that it is a data write target ", and the operation is stopped without executing the write process in S270. .

On the other hand, in S240, the pulse width TH is T2.
If not (S240: NO), the above S
This means that the pulse width TH measured at 120 was T3. In that case, it is determined that the main microcomputer 5 is the data write target, and the process proceeds to S280, where the output of the sub-microcomputer 7 is output. Set the output level of port D2 to logic 1
After setting (= high level), the process returns to S220. And
In this case, when the command signal FCP from the memory writing device 3 becomes high level again thereafter, the pulse width (high level time) of the command signal FCP is measured in S220, and then the processing of S230 and subsequent steps is performed. Will be done.

Further, in S230, the pulse width TH is T
If a negative decision is made that it is not 2 or T3, the above S2
This means that the pulse width TH measured in 20 was T1, and in this case, it is determined that the main microcomputer 5 is the data writing target, and the process proceeds to S290. Then, in S290, the output level of the output port D2 of the sub-microcomputer 7 is set to logic 1 (= high level), and then the operation is stopped.

On the other hand, when a negative determination is made in the first step S205 (that is, when the command signal FCP is already at the high level when the operation is started with the ignition switch 11 turned on), or when a negative determination is made in S210. (That is, when the command signal FCP does not become high level within the predetermined time), it is determined that the normal mode is set, and the control program in the flash memory 19 is jumped to. As a result, the control program written in the flash memory 19 is started, and thereafter, S29.
As shown in 5, control processing for monitoring the electronic throttle is executed.

Therefore, after the control program and the control data from the memory writing device 3 are written in the flash memory 19 in the writing process of S270, if the ignition switch 11 is turned off and then turned on again, the writing is performed. The control program will be started.

In such a memory rewriting system of the present embodiment, when only the control program and control data of the main microcomputer 5 are rewritten, the memory writing device 3 is used.
Is connected to the ECU 1, the operation mode of the memory writing device 3 is set to the writing mode for the main microcomputer 5, and the ignition switch 11 is turned on.

Then, in this way, the memory writing device 3 is, as shown in the second stage of FIG. 2, when the above-mentioned time Tw elapses from the on-timing of the ignition switch 11, the time of T1 is changed from that time. Only during the period, the command signal FCP to the signal line 25 is set to the high level, and then the write data suitable for the main microcomputer 5 is transmitted to the ECU 1 via the serial communication line 23.

Then, in the ECU 1, if normal,
In the sub-microcomputer 7, S205 and S210: Y in FIG.
Processing is performed in the order of ES → S220 → S230: NO → S290, and in the main microcomputer 5, S105 and S110: YES → S120 → S130: YES → S1 in FIG.
40 → S150: YES → S160 → S165: YES
Therefore, the writing process (S160) is executed only by the main microcomputer 5.

When only the control program and control data of the sub-microcomputer 7 are rewritten, the memory writing device 3 is connected to the ECU 1 and the operation mode of the memory writing device 3 is written to the sub-microcomputer 7. It is sufficient to set the mode and turn on the ignition switch 11.

Then, in this way, as shown in the third row of FIG. 2, the memory writing device 3 goes to T2 from the time when the above-mentioned time Tw elapses from the on timing of the ignition switch 11. Only during the period, the command signal FCP to the signal line 25 is set to the high level, and then the write data suitable for the sub-microcomputer 7 is transmitted to the ECU 1 via the serial communication line 23.

Then, in the ECU 1, if normal,
In the main microcomputer 5, S105 and S110 of FIG.
YES → S120 → S130: NO → S175 → S18
Processing is performed in the order of 0: YES, and the sub-microcomputer 7
S205 and S210 of FIG. 4: YES → S220 → S2
30: YES → S240: YES → S250 → S26
0: YES → S270 is performed in this order, and eventually only the sub-microcomputer 7 performs write processing (S270).
Will be executed.

Furthermore, after the control program and control data of the main microcomputer 5 are rewritten, the sub-microcomputer 7 is continuously operated with the ignition switch 11 kept on.
When rewriting the control program and control data of, the memory writing device 3 is connected to the ECU 1, and the operation mode of the memory writing device 3 is set to the sequential writing mode for both microcomputers 5 and 7. It is sufficient to turn on the ignition switch 11.

Then, as described above, first, the memory writing device 3, as shown in the fourth row of FIG. 2, starts from the ON timing of the ignition switch 11 and ends at the time T mentioned above.
When w elapses, the signal line 2 is kept for only T3 from that time.
Command signal FCP to 5 is set to high level, then EC
Write data suitable for the main microcomputer 5 is transmitted to U1 via the serial communication line 23.

Then, in the ECU 1, if normal,
In the sub-microcomputer 7, S205 and S210: Y in FIG.
ES → S220 → S230: YES → S240: NO →
The processing is performed in the order of S280, and in the main microcomputer 5,
S105 and S110 of FIG. 3: YES → S120 → S1
30: YES → S140 → S150: YES → S160
→ S165: NO → S170 is executed in this order, and in this case, the writing process (S160) is executed only by the main microcomputer 5.

When the rewriting of the control program and the control data for the main microcomputer 5 is completed in this way, the memory writing device 3 sets the command signal FCP to the signal line 25 to the high level for T2, and then to the ECU 1. Write data suitable for the sub-microcomputer 7 is transmitted via the serial communication line 23.

Then, at this stage, the main microcomputer 5 is stopped in the state where the output level of the output port D1 is set to logic 0 at S170, and only the sub-microcomputer 7 operates. And in the sub-microcomputer 7,
The pulse width TH of the command signal FCP is measured again in S220 after returning from S280, and if it is normal thereafter, S230: YES → S240: YES → S25.
The process is performed in the order of 0 → S260: YES → S270. Therefore, when the memory writing device 3 transmits write data suitable for the sub-microcomputer 7, the writing process (S270) is executed only by the sub-microcomputer 7.

As described in detail above, the ECU of this embodiment
In 1, the measurement process in which the respective microcomputers 5 and 7 measure the pulse width TH of the command signal FCP commonly input from the memory writing device 3 via the signal line 25 (S120 in the main microcomputer 5, and in the sub-microcomputer 7 S220) and whether or not the pulse width TH measured in the measurement process is a predetermined specific time for itself (T1 or T3 for the main microcomputer 5, T2 for the sub microcomputer 7). And the determination process (S130 for the main microcomputer 5 and S240 for the sub-microcomputer 7) is performed, and if the determination process is positive, it is determined that the device is a data write target (write target microcomputer). Then, the writing process (S160 in the main microcomputer 5 and S270 in the sub-microcomputer 7) is executed.

Therefore, even though each of the microcomputers 5 and 7 shares one serial communication line 23, the write target is changed by the pulse width of the command signal FCP output from the memory writing device 3 to the signal line 25. Of the microcomputer can be selectively designated and appropriate data can be surely written in the microcomputer, and the effect is whether or not the write voltage VPP is necessary when writing data to the flash memory 19. It can be obtained regardless of the type of microcomputer. Each of the microcomputers 5 and 7 can monitor the logic level of the command signal FCP with a normal input port and does not need to use a special input port such as an A / D port, which is very advantageous. .

Further, each of the microcomputers 5 and 7 can judge whether or not it is a data write target without performing data communication with the memory writing device 3 through the serial communication line 23. It is possible to reduce communication processing other than when the processing is executed. Further, in the ECU 1 of the present embodiment, when the main microcomputer 5 determines that it is the data write target, the main microcomputer 5 sets the output level of the output port D1 to logic 1 (S140), and writes the data by itself. When it is determined that it is not a target (in other words, the sub-microcomputer 7 is a data write target), the output level of the output port D1 is set to logic 0 (S175, S170). Similarly, when the sub-microcomputer 7 determines that it is a data write target, it sets the output level of the output port D2 to logic 0 (S250), and is not a data write target (in other words, in other words). , The main microcomputer 5 is a data write target), the output level of the output port D2 is set to logic 1 (S290, S28).
0). In the present embodiment, the output signals from the output ports D1 and D2 correspond to the determination result notification signal indicating the determination result of the determination process.

When the main microcomputer 5 determines that it is the data write target (S130: YE
S), the output level of the output port D2 of the sub-microcomputer 7 is logic 1 (that is, the sub-microcomputer 7 does not judge that it is the data write target, in other words, the sub-microcomputer 7 After confirming that the main microcomputer 5 is the target of data writing,
The writing process is executed (S150: YE
S → S160). Similarly, when the sub-microcomputer 7 also determines that it is a data write target (S240: YE
S), the output level of the output port D1 of the main microcomputer 5 is logic 0 (that is, the main microcomputer 5 does not judge that it is a data write target, in other words, the main microcomputer 5 Also, after confirming that the sub-microcomputer 7 has determined that the sub-microcomputer 7 is a data writing target, the writing process is executed (S260:
YES → S270). Furthermore, the main microcomputer 5
Output level of own output port D1 and sub-microcomputer 7
If it is determined that the output level of the output port D2 does not match (S150: NO or S180: NO), an error notification is transmitted to the memory writing device 3 (S190).

Therefore, as shown in FIG. 5, when the output levels of the output ports D1 and D2 of the two microcomputers 5 and 7 are the same, that is, the microcomputers 5 and 7 to which the data write target is respectively. Only when the judgment results in
The writing process is executed by the microcomputer which is the original data writing target, and in other cases, an error notification is transmitted to the memory writing device 3 and the display unit of the memory writing device 3 is displayed. A warning will be displayed on the screen. Therefore,
When a microcomputer different from the original data write target erroneously determines that it is the data write target due to the influence of noise or the like, the write process is not performed by both microcomputers 5 and 7.

Therefore, according to the ECU 1 of this embodiment, a microcomputer different from the original data writing target may erroneously execute the writing process due to an erroneous determination due to the influence of noise or the like. It is possible to reliably prevent a microcomputer different from the data writing target from writing the write data from the memory writing device 3 into its own flash memory 19 by mistake.

On the other hand, according to the ECU 1 of the present embodiment, as a method for more surely preventing a microcomputer different from the original data writing target from erroneously executing the writing process due to the influence of noise. , A very simple method can be taken. That is, to the input ports of the respective microcomputers 5 and 7 for inputting the command signal FCP from the memory writing device 3,
Even if a low-pass filter having a relatively large voltage smoothing effect is provided, each of the microcomputers 5 and 7 determines whether or not it is a data write target (that is, the pulse width TH of the command signal FCP is a time unique to itself). This is because it can be accurately determined whether or not there is. Further, when each of the microcomputers 5 and 7 measures the pulse width TH of the command signal FCP, the input value of the command signal FCP may be digitally filtered.

Although one embodiment of the present invention has been described above, it goes without saying that the present invention can take various forms. For example, the ECU 1 of the above-described embodiment has two microcomputers 5 and 7, but the same configuration can be made even if the number of microcomputers is three or more.

Further, in the above embodiment, each of the microcomputers 5 and 7 has the flash memory 19 as the electrically rewritable non-volatile memory, but it has the EEPROM and other memories. But good.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a memory rewriting system of an electronic control device according to an embodiment.

FIG. 2 shows a memory writing device to an ECU (electronic control unit)
It is explanatory drawing explaining the command signal FCP output to.

FIG. 3 is a flowchart showing a process executed by a main microcomputer.

FIG. 4 is a flowchart showing a process executed by a sub-microcomputer.

FIG. 5 is an explanatory diagram illustrating an operation of the ECU of the embodiment.

[Explanation of symbols]

1 ... ECU (electronic control unit), 3 ... Memory writing device, 5
... Main microcomputer, 7 ... Sub microcomputer, 9 ... Battery,
11 ... Ignition switch, 13 ... Power supply circuit, 15
... CPU, 17 ... Mask ROM, 19 ... Flash memory, 21 ... RAM, 23 ... Serial communication line, 25 ... Signal line, 27 ... Power supply line, D1, D2 ... Output port

Claims (2)

[Claims] 1. A plurality of microcomputers having an electrically rewritable non-volatile memory are provided, and each of the microcomputers is normally composed of data stored in the non-volatile memory. When the control process for performing a predetermined function is executed according to the control program and the control data and it is determined that the write execution condition is satisfied, an external memory writing device sets a common communication line to each microcomputer. An electronic control unit configured to receive write data transmitted via the memory, execute a write process for updating and writing in the nonvolatile memory, wherein each of the microcomputers is configured to perform the communication. A common input from the memory writing device to each of the microcomputers via a signal line different from the line. The measurement process in which the command signal of the value amplitude has a specific logic level for measuring the duration time, and the time measured in the measurement process is a unique time predetermined for oneself, A determination process is performed to determine whether or not it is time to indicate that the write data from the memory writing device is a write target microcomputer that should be written to the nonvolatile memory, and an affirmative determination is made in the determination process. If it is, the electronic control unit is configured to execute the writing process by determining that the writing execution condition is satisfied. 2. The electronic control device according to claim 1, wherein each of the microcomputers outputs a determination result notification signal indicating a determination result of the determination process to another microcomputer, and affirms in the determination process. When the determination is made and it is confirmed that the other microcomputer does not make an affirmative determination in the determination processing based on the determination result notification signal from the other microcomputer, the writing processing is executed. An electronic control device characterized by: