JPH06332353A - High voltage power source device - Google Patents

Abstract

PURPOSE:To improve the precision of an output waveform by attaining the rapid rise and fall of the output of waveform in a high voltage power source device supplying a high voltage having three kinds values of positive and negative high voltages and the intermediate voltage as a bias voltage for development for an electrophotographic copying machine and a printer, etc. CONSTITUTION:High withstand voltage transistors Q1, Q2 are connected in series to the positive and negative high voltage sources (+V1, -V2), and the high voltage is supplied to a development sleeve being a load from the connected point. At this time, the output voltage of the connected point is compared with a reference value by a comparator 6, and the voltage sampled by a sample-hold circuit 7 is compared with the reference value by an error amplifier 8, and the transistors Q1, Q2 are on/off-controlled by a timing signal from a timing controller 1 based on these comparison results.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an electrophotographic copying machine,
The present invention relates to a high-voltage power supply device used in an image forming apparatus such as a printer, and particularly to a high-voltage power supply device that outputs three or more kinds of voltage values for developing bias.

[0002]

2. Description of the Related Art Conventionally, AC (AC) high voltage of sine wave or rectangular wave has been used as a developing bias in an electrophotographic image forming apparatus. However, in recent years, a rectangular wave having a bias duty of 4: 6 or 3: 7 has been used because it has an effect on the developing performance.

The sine wave and the rectangular wave having a duty ratio of 1: 1 are generally obtained by boosting a sine wave or a square wave with a step-up transformer. And, DC (direct current) high voltage, DC
-After being obtained with a DC converter or the like, it is superimposed from the other end of the secondary winding of the step-up transformer. As for the rectangular wave with a biased duty, the primary side of the high frequency DC-DC converter and the
A method of modulating the secondary side at a low frequency has been proposed and implemented.

Further, as a developing bias power source for a color copying machine which is particularly required to have a high image quality in recent years, a ternary bias having an intermediate value in addition to a positive and negative binary peak value is used. It has been proved to have a great effect on the removal of The three-valued bias necessary for improving the image quality is high amplitude (2 Kvp-p) and high frequency (fundamental frequency: 8).
(kHz), a fairly high rise speed is required, and the output waveform is complicated at high voltage. For this reason,
It is difficult to realize an economical and space-friendly power source for a copying machine by the conventional technology.

The inventor of the present invention has proposed various means for realizing this three-valued bias, but the basic construction of these conventional systems is roughly as follows. That is, it is composed of two positive and negative high-voltage power supplies and two high-voltage switches for selectively supplying the high-voltage outputs to the output terminals, and controls the high-voltage switches according to a predetermined timing signal.

The formation of the intermediate value is performed as follows. First, the load capacity (capacity between the developing sleeve and the photosensitive drum) connected to the output terminal of the high-voltage power supply of the specified polarity is charged at the timing of switching to the intermediate value, and when the output reaches the intermediate value, it is charged. After that, the positive and negative high-voltage power supplies are both shut off at the timing of the intermediate value, and the intermediate value is held by the load capacitance and the resistor having a relatively high impedance.

As described above, in recent electrophotographic copying machines and printers, the purpose is to improve image quality as a developing bias device that applies a high voltage between the developing sleeve and the photosensitive member in order to float the toner on the surface of the photosensitive member. As the above, a ternary bias circuit that superimposes a DC bias on an AC waveform having three types of voltage values is used. Therefore, in the conventional circuit, the desired three-valued bias waveform is obtained by periodically switching between two types of voltages of + V and -V and the ground level (0V).

FIG. 27 is a block diagram showing a circuit configuration of a conventional high-voltage power supply device which outputs the above-mentioned three-valued bias. In the figure, 101 is a PWM circuit that compares a predetermined reference voltage with an input voltage and generates a pulse signal with a pulse width according to the result, and 102 is a pulse signal from this PWM circuit. Drive circuit for switching a transistor on the primary side to drive a transformer (not shown), 103 generates a high voltage signal from the signal from the drive circuit 102, and smoothes this high voltage signal to generate a high voltage DC of the first level. A step-up smoothing circuit (A) including the above-mentioned transformer that generates a voltage is a step-up smoothing circuit (B) that similarly generates a high-voltage DC voltage of the second level.

Reference numeral 105 is a voltage detection circuit (A) that uses a signal obtained by dividing the output voltage of the step-up smoothing circuit (A) 103 as an input signal to the PWM circuit 101, and 106 is a step-up smoothing circuit (A).
A high-voltage switch circuit (A) that switches the high-voltage output voltage from 103 to the output coupling capacitor C, and a high-voltage switch circuit (107) that switches the high-voltage output voltage from the step-up smoothing circuit (B) 104 to the output coupling capacitor C ( B), 108 is a voltage detection circuit (B) that divides the switched high voltage output and outputs a low voltage signal proportional to the high voltage output signal, and 109 receives the signal from this voltage detection circuit (B) 108 and An intermediate voltage control circuit for generating a control signal so that the voltage becomes an intermediate level between the first and second high voltage levels, 110 is a high voltage switch circuit (A) 106, a high voltage switch circuit (B) 107, an intermediate voltage It is a timing signal generation circuit that generates a timing signal for controlling each operation timing of the control circuit 109.

[0010] 111 is an ON / OFF that is added from the outside
A signal switch circuit (A) which receives a signal and controls ON / OFF of transmission of a switch ON signal of the high voltage switch circuit (A) 106 from the timing signal generating circuit 110,
Similarly, 112 is a signal switch circuit (B) for ON / OFF controlling the switch ON signal of the high-voltage switch circuit (B) 107, and 113 is a signal from the intermediate voltage control circuit 109 and receives the signal level from the signal switch circuit 111. Turns on the signal from the control or signal switch circuit 111
This is a signal control circuit for controlling ON / OFF.

With the above circuit configuration, conventionally, the step-up smoothing circuit (A) 103 generates a positive high-voltage output and the step-up smoothing circuit (B) 104 generates a negative high-voltage output, respectively, and a signal from the timing signal generating circuit 110 is generated. Thus, first, the high voltage switch circuit (A) 106 is turned on to switch the positive high voltage output, then the high voltage switch circuit (A) 106 is turned off, and the high voltage switch circuit (B) is switched to switch the negative high voltage output. 107
ON, then turn off the high-voltage switch circuit (B) 107
At the same time, the high voltage switch circuit (A) 106 is turned on again. At this time, the output voltage rises from a negative high voltage, but the voltage detection circuit (B) 108, the intermediate voltage control circuit 10
9. The output voltage is 0 due to the function of the signal control circuit 113.
When the voltage becomes [V], the high voltage switch circuit (A) 106
Turn off. By repeating the above, a ternary bias as shown in FIG. 27 is obtained at the above switch point.

By the way, in the above description, the control of the high voltage DC voltage has been explained by detecting the positive voltage and feeding it back. In this case, however, the value of the negative high voltage DC voltage is the step-up smoothing circuit (B) 104. Is determined by the number of turns of the transformer inside.

FIG. 28 shows the high voltage switch circuit (A) 10 described above.
6 is a circuit diagram showing a schematic configuration of a high voltage switch circuit 6 and a high voltage switch circuit (B) 107. FIG. As shown in the figure, the high voltage switch circuit (A) 106 includes a transformer T101 and a diode D10.
1, having a high-voltage transformer Tr1 and a transistor T
The collector of r1 is connected to a positive high-voltage DC voltage, the emitter is connected to the negative side of the transformer T101 and the high-voltage switch circuit (B) 107, and the base is connected to the positive output side of the transformer T101 via a diode D101. The transformer T101 is provided to insulate the primary side thereof.

Similarly, the high voltage switch circuit (B) 107
Has a transformer T102, a diode D102, and a high-voltage transistor Tr2, the collector of the transistor Tr2 is a high-voltage switch circuit (A) 106, the emitter is a negative high-voltage DC voltage, and the base is a secondary side of the transformer T102 via the diode D102. Are connected to each other. The transformer T102 in this case is also provided to insulate the primary side thereof.

FIG. 29 is a block diagram showing another conventional example. In the figure, 201 is a PWM control circuit that generates a PWM signal and controls a high voltage output, 202 is a drive circuit that receives a PWM output from this PWM control circuit 201, switches a DC voltage, and generates a drive signal, 203 Is a booster circuit having a transformer for amplifying this drive signal, 20
Reference numeral 4 is a booster circuit which has the same transformer and amplifies the drive signal. These booster circuits are two output one booster circuits if one primary winding has two secondary windings. Can also be

Reference numeral 205 denotes a positive rectifier circuit for positively rectifying the output voltage of the booster circuit 203, and 206 denotes a booster circuit 204.
Rectification circuit that rectifies the output voltage of the negative to 2
Reference numeral 07 is a voltage detection circuit that detects the output voltage of the positive rectification circuit 205 or the negative rectification circuit 206 (the positive rectification circuit in the example in the figure) and outputs a low voltage proportional to the output. The PWM control circuit 201 has this voltage. Upon receiving the output of the detection circuit 207, the PWM output is controlled so that the detected voltage becomes a desired constant value.

In the DC high voltage circuit as described above, the control circuit and the drive circuit are unified for the purpose of downsizing the circuit and reducing the cost. Therefore, the voltage accurately regulated to the desired voltage is the voltage. Either one of the feedbacks is applied by the detection circuit 207 (in the example of the figure, +
V) output only. Therefore, the booster circuit 2
03 and the transformer in the booster circuit 204, the output on the unregulated side does not reach the desired voltage value due to variations in the performance of the transformer, and the difference in the magnitude of the load with respect to each output, or it becomes unstable due to load fluctuations. May occur (see (a) of FIG. 26).

FIG. 30 is a diagram showing a schematic structure of a conventional high-voltage switch circuit for switching between + V, -V and the ground level. In the figure, 208 is an oscillator that outputs a pulse signal of several hundreds Hz, 209 is a timing signal generating circuit that generates + V, -V and ground level switching timing signals, and Tr11 and Tr12 are timing signal generating circuits 208, respectively. Transistors T201 and T202 for controlling the transmission of the pulse signal from the oscillator 208 in accordance with the + V and -V switching timing signals are + V and T202, respectively.
It is an insulating transformer for transmitting a pulse signal transmitted in accordance with a -V switching timing signal to its secondary side.

The transformers HTR1 and HTr2 are transformers T, respectively.
201, a high-voltage transistor that switches the voltage + V, -V according to the pulse signal transmitted to the secondary side of T202,
Reference numeral 210 is a voltage detection circuit that detects the voltage switched by the transistors HTr1 and HTr2, 211 is an error amplifier that generates an output signal such that the switched voltage becomes the ground level, and Tr13 is the ground level from the timing signal generation circuit 209. The transistor for controlling the transmission of the signal from the error amplifier 211 in accordance with the switching timing signal of Tr, and Tr14 is the transistor for controlling the switching signal of the voltage + V in accordance with the signal from the error amplifier 211 transmitted during the switching timing of the ground level. is there.

In the high voltage switch circuit as described above, ON / OFF of the high voltage transistors HTr1 and HTr2 is controlled by a signal from the timing signal generating circuit 209, and the above-mentioned ternary bias is output to the developing sleeve.

[0021]

In the conventional high-voltage power supply device as described above, a three-value bias, that is, a positive and negative high voltage and a high voltage, are provided in order to prevent toner from scattering and to achieve high resolution. Although AC high voltage having three levels of intermediate levels is used, it is necessary to accelerate the positive and negative rising and falling of the output waveform in order to improve the image quality. That is,
The individual positive and negative fundamental frequencies of the ternary bias are relatively low frequencies of several hundred Hz to 2 KHz, whereas the normal developing bias is of high frequency of 8 KHz. Need improvement,
Furthermore, it is difficult to form an intermediate value level.

That is, in the conventional method, a switch that opens and closes with a constant pulse width is used to charge and discharge the load capacity with a positive and negative power source. Therefore, depending on variations in the load capacity and the delay time of the switch, charging and discharging may occur. There has been a problem that the discharge speed changes greatly and the timing balance of the three levels of the positive and negative peak levels and the intermediate level, which are the most important for improving image quality, changes greatly. At the same time, when the convergence to the intermediate value level occurs, there is a problem that the overshoot becomes large and, conversely, the convergence becomes significantly slower, and the difference in switching speed between the positive and negative high voltage switches causes
There was a problem that the timing balance of the values would be large.

Further, in the structure shown in FIG. 27, two step-up smoothing circuits are required to generate two types of high-voltage DC voltage, and the high-voltage switch circuit also switches positive high voltage and negative high voltage. Since both require insulating transformers, the number of parts increases, and a creepage distance is required for each part of the high-voltage part to prevent high-voltage leakage, resulting in an increase in the size and cost of the board. There was a point.

Still, as shown in FIG. 30, in the switch circuit, the O of the high voltage transistors HTr1 and HTr2 is O.
At the time of FF timing, a voltage remains between each base and emitter (see (d) of FIG. 25), and +
There is a problem that switching between V and -V is not performed smoothly, and as a result, the output AC waveform is disturbed.

In order to solve the above problem, as shown in FIG. 31, a circuit including transformers T203 and T204 and transistors Tr15 and Tr16 is added, and a transistor HTr1 is used at -V switch timing, and a transistor is added at + V switch timing. Base of HTr2-
A switch circuit configured to reduce the voltage between the emitters is also used, but in this case, there is a problem that the circuit scale becomes large.

The present invention has been made by paying attention to the problems as described above. It is possible to output a ternary bias having a high-speed rising and falling, and the accuracy of the output waveform is high.
Another object of the present invention is to provide a high-voltage power supply device capable of reducing the circuit size and cost.

[0027]

The high-voltage power supply device of the present invention is configured as follows.

(1) A high-voltage power supply device used in an electrophotographic image forming apparatus, which controls a positive and negative high-voltage power supply, a switch circuit for selectively supplying an output of the high-voltage power supply to a load, and the switch circuit. A timing controller for outputting a timing signal for controlling the output voltage, a first comparison circuit for comparing the output voltage of the high-voltage power supply with a reference value, a sample hold circuit for sampling and holding the output voltage of the high-voltage power supply, and this sample A second comparison circuit that compares the output voltage of the hold circuit with another reference value, an integration circuit that integrates the output of this second comparison circuit, and a pulse that changes the output pulse width according to the output of this integration circuit. A width modulation circuit,
A switch control circuit for controlling the switch circuit according to the output of the pulse width modulation circuit and the outputs of the timing controller and the first comparison circuit is provided.

(2) In the high-voltage power supply device according to (1), the timing controller alternately outputs positive and negative high voltages for one cycle and then shuts off the output for a predetermined time to output an intermediate ground level voltage. The switch control circuit is controlled so as to be repeated at a predetermined frequency.

(3) In the high-voltage power supply device according to (1) or (2), a switch for selecting negative or positive high voltage is energized when switching from a positive or negative peak level to an intermediate ground level. After that, the first comparator circuit detects that the output has reached the ground level and shuts off the switch.

(4) In the high-voltage power supply device according to (1) or (2), the sample-hold circuit performs sampling before the output is sufficiently raised and saturated while the switch circuit is energized.

(5) In the high voltage power supply device according to any one of (1) to (4), the switch circuit includes a first pulse transformer whose output side of the timing controller is connected to the primary winding, and the pulse transformer. A high breakdown voltage transistor whose base and emitter are connected to the secondary side, a low breakdown voltage transistor whose collector is connected to the emitter of this transistor, and a second pulse whose secondary side is connected to the base and emitter of this transistor. Consists of a transformer and
When the switch circuit is cut off, the timing controller controls the low withstand voltage transistor to be conductive.

(6) In the high voltage power supply device according to any one of (1) to (5) above, the pulse width modulation circuit has a high frequency repetition frequency which is 10 times or more the high voltage output frequency.

(7) In the high voltage power supply device according to any one of (1) to (6), the timing controller divides the basic repetition signal of the pulse width modulation circuit into a predetermined ratio to generate the timing signal of the switch circuit. I decided to do it.

(8) In the high-voltage power supply device according to (1), the timing controller includes a plurality of counters whose count values can be set, and controls the energization time of the switch of the switch circuit and the timing of the sampling pulse of the sample hold circuit. It was controlled by the counter.

(9) In the high voltage power supply device of (1) above, a plurality of systems of a sample hold circuit, a second comparison circuit, an integration circuit and a pulse width modulation circuit are provided, and the positive and negative switches of the switch circuit are controlled independently. I did it.

(10) In the high-voltage power supply device according to (8), at least a counter, a microcomputer for supplying a divided clock to the counter, peripheral circuits and dividing circuits around the counter, and a pulse width modulation circuit are included in the same chip. It is composed of the above.

(11) A high-voltage power supply device used in an electrophotographic image forming apparatus, which generates a direct current corresponding to the maximum and minimum amplitude of a high-voltage alternating current that periodically repeats three voltage values; A high-voltage switch circuit including a high-voltage transistor having a collector connected to the output side of the high-voltage DC generation circuit and having an insulating transformer between the base and the emitter,
And a 0V switch circuit including a high-voltage transistor whose collector is connected to the emitter of the high-voltage transistor and whose emitter is grounded.

(12) In the high-voltage power supply device according to the above (11), the high-voltage DC generation circuit has a pulse width modulation circuit, and a control signal for turning on / off the high-voltage AC output is input to the pulse width modulation circuit. A time constant circuit for gradually increasing the output of the high-voltage DC generation circuit to a predetermined voltage by the ON signal of the control signal is provided.

(13) In the high-voltage power supply device according to the above (11), an intermediate between the timing signal for controlling the output period of the intermediate voltage value of the high-voltage AC and the control signal for turning on / off the output of the high-voltage AC A voltage period determination circuit is provided, and the voltage at the connection point becomes an intermediate voltage value of high-voltage AC by the signal obtained by dividing the voltage at the connection point between the high-voltage switch circuit and the 0V switch circuit and the signal from the intermediate voltage period determination circuit. As described above, the high voltage switch circuit is controlled.

(14) A high-voltage power supply device used in an electrophotographic image forming apparatus, which comprises a pulse width modulation circuit for changing the output pulse width in accordance with an external input signal, and a transformer by the output of the pulse width modulation circuit. A drive circuit that drives the primary side for switching, a booster circuit that generates two different high-voltage alternating currents on the secondary side of the transformer, a rectifier circuit that rectifies each high-voltage alternating current, and detects each rectified high-voltage DC voltage. A voltage detection circuit and a difference voltage calculation circuit for calculating the difference voltage between the high voltage DC voltages, and the output of the difference voltage calculation circuit is input to the pulse width modulation circuit as the external input signal, and the two high voltage DC The voltage is switched at a predetermined timing to periodically generate three voltage values of those voltage values and an intermediate voltage value.

(15) A high-voltage power supply device used in an electrophotographic image forming apparatus, which is a high-voltage DC voltage generating circuit for generating two different high-voltage DC voltages, and a connection point to which these high-voltage DC voltages are supplied. Two switch circuits connected so that each high-voltage DC voltage appears, a voltage detection circuit that detects the voltage at the connection point and the two high-voltage DC voltages, and the voltage at the connection point from those detection signals. An intermediate potential detection circuit that detects that the intermediate voltage of the two high-voltage DC voltages has been reached, and the switch circuit is controlled by a signal from the intermediate potential detection circuit to control the two high-voltage DC voltages at a predetermined timing. By switching, three voltage values of those voltage values and an intermediate voltage value are periodically generated.

(16) A high-voltage power supply device used in an electrophotographic image forming apparatus, in which two switch circuits to which different high-voltage DC voltages are supplied, and a pulse which outputs a pulse signal for controlling the operation of the switch circuits A signal generation circuit,
A pulse transformer in which the pulse signal is input to the primary side and the switch circuit is connected to the secondary side, and a switch control circuit for rectifying the signal generated on the secondary side of the pulse transformer to control the operation of the switch circuit The operation of the switch control circuit is controlled by a signal before rectification on the secondary side of the pulse transformer, and the two different high-voltage DC voltages are switched at a predetermined timing to switch between those voltage values and their intermediate values. Three voltage values are generated periodically.

[0044]

In the high-voltage power supply device of the present invention, the switch circuit is connected to the positive and negative voltage power supplies, and the switch circuit is controlled according to the output waveform, so that the output waveform of the ternary bias has high accuracy. .

Further, in the present invention, a three-value bias output can be obtained with a single high-voltage power source, which enables downsizing and cost reduction, and also prevents overshoot.

Further, in the present invention, a desired three-valued bias can be obtained by a single control circuit and a single drive circuit, and an accurate and stable developing bias output can be obtained.

[0047]

【Example】

(Embodiment 1) FIG. 1 is a circuit configuration diagram showing a first embodiment of the present invention. In the figure, Q1 and Q2 are high withstand voltage transistors, which are connected in series with each other and have positive and negative DC high voltage power supplies (+
It is inserted between V1 and -V2). Then, the voltage generated at the connection point of the transistors Q1 and Q2 is selectively supplied to the sleeve of the developing device as the developing AC bias through the output terminal P1 by the switch circuit 2. At this time, the base currents of the transistors Q1 and Q2 are controlled by the timing controller 1, the comparator 6, the AND circuits 3 and 4, and the NAND circuit 5 via the pulse transformers T1 and T2, respectively.

FIG. 2 shows the detailed structure of the high-voltage power supply (V1, V2). In FIG. 2, T21 is a converter transformer,
The output of the high voltage winding L2 on the secondary side is the high voltage diode D21,
Rectified by D22, + V1 (+ 1KV), + V respectively
2 (-1 KV) is output. The primary side of the converter transformer T21 is driven by switching the complementary switches Q21 and Q22 by the drive circuit 21.

FIG. 3 shows a detailed circuit of the timing controller 1, and FIGS. 4 and 5 show timing charts thereof. In FIG. 3, reference numeral 31 denotes an oscillator circuit, which generates a clock pulse having a repetition frequency of 8 KHz. Q31 to Q33 are master-slave type flip-flops that form a three-stage ring converter, and their Q outputs are shown in FIG.
At the timings t0, t1 and t2 shown in FIG. Further, the NAND circuit Q34 takes the NAND of the integrated output of the Q output of the flip-flop Q33 and the inverted output of the clock signal, and the reset pulse shown in (g) of FIG. 4 is obtained.

In the circuit of FIG. 3, the switching timing output to the intermediate value of the output (MCP) is obtained by ANDing the inverted output of the flip-flop Q31 and the non-inverted output by the AND circuit Q51. can get. At that time, the integration time constants of the resistor R51 and the capacitor C51 of the integrating circuit are set so that the positive side switch can be turned on until it reaches an intermediate value sufficiently even in consideration of variations in load capacitance. The drive timing output (PDP) of the positive side switch is the AND circuit Q51 in the OR circuit Q52.
And the non-inverted output of the flip-flop Q33. Similarly, the drive timing output (hereinafter, NDP) of the switch on the negative side is obtained by the inverted output of the flip-flop Q31.

The positive and negative drive timing outputs are input to the AND circuits 3 and 4 in FIG. 1, respectively. A carrier signal of 100 KHz or more is input from the PWM (pulse width modulation) circuit 10 to the AND circuits 3 and 4, and carrier signals modulated by P output and N output appear at their respective outputs. Further, the output sides of the AND circuits 3 and 4 are provided with a transistor Q for driving the primary side of the pulse transformers T1 and T2, respectively.
It is connected to the bases of 1, Q2.

The output of the three-value bias is the resistance R1,
It is detected by the voltage dividing circuit of R2. This resistance R1, R
2 also serves to hold the output at an intermediate level (ground level). Then, when the output exceeds the ground level, the output of the comparator 6 is inverted to the high level. This inverted output is output by the NAND circuit 5 as described above. C. The output of P and the NAND are taken, the output of the AND circuit 3 is inverted to the low level, and the transistors Q3 and Q1 are cut off. As a result, both the transistors Q1 and Q2 are turned off, so that the potential of the output terminal P1 is maintained near the ground potential.

The output of the ternary bias detected by the voltage dividing circuit of the resistors R1 and R2 is compared with the intermediate value by the comparator 6, and at the same time, the amplitude of the positive rising predetermined timing is extracted by the sample hold circuit 7. To be done. The sampling pulse (hereinafter SP) at this time has a sufficiently narrow width at the timing after the start ta of the positive rise of the flip-flop Q33 by the monostable multivibrators Q36 and Q37, as shown in FIG. Obtained as a shaped pulse.

A concrete structure of the sample hold circuit 7 is shown in FIG. S. When P is at a low level, the transistors Q43 and Q42 are cut off, and the gate of the field effect transistor (FET) Q41 has resistors R43 and R44.
Since it is deeply biased in the negative direction by
1 is cut off. In addition, the charge of the hold capacitor C41 connected between the inverting input and the output of the high input impedance operational amplifier 41 remains held, and the inverting input potential becomes the virtual ground of the feedback amplifier, and the same potential as the non-inverting input. Since it becomes (ground), the output of the operational amplifier 41 remains at the conventional level. The sampling pulse S. When P becomes high level, the transistors Q43 and Q42 become conductive and the diode D41 becomes cut off.

Further, since the gate potential of the transistor Q41 is the ground potential and the source potential thereof is the ground potential as described above, the depletion type transistor Q41 becomes conductive. In this state, the output potential Vout of the operational amplifier 41 is

[0056]

[Equation 1]

As described above, the charge of the capacitor C41 is rapidly charged and discharged. And S. When P goes low, the transistor Q41 is turned off and the capacitor C41 holds its output potential.

In this way, the amplitude vp1 at a predetermined output timing can be extracted and held. The output of the sample hold circuit 7 is compared with the reference voltage input from the input terminal P2 in the error amplifier 8 of FIG. Also,
The output of the error amplifier 8 is integrated by the integration circuit 9 for a predetermined time constant and then input to the PWM circuit 10.

At this time, when the output of the sample and hold circuit 7 has not reached the reference voltage, the output of the error amplifier 8 becomes high, the output pulse width of the PWM circuit 10 becomes wide, and the high breakdown voltage transistors Q1 and Q2. Increase the conduction ratio. On the contrary, when the output of the sample hold circuit 7 exceeds the reference voltage, the output pulse width of the PWM circuit 10 becomes narrow, and the conduction ratio of the transistors Q1 and Q2 becomes low.

As described above, in this embodiment, in order to realize a ternary developing bias having a high-speed rising and falling, two high-withstand voltage switches are connected in series between the outputs of the positive and negative high-voltage power supplies. , 2 via insulating means respectively
The switching timing of each switch is controlled individually. Specifically, the rising speed of the output waveform is measured and compared with a reference value to control the switching speed of the positive and negative high voltage switches.

Further, for each output cycle, a predetermined timing output level during rising of the waveform is sampled, and the sampling output is compared with the reference voltage by the error amplifier 8. Then, the output of the error amplifier 8 is integrated with a predetermined time constant and input to the PWM circuit 10, and the PWM circuit output controls the energization time ratio of the high voltage switch. Furthermore, the positive and negative rising edges of the output waveform are detected and compared with the respective reference values to control the energization ratio of the positive and negative high voltage switches.

Therefore, the output waveform of the ternary bias has high accuracy, and the circuit can be downsized and the cost can be reduced.

(Second Embodiment) FIG. 7 is a circuit configuration diagram showing a second embodiment of the present invention. In the present embodiment, the accuracy of the speed control for rising and falling of the output shown in the first embodiment is further improved. FIG. 8 shows the operation of each part of FIG. 7, and FIG. 9 shows the output waveform of each part.

Since the maximum value of the duty of the output pulse of the PWM circuit remains at about 50%, the output of the three-valued bias is shown by the conduction timing of the transistors Q1 and Q2 of the positive and negative high breakdown voltage switch circuit 2 of FIG. As shown in (1) of 9, the ascending and descending steps are performed. Further, at the non-conducting timing of the transistors Q1 and Q2, the current flows back to the ground due to the current flowing to the ground by the output detection circuit or the like. Therefore, a sawtooth ripple appears in the output as shown in (1) of FIG. 9, and in the first embodiment, the S.S. Since P and P / D and S / D / P are not synchronized, the sampling output fluctuates due to the ripple, and the fluctuation becomes jitter of the PWM circuit output,
It was a cause of causing fluctuation (jitter) of the ternary bias output waveform.

However, in the present embodiment shown in FIG. 7, by synchronizing S.P with P.D.P. and N.D.P, the sampling pulse always cuts the same phase of the ripple, The sampling output does not fluctuate. Further, in the present embodiment, the timing ratio of each of the high level, the intermediate level and the low level within one cycle of the frequency of the output can be controlled by the built-in programming of the microcomputer.

In FIG. 7, 71 is a microcomputer, 72 is a frequency dividing circuit, and 73-1 to 73-5 are counters.

The frequency dividing circuit 71 divides the clock signal of the microcomputer 71 to approximately 200 KHz,
It is input to the clock inputs of the counters 73-1 to 73-5 and the reset input of the RS flip-flop Q73. Further, the counters 73-1 to 73-5 start counting by the S input (the Q output is inverted from low to high),
When the count value reaches the value set by the microcomputer 71, the Q output is inverted from high to low.

At this time, the counter 73-1 determines the high-level timing width, starts counting by the start signal of the microcomputer 71, and when the set count value is reached, ends the counting, and the counter 73-
Start counting 2. The counter 73-2 determines the low-level timing width, and when it reaches a predetermined count value, the counter 73-2 stops counting, and the counters 73-3 and 73-4.
To start counting. Also, this counter 73-2
Q output of is input to the high breakdown voltage switch control circuit as N · D · P (negative drive pulse). The counter 73-3 is
When the timing width with the intermediate level is determined and the predetermined count value is reached, the counting is completed and the counters 73-1 and 7-3
Start counting 3-5. The counter 73-4 is
Determines the closing timing of the positive drive high withstand voltage switch for switching from the low level to the intermediate level.

Specifically, a value is set with a sufficient margin added to the time required to charge the load procedure from a low level to an intermediate level.

The counter 73-5 determines the generation timing of the sampling pulse. When the counter 73-5 finishes the predetermined count, the RS flip-flop Q
Invert the Q output of 73 to high level. Further, the flip-flop Q73, after being inverted to a high level, has a frequency dividing circuit 72.
When the output of is input, a very narrow pulse is obtained at the Q output in order to immediately return to the low level, and the PWM circuit 10 integrates the output of the frequency dividing circuit 72 by the integrating circuit 74. , The integrated output by the comparator Q74 shown in FIG.
Is configured to be compared with the integrated output of the error amplifier 8.

Even with such a configuration, similarly to the first embodiment, the rise time, the fall time, and the duty ratio of the output waveform are stabilized against variations in the load capacitance and the drive capacitance of the high breakdown voltage switch circuit. You can

(Third Embodiment) FIG. 10 is a diagram showing a third embodiment of the present invention. Further, FIG. 11 shows a detailed view of the timing controller 1, and FIG. 12 shows a time chart.

In FIG. 10, 7-1 and 7-2 are sample and hold circuits, 8-1 and 8-2 are error amplifiers, and 9-1 and 9-.
Reference numeral 2 is an integrating circuit, and 10-1 and 10-2 are PWM circuits. Further, in FIG. 11, Q36-1, 36-2 and Q37-
1, Q37-2 are monostable multivibrators.

In the first and second embodiments, the rising speed in the positive direction is detected to control the energization ratio of the positive and negative high withstand voltage switches, whereas in the present embodiment, both the positive and negative directions are controlled. The rising speed of each switch is detected, and the energization time ratio of each high voltage switch is controlled. That is,
After the rise of the negative drive pulse, the amplitude component vP2 of the detection signal after the time tB has elapsed is extracted and held, and is compared with the reference signal applied to the terminal P3.

In FIGS. 10 to 12, different reference voltages are used to detect the positive and negative rising speeds.
By selecting A and tB optimally, it is possible to use the same reference voltage.

(Fourth Embodiment) FIG. 13 is a diagram showing a fourth embodiment of the present invention. In this embodiment, as in the second embodiment of FIG. 7, the jitter due to the ripple component contained in the output is removed, and the positive and negative rising speeds can be controlled independently.

The positive rising edges of the Q outputs of the counters 73-1 and 73-2 are detected by the edge detection circuits 81-1 and 81-.
2 is detected, and the two edge pulses are combined by the NOR circuit Q81 to start counting by the counter 73-5. The output of the flip-flop Q73 is separated into positive and negative sampling pulses by AND circuits Q82 and Q83, and is input to the respective sample and hold circuits.

(Fifth Embodiment) FIG. 14 is a diagram showing a fifth embodiment of the present invention. In the present embodiment, a limiter circuit 91 is inserted between the integrating circuit 9 and the PWM circuit 10 to set the upper limit and the lower limit of the pulse width of the PWM output to stabilize the feedback control response.

The limiter circuit 91 includes a diode D9.
1, D92 and resistor R91, and its limiter potential V
H and VL are set close to the limit where the fluctuation range of the load capacity and the variation of the switching drive capacity of the positive and negative high breakdown voltage switch circuits can be corrected.

Here, according to the above-mentioned second and fourth embodiments, the control accuracy is lowered due to the influence of the ripple component contained in the output, the output has jitter, and the control becomes unstable. Can be completely eliminated. At the same time, by programming the microcomputer,
It becomes possible to control the output frequency, the duty ratio, and the rising and falling speeds.

Further, according to the third and fourth embodiments, the positive and negative rising times can be controlled independently, so that the rising speed can be stabilized with high accuracy.

Furthermore, if the positive and negative rising speeds are equal, the arrival time from the high level to the low level is twice as long as the arrival time from the intermediate level to the high level or from the low level to the intermediate level. Therefore, in order to equalize the high level timing and the low level timing, it is necessary to shorten the positive drive timing by a predetermined time in advance. In this way, by stabilizing the rising speed, the timing width of each output level can be stabilized.

Further, in relation to the above matters, the second, fourth
According to the embodiment, the positive and negative drive timing widths can be easily corrected by programming the microcomputer.

(Sixth Embodiment) FIG. 15 is a diagram showing a sixth embodiment of the present invention and shows a block configuration of a ternary bias circuit. In the figure, 101, 102, 105, 108-
Since 113 is a circuit similar to that of FIG. 27, description thereof is omitted here. In other words, 103 'is a step-up smoothing circuit having a transformer for outputting a third voltage level corresponding to the difference voltage between two high-voltage DC voltages of the conventional example, 106'.
Is a high-voltage switch circuit for switching the high-voltage DC voltage from the step-up smoothing circuit 103 'to a switch point, and 107' is a 0V switch circuit for switching the switch point and the ground.

The operation of this circuit will be described. The PWM circuit 1
01, the drive circuit 102, the step-up smoothing circuit 103 ′, and the voltage detection circuit (A) 105, the step-up smoothing circuit 103 ′.
Generates a high voltage output regulated to a third voltage level corresponding to a difference voltage between two high voltage DC voltages of the conventional example according to a reference voltage preset in the PWM circuit 101. The high voltage switch circuit 106 'outputs the high voltage output to 0V.
The switch circuit 107 'switches the ground level to the switch point according to the timing signal input to each.

Further, the intermediate voltage control circuit 109 detects that the voltage at the switch point has reached a certain voltage (high voltage output / 2 in this embodiment) between the high voltage output and the ground level. The signal from the circuit (B) 105 is detected by comparison with a reference voltage preset in the intermediate voltage control circuit 109, and a signal is output to the signal control circuit 113. The signal control circuit 113 receives the signal and controls the timing signal to the high voltage switch circuit 106 ', whereby the voltage at the switch point is controlled to the intermediate voltage.

As a result of the above switching operation, the voltage at the switch point becomes 0, the high voltage output voltage of the step-up smoothing circuit 103 '.
[V], the intermediate voltage between the two is switched periodically, and the voltage at the high-voltage output end coupled through the output coupling capacitor C becomes a three-value bias output similar to the conventional example.

FIG. 16 shows the high voltage switch circuit 1 in this case.
A detailed circuit example of the 06 'and 0V switch circuits 107' is shown. As shown in the figure, the high voltage switch circuit 106 'and the high voltage switch circuit (A) 106 shown in the conventional circuit diagram have the same configuration except that the voltage level of the high voltage DC voltage to be switched is different. On the other hand, in the 0V switch circuit 107 'and the high voltage switch circuit (B) 107 shown in the conventional circuit diagram, in the 0V switch circuit 107', the emitter of the high voltage transistor Tr2 therein is connected to the ground,
Since the control signal of the transistor Tr2 is input to the base, it is not necessary to use an insulating transformer, and the diode or the like can be removed accordingly.

As described above, according to this embodiment, a single high-voltage power supply (including a PWM circuit, a drive circuit, a step-up smoothing circuit, etc.)
A three-valued bias circuit can be configured with the above, and thus, the high voltage transformer and the smoothing circuit can be eliminated. Further, according to this method, in the switch circuit in the lower stage, the circuit that inputs the timing signal by using the isolation transformer can be input without using the isolation transformer, so that the number of parts can be significantly reduced. .

Further, by reducing the number of parts and reducing the circuit of the high voltage portion, the three-value bias circuit can be downsized and the cost can be reduced.

(Embodiment 7) In the sixth embodiment described above, the ternary bias high voltage is obtained by using a single high voltage power source. However, in the ternary bias circuit having the above configuration, the output is turned on / off. When the transmission of the timing signal to the switch circuit is performed ON / OFF as in the conventional case, the normal amplitude level (Vp in the figure) as shown in (e) of FIG. 20 is obtained at the moment of switching from the OFF state to the ON state. ), A problem that a voltage far exceeding is generated. The present embodiment has a configuration that avoids this phenomenon.

That is, FIG. 17 shows the circuit configuration of the seventh embodiment of the present invention. The figure shows a schematic diagram of the PWM circuit 101, in which 114 is a reference voltage circuit for generating a reference voltage determined by the resistors R101 and R102 and the voltage Vs,
Reference numeral 115 is an error amplifier for comparing and calculating the reference voltage from the reference voltage circuit 114 and the fed back voltage detection signal, 116 is a triangular wave oscillator, 117 is a comparison between the output of the error amplifier 115 and the output of the triangular wave oscillator 116, It is a comparator that outputs an H / L signal as a PWM signal. Then, in the normal operation, with the above configuration, the PWM output is output so that the reference voltage and the voltage detection level have the same value.

On the other hand, in this embodiment, in addition to the above configuration,
It has a configuration including an open collector switch circuit 118 for turning on / off upon receiving an on / off signal of a three-value bias output inputted from the outside and a capacitor C101 added to a reference voltage circuit 114. As a result, when the three-value bias is OFF (ON / OFF signal = HighIm
pedance), the transistor in the switch circuit 118 is turned on, and the output voltage of the reference voltage circuit 114 becomes 0 [V]. Therefore, the voltage detection signal is 0 [V] (at this time,
The output of the ternary bias circuit is also turned off while the output of the step-up smoothing circuit 106 'is also 0 [V].

Next, the ON / OFF signal turns ON (ON / O
When the FF signal = 0 [V]), the output of the switch circuit 118 becomes High Impedance, and the output of the reference voltage circuit 114 rises from 0 [V] to the reference voltage with a time constant composed of the resistor R101 and the capacitor C101. As a result, the high voltage output of the step-up smoothing circuit 106 'also gradually rises with the above time constant, and at the same time, three-value bias output is also performed.
As shown in (f) of FIG. 20, the output becomes a ternary bias output that gradually increases the amplitude.

As described above, the time constant circuit is provided in the reference voltage circuit 114 of the PWM circuit 101, and the three-value bias output O
Switch circuit 118 that turns on / off with an N / OFF signal
By providing the bias output, when the bias output is turned on, an output far exceeding the normal time is generated (overshoot).
Can be prevented.

(Embodiment 8) In the above-mentioned seventh embodiment, the case where the output of the step-up / smoothing circuit 106 'is gradually raised to a constant voltage along with the turning on of the three-valued bias output to prevent the generation of excess voltage at the time of turning on will be described. did. However, in the above-mentioned embodiment, it takes several tens to several hundreds [ms] to turn on the three-valued bias, which is not suitable for use where high-speed ON / OFF is required. Therefore, next time ON /
The case where it can be turned off will be described.

FIG. 18 is a diagram showing a circuit configuration of the eighth embodiment in this case, and the same reference numerals as those in FIGS. 15 to 17 denote the same components.

In the figure, numeral 119 indicates that the three-value bias output is ON.
It is an intermediate voltage period determination circuit including an OR circuit for the / OFF signal and the intermediate value output timing signal of the three-valued bias.

The intermediate voltage period determination circuit 119 outputs an intermediate voltage period signal to the intermediate voltage control circuit 109 so that the voltage at the switch point in the figure is always the intermediate voltage when the ON / OFF signal is in the OFF period. The intermediate voltage control circuit 109 signals the signal control circuit 113 to control the high voltage switch circuit 106 ′ when the voltage at the switch point falls below the intermediate voltage according to the signal and the signal from the voltage detection circuit (B) 108. Is output. Also, the signal control circuit 113
The intermediate voltage control circuit 109 transmits the timing signal periodically sent from the timing signal generation circuit 110.
It controls according to the signal from.

On the other hand, when the ternary bias output is ON, the output from the intermediate voltage period determination circuit 119 becomes the intermediate value output timing signal itself, and the operation is the same as that described in the seventh embodiment.

By the way, the voltage at the switch point immediately after the ternary bias output is turned on is the voltage at the high voltage switch circuit 10.
The voltage of the step-up smoothing circuit 103 'by turning on 6'or 0V
It is 0 [V] when the switch circuit 107 'is turned on, or the intermediate voltage in the intermediate voltage value period, but at any voltage value output timing, the voltage at the switch point immediately before turning on is the intermediate value voltage. It does not exceed the normal intermediate voltage. This is shown in FIG. 21 (d),
In (e), (d) shows the voltage at the switch point, and (e) shows the voltage at the high-voltage output terminal after coupling.

FIG. 19 shows the details of the circuit of FIG. 18, where (a) shows a circuit example of the intermediate period determining circuit and (b) shows a circuit example of the intermediate voltage control circuit.

As shown in FIG. 19A, the intermediate voltage period determination circuit 119 is an OR circuit for the ON / OFF signal of the three-valued bias and the timing signal. Also (b)
As shown in, the intermediate voltage control circuit 109 in this case is
It has an error amplifier for performing a comparison operation of the reference voltage Va corresponding to the intermediate voltage value and the detection signal of the voltage detection circuit (B) 118, and the output thereof is the ON state of the intermediate voltage period signal output from the intermediate voltage period determination circuit 119. ON depending on / OFF
The switch circuit is connected so as to be turned on / off (the error amplifier output is turned on when the intermediate voltage period signal is turned on).

As described above, since the three-value bias output and the ON / OFF control of the single high-voltage power supply are made common and the rising of the high-voltage power supply has a time constant, the overshoot at the time of turning on the three-value bias is prevented. You can Further, since the voltage at the switch point when the three-valued bias output is turned off is an intermediate value voltage, overshoot when the three-valued bias output is turned on can be prevented and high-speed ON / O
FF control becomes possible.

20 and 21, FIGS.
3 shows signal waveforms of various parts of the circuit of FIG.

(Embodiment 9) FIG. 22 is a diagram showing a ninth embodiment of the present invention, showing a circuit configuration of ± high-voltage power supplies.
Note that, here, a case will be described in which the differential voltage between the high-voltage power supply outputs + V1 and −V2 is controlled to improve the amplitude accuracy and stability of a desired AC waveform.

In FIG. 22, 201 to 206 are similar to the conventional circuit of FIG. Further, 212 is a + voltage detection circuit that detects a positive side high voltage output voltage, 213 is a-voltage detection circuit that detects a negative side high voltage output voltage, and 214 is a detection from the + voltage detection circuit 212 and the-voltage detection circuit 213. According to the result, the difference voltage is calculated, and the calculated result is P
This is a difference voltage calculation circuit that feeds back to the WM control circuit 201.

In the above configuration, the PWM control circuit 20
1 is an appropriate PWM signal based on the output from the difference voltage calculation circuit 214 and a reference level that is preset so that the difference voltage between the output voltages + V1 and −V2 is the amplitude level of the desired AC waveform. Based on this, the drive circuit 202 outputs the booster circuit (1) 203 and the booster circuit (2) 20.
The high voltage transformer in 4 is driven. The same transformer is used for the transformers in both boost circuits, and the same P
Output voltage + V1,-driven by WM signal
The absolute values of V2 do not differ greatly (see FIG. 26 (b)). Therefore, for example, if the desired amplitude of the output high-voltage AC waveform is 2 [KV], + V≈1
[KV], −V2≈−1 [KV].

Thus, in the ternary bias circuit,
± Voltage difference between positive high voltage and negative high voltage by a single control circuit and a single drive circuit by detecting the voltage difference of each output voltage of the high voltage power supply and controlling the voltage to reach a predetermined potential difference level. It becomes possible to control
It is possible to stably control the amplitude level of the value bias output to a desired level.

(Embodiment 10) In the ninth embodiment described above, ± is set so that the amplitude of the output high-voltage AC waveform has a desired value.
The method of controlling the differential voltage of each output of the high-voltage power supply with the single drive circuit has been described, but here, the plus side voltage and the minus side voltage of the output three-value AC waveform are balanced. The case will be described.

FIG. 23 is a diagram showing an example of a switch circuit in the tenth embodiment in this case. 208-2 in the figure
13, transistors Tr11 to Tr14, transistors HTr1 and HTr2, transformers T201 and T202
Is similar to that shown in FIG. Reference numeral 215 is an adder circuit 216 that outputs a signal obtained by adding a signal from the + voltage detection circuit 212 that detects the positive voltage of the positive high-voltage power supply and a signal from the −voltage detection circuit 213 that detects the negative voltage. Is 1 of the output from the adder circuit 215.
It is a 1/2 circuit that generates a voltage output of / 2 and inputs it to the error amplifier 211.

According to the circuit configuration as described above, the + voltage detection circuit 212, the −voltage detection circuit 21, the addition circuit 215 and the 1/2 circuit 216 detect the intermediate value voltage between the voltage + V1 and the voltage −V2, This is used as the reference input of the error amplifier 211. By this, the output three-value AC
The high-voltage intermediate-value voltage has an intermediate value between the voltage + V1 and the voltage −V2, and as a result, the positive-side voltage and the negative-side voltage of the ternary AC waveform can be balanced (see FIG. 26). (See (c)).

By the way, in this embodiment, regarding the three-value AC high voltage output, the case where the plus side amplitude and the minus side amplitude are equal has been described, but the 1/2 circuit 216 in FIG. 1/3 circuit or 1
By changing it appropriately such as / 4 circuit,
The balance between the plus side amplitude and the minus side amplitude can be easily changed.

Although not described in this embodiment, the control of the intermediate value voltage can be performed by the voltage detection circuit 210, the + voltage detection circuit 212, and the −voltage detection circuit 21 without using the 1/2 circuit.
It is also possible to adjust the partial pressure ratio of 3.

Thus, in the ternary bias circuit,
± An arithmetic circuit that detects the positive side voltage and the negative side voltage of the high-voltage power supply and calculates the intermediate value voltage, and a high-voltage switch circuit that outputs the calculated voltage when the intermediate voltage occurs based on the calculation result. By providing a control circuit to control, it is possible to accurately generate the intermediate value voltage even if the positive and negative outputs of the ± high-voltage power supply are out of balance, improving the waveform accuracy with a simple circuit. be able to.

(Embodiment 11) FIG. 24 shows a configuration diagram of a switch circuit according to an eleventh embodiment of the present invention, which has means for removing the unnecessary base-emitter voltage of the high voltage transistors HTr1 and HTr2.

In FIG. 24, 208, 209, transistors Tr11, Tr12, transistors HTr1, HTr.
2. The transformers T201 and T202 are the same as those shown in FIG. The transistor Tr17 is turned on during the off period of the high-voltage transistor HTr1 to turn on the transistor HT.
Similarly, the transistor for removing the unnecessary base-emitter voltage of r1, the transistor Tr18, is the high-voltage transistor H.
It is turned on during the OFF period of Tr2 to turn on the transistor HTr.
2 is a transistor for removing the unnecessary base-emitter voltage.

Further, the resistor R201 and the transistor Tr1
8 circuit, resistor R202 and transistor Tr
The circuit consisting of 20 is a high voltage transistor HTr
A current limiting circuit that limits the collector current of the transistors 1 and HTr2 to prevent the transistors HTr1 and HTr2 from being destroyed.

FIG. 25 shows the signal waveform of each part of the above circuit. In the output waveform of the oscillator 208 of (a) in the figure, the duty is biased so that the high period becomes longer as illustrated. (B) is a transistor T
With the collector voltage waveform of r11, the transistor Tr11 is turned on in response to the signal from the timing signal generation circuit 209.
Since it is turned off N, accordingly, the transistor T1
Only when 1 is OFF, the output signal of the oscillator 208 appears as it is as the collector voltage of the transistor Tr11. (C) is the pin voltage of the output of the transformer T201,
Because the duty of the pulse is biased, the pulse O
The voltage remains on the negative side during the FF period. (D) is a high-voltage transistor HTr in the conventional circuit
With a base-emitter voltage of 1, this transistor HT
The voltage remains during the OFF period of r1. (E) is the V _BE voltage of the transistor HTr1 when the unnecessary base-emitter voltage removal circuit according to the present invention is provided. By using the output voltage of the transformer T201 as the base drive signal of the transistor Tr17, the collector of the transistor Tr11 is collected. The voltage of the transistor
The signal has a high level only during the N period.

As described above, the duty of the oscillator 208 is biased so that the period of the high level becomes long, the transistors Tr17 and Tr18 are provided to control the base voltages of the high voltage transistors HTr1 and HTr2, and the transformer T201 that transmits the pulse is provided. , T202 output signals from the transistors Tr17 and Tr18, respectively.
By using it as the base drive signal of the above, it is possible to remove the unnecessary voltage applied to the bases of the transistors HTr1 and HTr2, and to accurately perform the switching operation of the transistors HTMLr1 and HTr2.

That is, in order to transmit the timing signal for performing the switch control of the plus voltage + V1 and the minus voltage -V2 to the base terminal of the high voltage switch transistor, the high frequency pulse signal corresponding to the above timing signal is provided on the primary side of the pulse transformer. In a three-value bias circuit for rectifying the secondary side signal of the transformer and inputting it to the base terminal of the high-voltage switch transistor,
A control transistor capable of short-circuiting the base-emitter voltage of the transistor is connected to the base terminal of the high-voltage switch transistor, and the secondary signal of the pulse transformer is input to the base terminal of the control transistor,
By reducing the duty of the pulse signal, the unnecessary base-emitter voltage remaining between the base-emitter of the high-voltage switch transistor is removed without increasing the circuit scale, and the unnecessary base-emitter voltage is removed. Can remove the distortion of the ternary bias waveform.

[0122]

As described above, according to the present invention, it is possible to output a positive and negative high voltage having a high speed rising and falling and a ternary bias in the middle thereof, and the output waveform has good accuracy, and the circuit There is an effect that it is possible to reduce the size and cost.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing the configuration of a high-voltage power supply according to the first embodiment.

FIG. 3 is a circuit diagram showing details of the timing controller of FIG.

FIG. 4 is a timing chart showing the operation of the timing controller of FIG.

FIG. 5 is a timing chart showing the operation of the first embodiment.

6 is a circuit diagram showing the configuration of the sample hold circuit of FIG.

FIG. 7 is a circuit configuration diagram showing a second embodiment of the present invention.

FIG. 8 is a timing chart showing the operation of the second embodiment.

9 is an output waveform diagram of the circuit of FIG.

FIG. 10 is a circuit configuration diagram showing a third embodiment of the present invention.

FIG. 11 is a circuit diagram showing details of the timing controller of FIG.

FIG. 12 is a timing chart showing the operation of the third embodiment.

FIG. 13 is a circuit configuration diagram showing a fourth embodiment of the present invention.

FIG. 14 is a circuit configuration diagram showing a fifth embodiment of the present invention.

FIG. 15 is a block diagram showing a circuit configuration of a sixth embodiment of the present invention.

16 is a circuit diagram showing a schematic configuration of the high voltage switch circuit of FIG.

FIG. 17 is a circuit configuration diagram showing a seventh embodiment of the present invention.

FIG. 18 is a block diagram showing a circuit configuration of an eighth embodiment of the present invention.

FIG. 19 is a configuration diagram showing details of the circuit of FIG.

FIG. 20 is an explanatory diagram showing signal waveforms of the circuits of FIGS.

FIG. 21 is an explanatory diagram showing signal waveforms of the circuits of FIGS.

FIG. 22 is a block diagram showing a circuit configuration of a ninth embodiment of the present invention.

FIG. 23 is a block diagram showing a circuit configuration of a tenth embodiment of the present invention.

FIG. 24 is a block diagram showing a circuit configuration of an eleventh embodiment of the present invention.

FIG. 25 is an explanatory diagram showing signal waveforms of respective parts of the circuit of FIG. 24.

FIG. 26 is a timing chart showing the operation of the ninth and tenth embodiments.

FIG. 27 is a block diagram showing a circuit configuration of a conventional example.

28 is a schematic configuration diagram of the high-voltage switch circuit of FIG. 27.

FIG. 29 is a block diagram showing a circuit configuration of another conventional example.

FIG. 30 is a schematic configuration diagram of a conventional high voltage switch circuit.

FIG. 31 is a schematic configuration diagram of a conventional high voltage switch circuit.

[Explanation of symbols]

 1 Timing Controller 2 Switch Circuit 3, 4 AND Circuit (Switch Control Circuit) 6 Comparator (First Comparison Circuit) 7 Sample Hold Circuit 8 Error Amplifier (Second Comparison Circuit) 9 Integration Circuit 10 PWM Circuit 71 Microcomputer 101 PWM Circuit 102 Drive circuit 105 Voltage detection circuit 106 'High voltage switch circuit 107' 0V switch circuit 108 Voltage detection circuit 109 Intermediate voltage control circuit 110 Timing signal generation circuit 114 Reference voltage circuit (time constant circuit) 119 Intermediate voltage period determination circuit 201 PWM control Circuit 202 Drive circuit 203 Booster circuit 204 Booster circuit 205 Rectifier circuit 206 Rectifier circuit 212 + Voltage detection circuit 213 − Voltage detection circuit 214 Differential voltage calculation circuit

Claims (16)

[Claims] 1. A high-voltage power supply device for use in an electrophotographic image forming apparatus, comprising a positive and negative high-voltage power supply, a switch circuit for selectively supplying an output of the high-voltage power supply to a load, and controlling the switch circuit. Timing controller for outputting a timing signal for the above, a first comparison circuit for comparing the output voltage of the high-voltage power supply with a reference value, a sample hold circuit for sampling and holding the output voltage of the high-voltage power supply, and this sample hold A second comparison circuit that compares the output voltage of the circuit with another reference value, an integration circuit that integrates the output of this second comparison circuit, and a pulse width that changes the output pulse width according to the output of this integration circuit. A modulation circuit and a switch control circuit for controlling the switch circuit according to the output of the pulse width modulation circuit and the outputs of the timing controller and the first comparison circuit. A high-voltage power supply device comprising a control circuit. 2. The timing controller is switch controlled so that a cycle of alternately outputting positive and negative high voltages for one cycle and then interrupting the output for a predetermined time and outputting an intermediate ground level voltage at a predetermined frequency. The high voltage power supply device according to claim 1, wherein the high voltage power supply device controls a circuit. 3. A first comparison that the output has reached the ground level after energizing a switch for selecting a negative or positive high voltage when switching from a positive or negative peak level to an intermediate ground level. 3. The high-voltage power supply device according to claim 1, wherein the switch is cut off after being detected by a circuit. 4. The high voltage power supply device according to claim 1, wherein the sample hold circuit performs sampling before the output rises sufficiently and is saturated while the switch circuit is energized. 5. A switch circuit comprising: a first pulse transformer whose output side of a timing controller is connected to a primary winding; and a high breakdown voltage transistor whose base and emitter are connected to the secondary side of this pulse transformer. A low withstand voltage transistor whose collector is connected to the emitter of this transistor and a second pulse transformer whose secondary side is connected to the base and emitter of this transistor. The low withstand voltage transistor when the switch circuit is cut off. 5. The high voltage power supply device according to claim 1, wherein the timing controller controls the power supply so as to conduct. 6. The high-voltage power supply device according to claim 1, wherein the pulse width modulation circuit has a high-frequency repetition frequency that is 10 times or more the high-voltage output frequency. 7. The high-voltage power supply according to claim 1, wherein the timing controller divides a basic repetitive signal of the pulse width modulation circuit into a predetermined ratio to generate a timing signal of the switch circuit. apparatus. 8. The timing controller comprises a plurality of counters whose count value can be set, and controls the energization time of the switch of the switch circuit and the timing of the sampling pulse of the sample hold circuit by these counters. Item 1. A high-voltage power supply device according to item 1. 9. The high voltage according to claim 1, wherein a plurality of systems of a sample hold circuit, a second comparison circuit, an integration circuit and a pulse width modulation circuit are provided, and positive and negative switches of the switch circuit are independently controlled. Power supply. 10. A counter, a microcomputer for supplying a frequency-divided clock to the counter, a peripheral circuit and a frequency divider around the counter, and a pulse width modulator are integrated on the same chip. The high-voltage power supply device according to claim 8. 11. A high-voltage power supply device for use in an electrophotographic image forming apparatus, comprising: a high-voltage direct-current generating circuit for generating a direct current corresponding to the maximum and minimum amplitude of a high-voltage alternating current that periodically repeats three voltage values; Includes a high-voltage switch circuit including a high-voltage transistor whose collector is connected to the output side of the high-voltage DC generation circuit and which has an insulating transformer between the base and emitter, and a high-voltage transistor whose collector is connected to the emitter of the high-voltage transistor and whose emitter is grounded A high-voltage power supply device comprising a 0V switch circuit. 12. The high voltage direct current generating circuit has a pulse width modulation circuit, and a control signal for turning on and off the output of the high voltage alternating current is inputted to the pulse width modulation circuit, and the high voltage direct current is generated by the on signal of the control signal. The high voltage power supply device according to claim 11, further comprising a time constant circuit for gradually increasing the output of the circuit to a predetermined voltage. 13. A high-voltage switch circuit, comprising an intermediate-voltage period determining circuit that performs a logical sum of a timing signal for controlling the output period of the intermediate voltage value of the high-voltage AC and a control signal for turning on / off the output of the high-voltage AC. The high-voltage switch circuit is controlled so that the voltage at the connection point becomes an intermediate voltage value of high-voltage AC by a signal obtained by dividing the voltage at the connection point of the 0V switch circuit and a signal from the intermediate voltage period determination circuit. The high-voltage power supply device according to claim 11. 14. A high-voltage power supply device for use in an electrophotographic image forming apparatus, comprising: a pulse width modulation circuit that changes an output pulse width in accordance with an external input signal; and a transformer primary output by the pulse width modulation circuit. Drive circuit that drives the switching side, a booster circuit that generates two different high-voltage alternating currents on the secondary side of the transformer, a rectifier circuit that rectifies each high-voltage alternating current, and a voltage that detects each rectified high-voltage DC voltage. A detection circuit and a difference voltage calculation circuit for calculating a difference voltage between the high voltage DC voltages, and the output of the difference voltage calculation circuit is input to the pulse width modulation circuit as the external input signal to output the two high voltage DC voltages. Is switched at a predetermined timing to periodically generate three voltage values of those voltage values and intermediate voltage values thereof. 15. A high-voltage power supply device for use in an electrophotographic image forming apparatus, comprising a high-voltage DC voltage generating circuit for generating two different high-voltage DC voltages, and a high-voltage DC voltage supplied to the connection points. Two switch circuits connected so that each high-voltage DC voltage appears, a voltage detection circuit that detects the voltage at the connection point and the two high-voltage DC voltages, and a voltage at the connection point is detected from these detection signals. An intermediate potential detection circuit for detecting that the intermediate voltage of two high-voltage DC voltages has been reached, the switch circuit is controlled by a signal from the intermediate potential detection circuit, and the two high-voltage DC voltages are switched at a predetermined timing. The high voltage power supply device is characterized by periodically generating three voltage values of those voltage values and intermediate voltage values. 16. A high-voltage power supply device for use in an electrophotographic image forming apparatus, comprising two switch circuits to which different high-voltage DC voltages are supplied, and a pulse signal for outputting a pulse signal for controlling the operation of the switch circuits. A generator circuit, a pulse transformer whose pulse signal is input to the primary side and the switch circuit is connected to the secondary side, and a signal generated on the secondary side of this pulse transformer are rectified to control the operation of the switch circuit. And a switch control circuit for controlling the operation of the switch control circuit by a signal before rectification on the secondary side of the pulse transformer, and switching the two different high-voltage DC voltages at predetermined timings to obtain their voltage values. A high voltage power supply device characterized in that it periodically generates three voltage values in between.