JP2003330251A - Protection device for high voltage power source device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make a protection device small-sized and low-cost by preliminarily storing an abnormality detection level for each output set value in a high voltage power source to perform digital control and performing abnormality detection of a plurality of outputs in time division. <P>SOLUTION: An output current detection value is compared with a saw tooth wave having a prescribed frequency and is converted to a PWM signal. A pulse width of the PWM signal is counted by a high frequency clock, and output is stopped when the counted result exceeds an abnormality detection level. The abnormality detection level is preliminarily determined for each output set value and is stored in a storage means. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus and image processing, and more particularly to an image forming apparatus and an image processing apparatus provided with a high voltage power supply device for charging a charging photoconductor.

[0002]

2. Description of the Related Art In an electrophotographic system such as a copying machine, a photosensitive drum is uniformly charged by a primary charging means and a latent image is formed by exposing the photosensitive drum with a laser or the like. A method of developing, transferring to a recording medium by a transfer charging means, and fixing an image on the recording medium by a fixing device is generally performed.

As described above, in the electrophotographic system,
A plurality of charging units are used in the process of forming an image on a recording medium.

A high voltage is applied to the charging means by a high voltage power source. However, there is a possibility that the electric field may be out of balance and leak may occur depending on conditions such as deterioration as the durability progresses, stains with paper powder or toner, environment, and the like.

From the viewpoint of safety, a high-voltage power source in which a high voltage is applied to the charging means is usually provided with various protection means so that an abnormal state such as an overcurrent does not continue.

For example, in FIG. 6, an abnormality detection level generating means 3 is provided, and the abnormality detection level Vth and the current detection value Vi are included.
There is an intermittent protection method in which the operation of repeating the operation of temporarily stopping the output and automatically returning after a fixed time when the overcurrent is detected by the comparing means 5 is detected.

Further, it has an abnormality detection level generating means 3,
There is a latch protection method in which the abnormality detection level Vth and the current detection value Vi are compared with each other by the comparison means 5, and when an overcurrent is detected, the high voltage output is not restored and stopped.

Each of the above two protection means has an abnormality detection level generation means 3 and a comparison means 5. In order to generate a more accurate detection level according to the load characteristic, the abnormality detection level generating means 3 has proposed an abnormality detection level generating means 3 as shown in FIG.

FIG. 7 is a diagram showing details of the conventional abnormality detection level generating means 3. In the figure, Q1 is an operational amplifier, ZD1 and ZD2 are zener diodes, Vth is an abnormality detection level, and CTL is an output control signal.

In the configuration shown in FIG. 7, the output control signal CT
From L, operational amplifier Q1 and Zener diode ZD1
A leak detection level is generated from ZD2 and a plurality of resistors. By using the Zener diode as shown in the figure, the slope of the change in the abnormality detection level with respect to the change in the output control signal CTL is switched from a certain specific voltage. The point at which the slope is switched can be determined by adjusting the two Zener voltages.

Next, the abnormality detection level Vth and the output current detection value Vi are compared by the comparison means 5, and when Vi> Vth, the output of the comparison means 5 is inverted and the high voltage supply means is stopped.

FIG. 8 shows the relationship between the set output voltage Vo, the current detection value I and the abnormality detection level current Ith.
The abnormality detection level Vth is the abnormality detection level current Ith.
Equivalent to.

In the figure, the output current detection value draws a curve indicated by I in the figure. However, when an abnormal state occurs due to overcurrent generation or the like, the detection value becomes higher than that in the normal state. And I> It
If h, that is, Vi> Vth, it is determined to be abnormal. As can be seen from FIG. 8, by making the abnormality detection level non-linear with respect to the change in the set output voltage, it becomes possible to detect the abnormality state with higher accuracy.

[0014]

However, if an abnormal state detecting means as shown in FIG. 7 is used in order to detect an abnormal state with a high accuracy with respect to a load having a current-voltage characteristic having a non-linear curve like the charging means, a circuit is used. Becomes complicated and the number of parts also increases.

The present invention has been made in order to solve such a problem, and is capable of highly accurate abnormality detection and protection at low cost for a load such as a charging means having a complicated current-voltage characteristic. The purpose is to realize easily.

[0016]

In order to achieve the above object, in the device of the present invention, a voltage for supplying an arbitrary voltage by an output control signal to a load having complicated current-voltage characteristics such as charging means. In a high-voltage power supply device having a supply means, an output current detection means, and an abnormality detection means for detecting an abnormal state in the charging means, the abnormality detection means responds to each output set value according to a load characteristic. Storage means for storing the abnormality detection level in advance, and pulse conversion of the abnormality detection level and the output current detection value to obtain the duty.
Comparing means for comparing the above, and the voltage supply means is stopped when the abnormality detecting means detects an abnormal state.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram showing a first embodiment according to the present invention. In the figure, T
1 is a transformer, FET1 is FET, C1 is a resonance capacitor, D1 is a diode, C2 is a smoothing capacitor, R
Reference numerals 1 and R2 are output voltage detecting resistors, and Ri is a current detecting resistor.

The operation in the steady state in this configuration will be described.
This configuration is a voltage resonance type, and by switching the FET1, the resonance waveform by the transformer T1 and the capacitor C1 is amplified and transmitted to the secondary side of the transformer T1. Then, it is smoothed by the diode D1 and the capacitor C2, and a predetermined voltage Vo is output. Output voltage Vo is FE
It can be changed by changing the ON width of the switching of T1. At this time, the OFF width is constant.

The output control of Vo is as follows. CPU
The output set value from 1 is input to the output control signal generation means 2, and the output control signal generation means 2 generates the output control signal A. Further, the voltage detection signal Vv (= Vo × R2 / (R) obtained by dividing the output voltage Vo by the output detection resistors R1 and R2.
1 + R2)) is compared with the sawtooth wave Vs1 generated by the sawtooth wave generation means 9 in IC1 and converted into a voltage detection pulse signal Vvp. The outline of the relationship among the sawtooth wave Vs1, the voltage detection signal Vv, and the voltage detection pulse signal Vvp is shown in FIG. As the value of Vv increases, the pulse width of Vvp is amplified.

The voltage detection pulse signal Vvp is input to the counting means 6, and the pulse width is counted by a clock having a frequency several thousand times that of the voltage detection pulse signal Vvp. The counting result B is compared with the output control signal A in the comparison means 4, and the ON pulse width control means 8 is used in the FET 1 so that they match each other.
Control the ON width of.

Next, the protection operation at the time of abnormality will be described.
The output set value is input from the CPU 1 to the abnormality detection level signal generation means 3, and the abnormality detection level signal generation means 3 generates the abnormality detection level signal C.

When the current-voltage characteristic of the load is as shown by I in FIG. 3, the abnormality detection level is set to the characteristic as shown by Ith in FIG. 3 and, for example, as shown in Table 1, each output set value (DATA) is set.
Abnormality detection level (C) C (0
0) to C (FF) are stored in the storage means.

[0024]

[Table 1] Further, the current detection signal Vi (= Vir-Ri × I) detected by the current detection resistor Ri is compared with the sawtooth wave Vs2 generated by the sawtooth wave generation means 10 by the IC2 and converted into the current detection pulse signal Vip. It Sawtooth wave Vs2, current detection signal Vi, current detection pulse signal V
The outline of the ip relationship is shown in FIG. When the value of Vi increases (current I decreases), the pulse width of Vip is amplified.

The current detection pulse signal Vip is input to the counting means 7, and the pulse width is counted by a clock having a frequency several thousand times that of the current detection pulse signal Vip. The counting result D is compared with the abnormality detection level signal C in the comparison means 5, and when C> D, the abnormality detection signal V2 is inverted and O
The N pulse width control means 8 sets the ON pulse width of the switching pulse Vg of the FET 1 to 0.

The operation at the time of actual abnormality will be described with reference to FIG. When an abnormality occurs in the figure from the time of steady output and the current I increases, the pulse width of the current detection pulse signal Vip decreases. Then, the relation between the counting result D and the abnormality detection level signal C becomes C> D and the abnormality detection signal V2 is inverted, whereby the ON pulse width control means 8 sets the ON pulse width of the switching pulse Vg of the FET1 to 0, and the output is at. It has stopped.

With this configuration, the portion a surrounded by the broken line in FIG. 1 is made into an IC, and the cost and the size can be reduced.

In the present embodiment, the latch protection system in which the output is completely stopped when the abnormal condition is detected has been described. However, the intermittent protection system in which the output is temporarily stopped when the abnormal condition is detected and the recovery is performed after a certain period is performed. It is also possible.

(Second Embodiment) FIG. 5 is a block diagram showing a second embodiment according to the present invention. In the figure, T
11, T21, T31, T41 are transformers and FET1
1, FET21, FET31, FET41 are FET, C
11, C21, C31 and C41 are resonance capacitors, D
11, D21, D31, D41 are diodes, C12,
C22, C32, C42 are smoothing capacitors, R11,
R21, R31, R41 and R12, R22, R32,
R42 is an output voltage detection resistor, Ri1, Ri2, Ri
3 and Ri4 are current detection resistors.

In a four-drum color image forming apparatus, loads of the same characteristics are installed for four colors.
There are four high voltage supply units in the above embodiment, and Vo1 to Vo4 can be independently output.

The output control of Vo1 to Vo4 is as follows. Each output setting value is switched from the CPU 1 at a predetermined timing and is input to the output control signal generation means 2 in a time division manner, and the output control signal generation means 2 generates the output control signal A. Further, the voltage detection signals Vv1 to Vv4 are input to the switching means 12. The voltage detection signal Vv selected by the sel signal is compared with the sawtooth wave Vs1 generated by the sawtooth wave generation means 9 at IC1 to obtain the voltage detection pulse signal Vv.
converted to p. Sawtooth wave Vs1, voltage detection signal V
An outline of the relationship between v and the voltage detection pulse signal Vvp is shown in FIG. As the value of Vv increases, the pulse width of Vvp is amplified.

The voltage detection pulse signal Vvp is input to the counting means 6, and the pulse width is counted by a clock having a frequency several thousand times that of the voltage detection pulse signal Vvp. The counting result B is compared with the output control signal A in the comparison means 4, and the ON pulse width control means 8 is used in the FET 1 so that they match each other.
Control the ON width of. And in the switching means 11,
The switching pulses Vg1 to Vg4 of the FET of the selected high-voltage supply unit are output according to the sel signal.

Next, the protection operation at the time of abnormality will be described.
Each output set value is switched from the CPU 1 at a predetermined timing and is input to the abnormality detection level signal generating means 3 in a time division manner.
The abnormality detection level signal generation means 3 uses the abnormality detection level signal C
To generate.

When the current-voltage characteristic of the load is as shown by I in FIG. 3, the abnormality detection level is set as shown by Ith in FIG. 3 and, for example, as shown in Table 1, each output set value (DATA) is set.
Abnormality detection level (C) C (0
0) to C (FF) are stored in the storage means.

Further, the current detection signals Vi1 to Vi4 detected by the current detection resistor Ri are input to the switching means 13. The current detection signal Vi selected by the sel signal is compared with the sawtooth wave Vs2 generated by the sawtooth wave generation means 10 in the IC2, and the current detection pulse signal V
converted to ip. Sawtooth wave Vs2, current detection signal V
An outline of the relationship between i and the current detection pulse signal Vip is shown in FIG. When the value of Vi increases (current I decreases), the pulse width of Vip is amplified.

The current detection pulse signal Vip is input to the counting means 7, and the pulse width is counted by a clock having a frequency several thousand times that of the current detection pulse signal Vip. The counting result D is compared with the abnormality detection level signal C in the comparison means 5, and when C> D, the abnormality detection signal V2 is inverted and O
The N pulse width control means 8 sets the ON pulse width of the switching pulse Vg of the FET 1 to 0. And switching means 11
At, in accordance with the sel signal, switching pulses Vg1 to Vg4 of the FET of the selected high voltage supply unit are output.

With this configuration, since the switching means operates in a time division manner, it is possible to share the abnormality detection level stored in the storage means. Further, a portion a surrounded by a broken line in FIG. 5 is made into an IC, which enables cost reduction and size reduction.

In the present embodiment, the latch protection system in which the output is completely stopped when the abnormal condition is detected has been described. However, the intermittent protection system in which the output is temporarily stopped when the abnormal condition is detected and the output is restored after a certain period is performed. It is also possible.

[0039]

As described above, according to the present invention,
By storing the abnormality detection level at each set value according to the load characteristics in the storage means, a complicated circuit is not required even when performing highly accurate abnormality detection, and the setting and detection of abnormality detection levels for multiple outputs By time-sharing the values with the switching means, the size can be reduced even when multiple outputs are detected.
Cost reduction is possible.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a first embodiment.

FIG. 2 is a schematic diagram showing a relationship of conversion of a detection signal into a pulse signal.

FIG. 3 is a schematic diagram showing load characteristics and abnormality detection levels.

FIG. 4 is a schematic diagram showing a waveform of each part at the time of abnormality.

FIG. 5 is a configuration diagram showing a second embodiment.

FIG. 6 is a configuration diagram of a conventional high-voltage power supply device having protection means.

FIG. 7 is a configuration diagram of a conventional abnormality detection level generating means.

FIG. 8 is a schematic diagram showing a conventional load characteristic and an abnormality detection level.

[Explanation of symbols]

T1 transformer FET1 FET C1 resonance capacitor D1 diode C2 smoothing capacitor

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 2H027 DA01 DE04 DE07 ED03 EE06                       EK03 EK06 ZA01                 2H200 FA11 HA28 HA29 HB48 NA14                       NA15 NA18 PA03 PA28                 5H730 AA20 AS01 AS04 AS05 BB03                       BB76 DD04 DD32 EE02 FD03                       FF02 FF06 FF07 FG03 XX03                       XX15 XX23 XX32 XX43

Claims (14)

[Claims] 1. A voltage supply means having a charging means for supplying a constant voltage to the charging means, an abnormality detecting means for detecting an abnormal state in the charging means, and a time when the abnormality detecting means detects an abnormal state. In the high-voltage power supply device for stopping the voltage supply means, the abnormality detection means stores, for each output set value, an abnormality detection level corresponding to a load characteristic in advance, output current detection means, and A high-voltage power supply device comprising: a comparison unit that compares the detected output value with an abnormality detection level, and stops the voltage supply unit when the abnormality detection unit detects an abnormal state. 2. A primary side of the voltage supply means is a transformer,
A switch element and a capacitor are provided, and a secondary side is provided with a rectifier circuit and an output voltage detection means. The ON pulse width control means determines the ON pulse width of the switch element according to the difference between the output set value and the output voltage detection value. The high-voltage power supply device according to claim 1, wherein the high-voltage power supply device is changed and controlled. 3. The output voltage detecting means compares the divided voltage value of the output voltage with a predetermined triangular wave or sawtooth wave of frequency 1 and converts it into a PWM signal of frequency 1. The high voltage power supply described. 4. The high-voltage power supply device according to claim 1, wherein the abnormality detection level value is stored in advance in a storage means for each output set value according to load characteristics. 5. The high-voltage power supply device according to claim 1, wherein said output current detecting means compares with a triangular wave or a sawtooth wave of frequency 2 and converts it into a PWM signal of frequency 2. 6. The high-voltage power supply device according to claim 1, wherein the comparing means compares the value obtained by counting the pulse width of the PWM signal of the frequency 2 by the counting means with the abnormality detection level value. . 7. The ON pulse width control means changes the ON pulse width so that the output is stopped when the count value of the pulse width of the PWM signal is smaller than the abnormality detection level value in the comparison means. The high-voltage power supply device according to claim 1. 8. A plurality of voltage supply means having a plurality of charging means for supplying a constant voltage to each of the plurality of charging means, an abnormality detecting means for detecting an abnormal state in each of the charging means, and the abnormality detection. In the high-voltage power supply device for stopping the voltage supply means when the means detects an abnormal state, the abnormality detection means, storage means for storing beforehand an abnormality detection level according to the load characteristics for each output set value, An output current detection means for detecting a plurality of output currents in a time division manner and a comparison means for comparing an abnormality detection level and an output current detection value in each voltage supply means are provided, and when the abnormality detection means detects an abnormal state. A high-voltage power supply device characterized by stopping the voltage supply means that detects an abnormality. 9. A primary side of said voltage supply means is a transformer,
A switch element and a capacitor are provided, and a secondary side is provided with a rectifier circuit and an output voltage detection means. The ON pulse width control means determines the ON pulse width of the switch element according to the difference between the output set value and the output voltage detection value. 9. The high voltage power supply device according to claim 8, wherein the high voltage power supply device is changed and controlled. 10. The output voltage detecting means compares the divided voltage value of the output voltage with a predetermined triangular wave or sawtooth wave having a frequency of 1 and converts it into a PWM signal having a frequency of 1. The high voltage power supply described. 11. The high voltage power supply device according to claim 8, wherein the abnormality detection level value is stored in advance in the storage means for each output set value in accordance with the load characteristics. 12. The high voltage according to claim 8, wherein said output current detecting means compares each output current signal with a triangular wave or a sawtooth wave of frequency 2 in a time division manner and converts it into a PWM signal of frequency 2. Power supply. 13. The comparison means is a PWM of the frequency 2.
9. The high-voltage power supply device according to claim 8, wherein the value obtained by counting the pulse width of the signal by the counting means is compared with the abnormality detection level value. 14. The ON pulse width control means changes the ON pulse width so that the output detecting the abnormality is stopped when the count value of the pulse width of the PWM signal is smaller than the abnormality detection level value in the comparison means. The high voltage power supply device according to claim 8, wherein